JPS61102703A - Chip-shaped electronic component - Google Patents
Chip-shaped electronic componentInfo
- Publication number
- JPS61102703A JPS61102703A JP59225476A JP22547684A JPS61102703A JP S61102703 A JPS61102703 A JP S61102703A JP 59225476 A JP59225476 A JP 59225476A JP 22547684 A JP22547684 A JP 22547684A JP S61102703 A JPS61102703 A JP S61102703A
- Authority
- JP
- Japan
- Prior art keywords
- nickel
- layer
- resistive film
- electrode forming
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 96
- 229910052759 nickel Inorganic materials 0.000 claims description 49
- 238000009713 electroplating Methods 0.000 claims description 35
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 18
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 18
- 229910052802 copper Inorganic materials 0.000 claims description 18
- 239000010949 copper Substances 0.000 claims description 18
- 239000000758 substrate Substances 0.000 claims description 16
- 238000007772 electroless plating Methods 0.000 claims description 12
- 239000000919 ceramic Substances 0.000 claims description 9
- 150000002815 nickel Chemical class 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 61
- 238000007747 plating Methods 0.000 description 13
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 230000000873 masking effect Effects 0.000 description 7
- 229910052709 silver Inorganic materials 0.000 description 7
- 239000004332 silver Substances 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000010306 acid treatment Methods 0.000 description 5
- 229910052763 palladium Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 229920003002 synthetic resin Polymers 0.000 description 4
- 239000000057 synthetic resin Substances 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 238000004070 electrodeposition Methods 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 239000003792 electrolyte Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 210000002445 nipple Anatomy 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- PIBWKRNGBLPSSY-UHFFFAOYSA-L palladium(II) chloride Chemical compound Cl[Pd]Cl PIBWKRNGBLPSSY-UHFFFAOYSA-L 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
Landscapes
- Details Of Resistors (AREA)
- Non-Adjustable Resistors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、プリント配線基板等に搭載されるチップ低抗
器\゛】チップコンデンサ等のチップ状電子部品とその
製造方法にかかり、−6神部の構成に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a chip-shaped electronic component such as a chip capacitor mounted on a printed wiring board, etc., and a method for manufacturing the same. Concerning the composition of the shrine.
(従来の技術)
従来、例えばチップ状抵抗器などの電極形成に際しては
、銀とパラジウムよりなるペースト又t、i、銀とガラ
スのペーストを1UA11I!IチツプP1の端面の電
極形成部に塗布し、これを焼成して半田メツ、キを施す
方法、円筒形チップ片の端面に金属製キャップを嵌着す
る方法、セラミックチップ片IJ電気メッキを直接施す
ことはでさないから、これに無電解メッキを行ってこれ
にハンダメッキを施して電極を形成する方法などがあっ
た。(Prior Art) Conventionally, when forming electrodes of chip resistors, for example, a paste made of silver and palladium or a paste of silver and glass was used in a 1UA11I! A method of coating the electrode forming part of the end face of the I chip P1 and baking it to apply soldering and scratching, a method of fitting a metal cap to the end face of a cylindrical chip piece, a method of directly electroplating the ceramic chip IJ Since it is not possible to do so, there have been methods such as electroless plating and then solder plating to form electrodes.
〔発明が解決しようとする問題点)
上述の方法において銀を用いたベーストを塗イIIする
方法は次のような問題がある。銀がFFjP&ハンダに
対して合金になり易いのでいわゆるくわれ現象を起して
端子の接着強度を(((下さUる。!!亡パラジウムは
高価でありコスト高になる。焼成には800’C以上の
a虐焼成が必要であるので抵抗皮膜の材質が制限され、
カーボン皮112抵抗、金属皮II!、! I+(抗4
cどは使用て・3ない。次にr属キシツブを1茨?;・
するプj法(ま、デフ1片が小望C・あるから1矢合f
i’i 鳴の面で技術的にりI L < 、L /、:
手間がかかり生産スピードが制限されるからル留りが悪
くなるという問題が(lりる。次に無電解メツ1による
方法は、ビラミンクとヌッV皮14+の接?4強度が前
述の2賃に比べて低く実用性が低いという問題がある。[Problems to be Solved by the Invention] In the above-mentioned method, the method of applying a base plate using silver has the following problems. Since silver tends to form an alloy with FFJP and solder, it causes the so-called "clinging" phenomenon, which reduces the adhesive strength of the terminal (((((Reduced). Palladium is expensive and costs are high. Since abrasion firing of C or higher is required, the material of the resistive film is limited;
Carbon skin 112 resistance, metal skin II! ,! I+ (anti-4
C does not use 3. Next, one thorn of R. ;・
(Well, there is one piece of differential C, so there is one arrow f
i'i Technically speaking, I L < , L /, :
There is a problem of poor retention because it is time consuming and limits the production speed.Next, in the method using electroless metal 1, the contact strength of Biramink and Nut V skin 14+ is the same as the above-mentioned 2. There is a problem that it is low compared to , and its practicality is low.
本庁用は[述の問題をrl?決・)るために、1皇1+
IIiな銀\゛)パラジウムを用いf女画な口11を用
い、また同口1に銀によるtJ/υだくわれの問題を解
決し、さらに電(引を1個1個に咲石したり、1個1v
Aにベーストを・7. ([+ iるというf数を省さ
/lK性を向1−さけようとするものである。For the main office, [rl? To decide,) 1 Emperor 1+
Using silver \゛) palladium, we also solved the problem of tJ/υ accumulation with silver in the same mouth 1, and added electricity to each one. , 1 piece 1v
Base on A・7. (This is an attempt to avoid the f-number of [+i]/lK property.
(問題点を解決りるための丁FQ )
本発明は、ブツブ状セラミックl、(体の両端部に電(
船形酸部を残して抵抗皮I19/!−形成し、前記電極
形成部とこの電極形成部に18J゛る抵抗皮膜の一部に
弗酸処理を施してエツチング面を形成し、このエツチン
グ面にニッケル無電解メッキを施すことによシ〕、導セ
性の少ない基体のごラミック面とこれに続く抵抗皮l1
9の一部を一連にニッケル、I7.+、 、Frイメッ
キ層で覆い、抵抗皮膜と電極形成部の電気的接続を良好
にするとともに焼成時にガラス71が析出されて滑面に
なっているセラミック面と二ソ′lル無電解メッキ層と
の結合性を8め、さらに銅電気メッキ層とニッケル電気
メッキ層を順次形成することによりニッケル無電解メッ
キ層の厚さと強度の不足を補いかつ、銅電気メッキ層に
よりニッケル゛電気メツー1居と次に施される=1′田
メツ1層の電着の均一性をはかるものである。さらに照
?S醒メッキ、電気メッキにより一01に大量を同時処
理し、微細なチップ状基体を1個1個処理する手数を省
き生産性を向上させようとするものである。(FQ for solving problems) The present invention is based on a lumpy ceramic l, (with electric current at both ends of the body)
Leaving the ship-shaped acid part and resisting skin I19/! - by forming an etched surface by applying hydrofluoric acid treatment to the electrode forming part and a part of the 18J resistive film on this electrode forming part, and electroless nickel plating to this etched surface. , the laminated surface of the substrate with low conductivity and the resistive skin l1 following it.
9 in series with nickel, I7. +, , Fr plated layer to improve the electrical connection between the resistive film and the electrode forming part, and the ceramic surface and the two-sol electroless plated layer, which has a smooth surface due to glass 71 being deposited during firing. By sequentially forming a copper electroplating layer and a nickel electroplating layer, the lack of thickness and strength of the nickel electroless plating layer is compensated for, and the copper electroplating layer improves the bondability with the nickel electroplating layer. This is to measure the uniformity of the electrodeposition of one layer of =1' Tamatsu applied next. More light? The purpose is to process a large amount of substrates at the same time using S-stain plating and electroplating, and to improve productivity by eliminating the trouble of processing each fine chip-shaped substrate one by one.
本発明は、抵抗皮膜が形成されたチップ状しラミック基
体の抵抗皮膜が形成°されないしラミック面と抵抗皮膜
の一部に弗酸処理を施してエツチング面を形成し、この
エツチング面にニッケル、@4解メッキを施しニッケル
無電解メッキ層によりセラミックとニッケルの結合性を
高めるととしにニッケル無電解メッキ層と抵抗皮膜との
接続を確実にし、さらに銅電気メッキ層とニッケル電気
メッキ層により゛電極の厚さと強IUを昌めかつ銅電気
メツ−1層はニッケルおよびハングの電着の均一・性を
(はかるしのである。In the present invention, a chip-shaped ramic substrate on which a resistive film is formed, on which no resistive film is formed, is treated with hydrofluoric acid on the laminate surface and a part of the resistive film to form an etched surface, and this etched surface is coated with nickel, nickel, etc. @4 Electrolytic plating is applied to improve the bond between the ceramic and nickel with the nickel electroless plating layer, and to ensure the connection between the nickel electroless plating layer and the resistive film, and the copper electroplating layer and the nickel electroplating layer. The thickness of the electrode and the strength of IU were changed, and the copper electrometal layer 1 was used to improve the uniformity and quality of the electrodeposition of nickel and hanger.
(実施例)
実施例1
円筒形チップ状電子部品の構成の一例を第1図ないし第
8図に承り製迄丁桿図によって説明りる。(Example) Example 1 An example of the structure of a cylindrical chip-shaped electronic component will be explained with reference to manufacturing process diagrams shown in FIGS. 1 to 8.
(1) 円筒形チップ状セラミック基体1の表面に両
端部を除いて炭素皮膜等よりなる抵抗皮膜2を形成する
。(縦断側面図を第1図に示寸。以下間LD >
(2) 抵抗皮+1!、! 2の両端を僅かに残して
上面を合成樹脂マスキング膜3で被司り゛る4、(第2
図)(:I) マスキング膜3で被覆されない基体1
の両0ん而及び端部周面よりなる電極形成部4並に抵抗
皮膜2の一部に弗酸処理を施寸。この弗酸処理により、
基体1のエツチング面に焼成I1.1に析出したガラス
71がどけてエツチング面5になる。またマスキング膜
3で被覆されない抵抗皮1lt22の一部しエツチング
面5になり、メッキ金属が結合し易い状態になる。(第
3図)
り4) エツチング面5に(7つだ電極形成部4ど抵
抗皮膜2の一部に塩化パラジウム処理によるii!、
+1化面6を形成し、無電解メッキ金属が附召し易い状
態にする。(第4図)
(5) 抵抗皮膜2上のマスキング膜3を溶剤で溶か
して除去する。(第5図)
(6) 基体1をニッケル無電解メツV液に浸漬して
活性化された電極形成部4とこれに接した抵抗皮膜2の
一部に厚さ1声〜3廊のニッケル無心iHメッキ層7を
一連に形成づ−る。(第6図)抵抗皮膜2上に電極形成
部4のニッケル無電解メッキ跨7が一部重なっているか
ら電気的接続が確実に<’Lる。(1) A resistance film 2 made of a carbon film or the like is formed on the surface of a cylindrical chip-shaped ceramic substrate 1 except for both ends. (The longitudinal side view is shown in Fig. 1. Below, the distance between LD > (2) Resistance skin +1!,! The upper surface is covered with a synthetic resin masking film 3, leaving a slight portion on both ends of 2. 4, (Second
Figure) (:I) Substrate 1 not covered with masking film 3
Hydrofluoric acid treatment is applied to the electrode forming portion 4 consisting of both sides and the peripheral surface of the end, and a part of the resistive film 2. Through this hydrofluoric acid treatment,
The glass 71 deposited on the etched surface of the substrate 1 during firing I1.1 is removed and becomes the etched surface 5. In addition, a portion of the resistor film 1lt22 that is not covered with the masking film 3 becomes an etched surface 5, which makes it easy for the plated metal to bond. (Fig. 3) 4) Part of the resistive film 2, including the seven electrode formation areas 4, is treated with palladium chloride on the etched surface 5.
A +1 surface 6 is formed to make it easier for electroless plated metal to attach. (Figure 4) (5) Dissolve the masking film 3 on the resistive film 2 with a solvent and remove it. (Fig. 5) (6) A layer of nickel with a thickness of 1 to 3 layers is applied to the electrode forming part 4 activated by immersing the substrate 1 in nickel electroless METS V solution and a part of the resistive film 2 in contact with the electrode forming part 4. A continuous iH plating layer 7 is formed. (FIG. 6) Since the electroless nickel plated straddle 7 of the electrode forming portion 4 partially overlaps the resistive film 2, the electrical connection is ensured.
(7) 抵抗皮膜2土とニッケル無電解メツ−1層7
が形成された抵抗皮膜2の端部迄を耐熱エポキシ系塗料
J:りなる1代抗保8嗅8で被覆する。(第7図)この
抵抗保11’!股8によって抵抗皮膜2Lの二ツ′Iル
Ia、4 lh解メツV層7が押えられた状態となり−
ツ’/ ’L 、’j’、! ’I+u解メッキ層7と
抵抗皮膜2の端部との接続か 層b「実になる。(7) Resistance film 2 soil and nickel electroless metal layer 1 layer 7
The ends of the resistive film 2 on which the resistive film 2 has been formed are coated with a heat-resistant epoxy paint J: 1st generation anti-protection 8-8. (Figure 7) This resistance maintenance 11'! The two layers Ia, 4 and V layer 7 of the resistive film 2L are pressed down by the crotch 8.
Tsu'/'L,'j',! 'I+U connection between the plating layer 7 and the end of the resistive film 2.
(II) I;i体1を銅の75気メツ1:?iに身
論し7yH船形成部・1に銅の電気メッキを施し、ニッ
ケル照電解メツ1層7上に17さ o2虜〜o4卯の銅
電気メツ(層94形成りる。(II) I; i body 1 75 qimetu of copper 1:? 7yH ship forming part 1 is electroplated with copper, and 17 o2 to o4 copper electroplating layers (layer 94 are formed) on the nickel electrolyte 1 layer 7.
(Ll) 次にニッケルの電気メッニ1浴に浸油しC
ニッ′ノルの心′コーメッVを/lトし銅電気メッキ層
9上に1′7さ2幅〜5趨のニッケル電気メツ、1一層
1oを形成する。ニップル心気メツ1層10がこの程1
復のfFjさがあれ1、[いわゆるはんだくゎれの現采
を阻止できる。(Ll) Next, immerse it in a nickel electric bath and C
A nickel electroplated plate having a width of 1'7 x 2 to 5 lines is formed on the copper electroplated layer 9 by applying a nickel core plate V/l. Nipple heart 1 layer 10 is now 1
If fFj is the same, it can prevent the current situation of so-called solder swelling.
(財) 次にハングメッキ浴中でハングの電気メッキを
施しニッケル電気メッキr5101−に厚さ5声〜10
mのハンダ電気メッキli’J11を形成する。(第8
図)ハンダ電q−メッキ層11の厚さがこの程度なら(
、【ハングHり性能において長期の(を頼廿が(qられ
る。(Incorporated) Next, apply hang electroplating in a hang plating bath to a thickness of 5 to 10 nickel electroplated R5101-.
Solder electroplating li'J11 of m is formed. (8th
Figure) If the thickness of the solder electrolytic q-plating layer 11 is about this level (
, long-term reliability is required in terms of hang performance.
以」のようにして両端に電極48を右づる円筒形ブップ
状電子部品△が11]られる。In the following manner, a cylindrical, boop-shaped electronic component Δ having electrodes 48 on both ends is formed 11].
ニッケル無電解メッキ層71 km鋼市気メツ1層9を
介してニッケル電気メツ↓h310を形IIkすること
にJ、リニッケル無電解メツ1一層7甲独(−はメッキ
の厚さと強度が不足するのを銅電気メツ−1層つ、ニッ
ケル電気メッキ層10を形成して厚さと強唄を銅与させ
る。Electroless nickel plating layer 71 km Nickel electric metal ↓h310 is formed into type IIk through 1 layer 9 of steel. Then, a nickel electroplating layer 10 is formed on the copper electroplating layer 10 to impart thickness and strength to the copper.
さらに、ニッケル無電解メツ:1層7十に+iN Ig
ニッケル電気メッキ層10を形成するとニッケル電気メ
ッキF!410の電看が不均一になり、また01電気メ
ッキ層9を省くと、ハンダ電気メッキ層11の電るも不
均一になるため、中間に薄い銅電気メツV層9を介在さ
せるものである。Furthermore, nickel electroless metal: +iN Ig in one layer 70
When the nickel electroplating layer 10 is formed, nickel electroplating F! 410 becomes uneven, and if the 01 electroplating layer 9 is omitted, the solder electroplating layer 11 becomes uneven, so a thin copper electroplating layer 9 is interposed in the middle. .
実施例2
角形チップ状電子部品の構成の一例を第9図ないし第2
1図に示す製造工程図によって説明4る。Example 2 An example of the configuration of a square chip-shaped electronic component is shown in FIGS. 9 to 2.
This will be explained with reference to the manufacturing process diagram shown in FIG.
(1) 多数の角形チップ状セラミック基体1の9、
合体であるセラミック基板1aの表面に、各基体1毎に
長さ方向の両端に電(少形成部4を残して炭素皮膜等の
抵抗皮膜2を形成する。(平面図を第9図に示J)
(2) 各抵抗皮膜2の表面にその長さ方向の両全工
部8僅かに残して合成樹脂マスキング膜3を形成し、さ
らに裏面にも基体・1の長さ方向の両端を僅かに残しで
合成樹脂マス1ング膜3aを形成する。(1) A large number of square chip-shaped ceramic substrates 1-9;
On the surface of the combined ceramic substrate 1a, a resistive film 2 such as a carbon film is formed on both lengthwise ends of each base 1, leaving a small electrically conductive layer 4 (a plan view is shown in FIG. 9). J) (2) Form a synthetic resin masking film 3 on the surface of each resistor film 2, leaving a slight portion 8 on both ends of the lengthwise direction, and furthermore, form a synthetic resin masking film 3 on the back side, leaving a slight amount on both ends of the lengthwise direction of the substrate 1. A synthetic resin massing film 3a is formed by leaving the rest behind.
(平面図を第10図に、衷面図を第11図に示す)(、
() 基板1、aをす体1の長さ方向が巾方向となる
ようにして細長く分割して細長片1bとする。(平面図
を第12図に承り)
(4) 細長片1bに実施例1ど同様な弗酸処理を隔
り。この弗酸処理によって、マスキング膜3.38で被
覆され(いない細長片11)の表ワJのレラミック面伎
び1]X抗皮I+!、! 2の一部を1ツブング而5に
りる。(The plan view is shown in Figure 10, and the inside view is shown in Figure 11.)
() The substrate 1, a is divided into long and thin strips so that the length direction of the frame body 1 becomes the width direction to form strips 1b. (The plan view is shown in FIG. 12) (4) The strip 1b was treated with hydrofluoric acid in the same manner as in Example 1. By this hydrofluoric acid treatment, the surface of the surface layer J covered with the masking film 3.38 (not the strip 11) is damaged. ,! Add part of 2 to 5.
(甲面図4第13図、八−へ線所面図を第14図に示・
j)
(5) 細長片11)のエツチング面5となって部分
に実hP IG+11と向1)tt、:塙化パラジウム
叫理を施し活性1ヒ面(33形成・Jる。(細長11の
「1」方向の断面図を第15図に示・」)
(I) ;III L: Ii 11)の入夫のマス
1ング膜3,3aを溶解除去する。(平面図を第16図
に示覆)(7) 細長片1bに実施例1と同様にニッ
ケル無電解メッキを施し、電極形成部4と抵抗皮膜2の
一部に形成された活性化部6に一体にニッケル無電解メ
ッキ層7を形成する。(平面図を第17図に示す)
(8)細長片1bの抵抗皮膜2上とこの抵抗皮膜2の両
端部上に一部が形成されたニッケル無電j19メッキ層
7上に電気絶縁性樹脂J、す4jる抵抗保4摸8を形成
する。(第18図は平面図、第19図は細長片の巾方向
の縦断側面図を示す)
(9) 細長片1bを基体1の中角に個々の5,11
本1に分割づる。(平面図を第20図に示J)00)
分割8れた角形チップ状J、!iA1のニッケル無電
解メッキ層7が形成された電極形成部4に実施例1と同
様にして銅電気メツ1−、ニッケル電気メッキ、ハンダ
電気メッキを施し、銅電気メン1層9、ニッケル電気メ
ッキ層10、ハンダ電気メッキ層11を形成づる。(9
121図)
以上のようにして両端に電144aを右する角形fソノ
状市丁部品△’/J’l’7られる。(The front view 4 is shown in Fig. 13, and the 8th line is shown in Fig. 14.)
j) (5) The etched surface 5 of the strip 11) is etched with real hP IG+11 and the etched palladium etchant. A cross-sectional view in the direction "1" is shown in FIG. 15. (I); (The plan view is shown in FIG. 16) (7) Electroless nickel plating is applied to the strip 1b in the same manner as in Example 1, and the activated portion 6 is formed on the electrode forming portion 4 and a part of the resistance film 2. A nickel electroless plating layer 7 is integrally formed thereon. (The plan view is shown in FIG. 17) (8) Electrical insulating resin J is applied on the nickel electroless plating layer 7 formed partially on the resistive film 2 of the strip 1b and on both ends of this resistive film 2. , form a resistor 48. (Fig. 18 is a plan view, and Fig. 19 is a longitudinal cross-sectional side view in the width direction of the elongated piece.) (9) At the center corner of the elongated piece 1b of the base body 1, each 5, 11
Divided into book 1. (The plan view is shown in Figure 20J)00)
Square chip shape J divided into 8 parts! Copper electroplating layer 1-, nickel electroplating, and solder electroplating are applied to the electrode forming portion 4 on which the nickel electroless plating layer 7 of iA1 is formed in the same manner as in Example 1, and then copper electroplating layer 1 layer 9 and nickel electroplating are applied. A layer 10 and a solder electroplated layer 11 are formed. (9
(Fig. 121) As described above, a rectangular f-shaped part Δ'/J'l'7 with electric wires 144a on both ends is formed.
(発明の’JI宋)
本発明によればチップ状しラミック常体の両端部に電(
〜形成部を残して抵抗皮膜を形成し、前記電極形成部上
これに接する抵抗皮膜の一部に弗酸処理を施しでエツチ
ング面を形成し、このエツチング面にニッケル71!!
電解メッキを施して電極形成部ど抵石皮I19の一部に
一連のニッケル無電解メツ−1層を形成し、前記抵抗皮
摸並にこれの一部に形成8れl、無電解メツー1層の一
部十に抵抗保護膜を形成し、前記ニッケル電気メッキ層
の電極形成部上に順次銅電気メツ1層、ニッケル電気メ
ツ1一層を形成したIこめ、ヒラミック基体のヒラミッ
ク面【、末、弗酸処理により、エツチング面が形成され
て、この1ツブング面によって次の無電解メッキに際し
て令属ニッケルの結合が確亥になり、導゛1性のないし
ラミック面にニッケル無電解メッキにより導電性を阻)
し、次の銅電気メッキが可能になる。(JI Song Dynasty of the Invention) According to the present invention, electric current is attached to both ends of the chip-shaped lamic body.
~A resistive film is formed leaving the electrode forming part, and a portion of the resistive film in contact with the electrode forming part is treated with hydrofluoric acid to form an etched surface, and nickel 71! is applied to this etched surface. !
Electrolytic plating is applied to form a series of nickel electroless metal layers on a part of the resistor skin I19, such as the electrode forming part, and a series of nickel electroless metal layers are formed on the resistor skin as well as on a part of this. A resistance protective film is formed on a part of the layer, and one layer of copper electroplating and one layer of nickel electroplating are sequentially formed on the electrode forming part of the nickel electroplating layer. By the hydrofluoric acid treatment, an etched surface is formed, and this etched surface ensures the bonding of the metal nickel during the next electroless plating, and the non-conductive or ramic surface is made conductive by electroless nickel plating. (preventing sex)
Then, the following copper electroplating becomes possible.
よたエツチング面は、セラミック基体の電極形成部とこ
机に接りる抵抗皮膜の一部とに一連に形成したから、電
極の一部が抵抗皮II−! I−1こ小ね、)わされる
ため隙間が生ずることがむく香気的接続が確実になされ
る。しかも、抵抗皮膜上に・ひね合わされたニッケル無
電解メッキ層の一部1jさら+ここの上に形成された抵
抗し19によって抵抗皮膜上に押しつけられているから
、両名の接続が一層確実になる。また、ニッケル無電解
メツ1層(。l r′、i り形成することができずし
ラミック基体との結合力し低く表面の強度ら低いが、こ
れに、銅電気メツ1層、ニッケル電気メッキ層を形成す
ることに上り前記基体との結合力が強くなり、またに面
強IfJ、し人となりメツ1層のりざもりくすることが
でさる。Since the etched surface was formed in series on the electrode forming part of the ceramic substrate and a part of the resistive film in contact with the desk, a part of the electrode was formed as a resistive film II-! I-1 (1-1) ensures a secure connection that prevents gaps from being formed due to bending. Moreover, since the part 1j of the nickel electroless plated layer twisted together on the resistive film is pressed against the resistive film by the resistor 19 formed above, the connection between the two is even more secure. Become. In addition, one layer of electroless nickel metal (l r', i) cannot be formed, but the bonding strength with the lamic substrate is low, and the surface strength is low. By forming a layer, the bonding force with the substrate becomes stronger, and the surface strength becomes stronger, making it possible to make the single layer thicker.
さらに、銅電気メッキ層の介在により、次のニッケル電
気メッキ層、さらに(まニッケル電気メツ1一層上に形
成されるハンダ心気メッキ層の電4を均一にすることが
できる。Furthermore, the interposition of the copper electroplating layer makes it possible to make the electrolyte of the next nickel electroplating layer and the solder core plating layer formed on the nickel electroplating layer 1 more uniform.
またTi極材itとして高価な鍜やパラジウ18を用い
ないlこめ材料が安価であり、銀を用いないため、はん
だくわれの現象が発生ずるおそれもなく、メッキにより
電着が形成されるため電極形成部が鳥潟に暉されること
がなく耐熱性の低い抵抗皮膜を用いることができる。In addition, the Ti electrode material is a low-cost material that does not use expensive ferrules or palladium 18, and since it does not use silver, there is no risk of solder creases occurring, and electrodeposition is formed by plating. The electrode forming part is not scratched by the torigata, and a resistance film with low heat resistance can be used.
第1図/jいし第8図は本発明の一実施例を示すfツブ
仏電子部品の製造工程説明図、第9図/iいし第2′1
図は同J他の実施例を示恢チップ状電子部品の製jろ■
桿説明図である。
1・・IJ1休、2・・11(抗皮膜、4・・電極形成
部、5)・・1−ツ1ング面、7・・ニッケル!W、電
解メツ髪層、8・・(^、l’! Il’i!、9・・
銅電気メツ1層、10・・−ソ1フル、′、i気メッキ
層。Figures 1/j to 8 are explanatory diagrams of the manufacturing process of an electronic component showing an embodiment of the present invention, and Figures 9/i to 2'1
The figure shows another example of the same. Manufacturing of chip-shaped electronic components.
It is a rod explanatory diagram. 1...IJ1 rest, 2...11 (anti-film, 4...electrode forming part, 5)...1-Ting surface, 7...nickel! W, electrolytic hair layer, 8... (^, l'! Il'i!, 9...
1 layer of copper electroplating, 10... - 1 full, ', i-type plating layer.
Claims (1)
残して抵抗皮膜を形成し、前記電極形成部とこの電極形
成部に接する抵抗皮膜の一部に弗酸処理を施してエッチ
ング面を形成し、このエッチング面にニッケル無電解メ
ッキを施して電極形成部と抵抗皮膜の一部に一連のニッ
ケル無電解メッキ層を形成し、前記抵抗皮膜並にこの抵
抗皮膜の一部に形成されたニッケル無電解メッキ層の一
部上に抵抗保護膜を形成し、前記ニッケル無電解メッキ
層の電極形成部上に順次銅電気メッキ層、ニッケル電気
メッキ層を形成したことを特徴とするチップ状電子部品
。(1) A resistive film is formed on both ends of a chip-shaped ceramic substrate, leaving electrode forming parts, and the electrode forming parts and a part of the resistive film in contact with the electrode forming parts are treated with hydrofluoric acid to form an etched surface. Then, nickel electroless plating is applied to this etched surface to form a series of nickel electroless plating layers on the electrode forming part and a part of the resistive film, and the nickel formed on the resistive film and a part of this resistive film is A chip-shaped electronic component characterized in that a resistance protection film is formed on a part of the electroless plating layer, and a copper electroplating layer and a nickel electroplating layer are sequentially formed on the electrode forming part of the nickel electroless plating layer. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59225476A JPS61102703A (en) | 1984-10-26 | 1984-10-26 | Chip-shaped electronic component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59225476A JPS61102703A (en) | 1984-10-26 | 1984-10-26 | Chip-shaped electronic component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61102703A true JPS61102703A (en) | 1986-05-21 |
Family
ID=16829912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59225476A Pending JPS61102703A (en) | 1984-10-26 | 1984-10-26 | Chip-shaped electronic component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61102703A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6380802U (en) * | 1986-11-14 | 1988-05-27 | ||
| JPH0380501A (en) * | 1989-08-23 | 1991-04-05 | Tdk Corp | Chip resistor and manufacture thereof |
| JPH077101U (en) * | 1993-06-07 | 1995-01-31 | コーア株式会社 | Anti-surge resistor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58107606A (en) * | 1981-12-21 | 1983-06-27 | 松下電器産業株式会社 | Manufacturing method of chip resistor |
-
1984
- 1984-10-26 JP JP59225476A patent/JPS61102703A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58107606A (en) * | 1981-12-21 | 1983-06-27 | 松下電器産業株式会社 | Manufacturing method of chip resistor |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6380802U (en) * | 1986-11-14 | 1988-05-27 | ||
| JPH0380501A (en) * | 1989-08-23 | 1991-04-05 | Tdk Corp | Chip resistor and manufacture thereof |
| JPH077101U (en) * | 1993-06-07 | 1995-01-31 | コーア株式会社 | Anti-surge resistor |
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