JPS61102732A - Manufacture of semiconductor element - Google Patents
Manufacture of semiconductor elementInfo
- Publication number
- JPS61102732A JPS61102732A JP59226352A JP22635284A JPS61102732A JP S61102732 A JPS61102732 A JP S61102732A JP 59226352 A JP59226352 A JP 59226352A JP 22635284 A JP22635284 A JP 22635284A JP S61102732 A JPS61102732 A JP S61102732A
- Authority
- JP
- Japan
- Prior art keywords
- ohmic electrode
- semiconductor
- film
- shaped
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
竜莢上の利用分野
本発明は、化合物半導体たとえば、砒化ガリウム（Ｇａ
Ａｓ）にオーミック電極を形成し、その電極パターンｆ
ｉ＃度の向上をはかり走留を高めることができる砒化ガ
リウム（ＧａＡｓ）半導体素子の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION Field of Application of Dragon Capsule The present invention relates to compound semiconductors such as gallium arsenide
As), an ohmic electrode is formed on the electrode pattern f
The present invention relates to a method of manufacturing a gallium arsenide (GaAs) semiconductor device that can improve the i# degree and increase the running retention.
従来例°の構成とその問題点
砒化ガリウム（ＧａＡｓ）は、／リコン（Ｓｌ）にくら
へて電子移動度が極めて高いことから高速半導体装置の
材料として多用されるに至っている。Conventional Example Structure and Problems Gallium arsenide (GaAs) has extremely high electron mobility compared to silicon (Sl), so it has come to be widely used as a material for high-speed semiconductor devices.
ところでＧ＆人Ｓ基板を用いて高速半導体装置を製作す
る場合、ｎ型不純物濃度のＧａ Ａｓ基板上に金・ゲル
マニウム合金（ＡｕＧｅ ）を主材としたオーミック電
極を蒸着形成することが不可欠である。第１図は、従来
のオーミック電極の形成方法を示す図であり、Ｇａ Ａ
ｓ基板上にＡｕＧｅを主材としたｄ着膜電極をリフトオ
フで形成した後、４００℃から６５０’Ｃ−ｉでの熱処
理を行うこと（アロイ処理）でオーミック電極を形成し
ていた。By the way, when manufacturing a high-speed semiconductor device using a G&S substrate, it is essential to form an ohmic electrode mainly made of a gold-germanium alloy (AuGe) by vapor deposition on a GaAs substrate with an n-type impurity concentration. FIG. 1 is a diagram showing a conventional method of forming an ohmic electrode.
After forming a d film electrode mainly made of AuGe on an s substrate by lift-off, an ohmic electrode was formed by performing heat treatment at 400°C to 650'C-i (alloy treatment).
ところで、この様な製造方法で得られたＡｕ Ｇｅを主
材とした電極に４００″Ｃから５５０’Ｃで熱処理を加
えた際にボールアンプが生じ表面が荒れ、この電極をレ
ーザ光線で反射させることで認識パターンとして利用す
る際、乱反射により認識パターンとして利用する事がで
きず、マスク合わせの自動化及びパ、ターン精度の向上
をはかることが出来ないという問題点があった。By the way, when the AuGe-based electrode obtained by this manufacturing method is heat-treated at 400"C to 550"C, ball amplification occurs and the surface becomes rough, causing the electrode to be reflected by the laser beam. Therefore, when used as a recognition pattern, there was a problem in that it could not be used as a recognition pattern due to diffuse reflection, and it was not possible to automate mask alignment and improve pattern accuracy.
発明の目的
本発明は、Ｇａ Ａｓ半導体装置を製作するにあたり、
そのオーミック電極を認識パターンとして利用すること
が出来、高いパターン精度を持つ半導体素子を得ること
ができる製造方法の提供を目的とするものである。Purpose of the Invention The present invention provides a method for manufacturing a GaAs semiconductor device.
The object of the present invention is to provide a manufacturing method in which the ohmic electrode can be used as a recognition pattern and a semiconductor element with high pattern accuracy can be obtained.
発明の構成
本発明の半導体素子の製造方法は、半導体基板上に、オ
ーミック電極形成材料を被着した後、全面に不活性被膜
を蒸着形成し、４００″Ｃから５５０℃の熱処理を行い
、前記オーミ’７り電極形成材料と半導体とのアロイ化
を進めることでオーミック電極を形成するものであるっ
この製造方法によれば、オーミック電極を形成後、不活
性被膜として形成されたＣＶＤでの５ｉｎ２あるいはプ
ラズマＣｖＤでのシリコンナイトライドの膜を除去した
後のオーミック電極の面は、蒸着された際の膜と同じ平
坦な面をしており、レーザ光による反射も乱反射をおこ
さず、したがって、レーザ光による認識パターンとして
利用出来、高い精度のマスク合わせが可能となる。また
、認識パターンとして利用出来ることで製造の生産性も
向上する。Structure of the Invention The method for manufacturing a semiconductor element of the present invention includes depositing an ohmic electrode forming material on a semiconductor substrate, forming an inert film by vapor deposition on the entire surface, and performing heat treatment at 400"C to 550C. According to this manufacturing method, an ohmic electrode is formed by alloying an ohmic electrode forming material and a semiconductor. Alternatively, the surface of the ohmic electrode after removing the silicon nitride film by plasma CVD has the same flat surface as the film when it was deposited, and the reflection by laser light does not cause diffuse reflection, so the laser It can be used as a recognition pattern using light, making it possible to match masks with high precision.Furthermore, by being able to use it as a recognition pattern, manufacturing productivity can be improved.
実施例の説明
本発明の半導体素子の製造方法を第２図に示すフローチ
ャートによって説明する。先ず、ｎ型のＧａ Ａｓ基板
上に人ｕ（ｒｅを主材とした電極をレジストマスク層を
設けて蒸着形成し、同レジスト層のリフトオフでパター
ン形成後、不活性被膜に用いられるＣｖＤでの８１０２
あるいはプラズマＣ’ＶＤでのシリコンナイトライド膜
を全面に蒸着し、４００’Ｃから５５０℃で熱処理を行
うことでオーミック電極を形成する。第３図は、本発明
の効果確認の実験結果を示す頻度分布図であり、オーミ
ック電極形成後の平坦度を、オーミック電極として４ｏ
○○入の人ｕＧａ薄膜を形成した際の膜厚の厚さの分散
として横軸にとったものである。図中白丸印は、第１図
のフローチャートに従って形成した従来方法によるもの
であり、黒丸印が第２図のフローチャートに従って形成
したものである。DESCRIPTION OF EMBODIMENTS A method of manufacturing a semiconductor device according to the present invention will be explained with reference to a flowchart shown in FIG. First, a resist mask layer was provided on an n-type GaAs substrate to form an electrode mainly made of urethane by evaporation, and after patterning by lift-off of the resist layer, CvD, which is used for an inert film, was formed. 8102
Alternatively, an ohmic electrode is formed by depositing a silicon nitride film over the entire surface using plasma C'VD and performing heat treatment at 400'C to 550C. FIG. 3 is a frequency distribution diagram showing the experimental results for confirming the effect of the present invention, and the flatness after forming the ohmic electrode is 4o as the ohmic electrode.
The horizontal axis represents the dispersion of the film thickness when forming a human uGa thin film containing ○○. In the figure, white circles are formed by the conventional method according to the flowchart in FIG. 1, and black circles are formed according to the flowchart in FIG. 2.
第３図に図示するところから明らかなように、不発明の
製造方法によれば、平坦度の良好なオーミック電極が得
られる。なお、本実施例ではオーミック電極をＡｕ Ｇ
ｅを主材とした材料としたが、オーミック電極は、半導
体基板とオーミックのとれる合金であれば、何でもよい
。As is clear from the illustration in FIG. 3, according to the uninvented manufacturing method, an ohmic electrode with good flatness can be obtained. In this example, the ohmic electrode is made of AuG.
Although the ohmic electrode is made of e-based material, any alloy may be used as long as it has an ohmic relationship with the semiconductor substrate.
発明の効果
以上の様に本発明は、オーミック電極となる金属薄膜を
直接４００’Ｃから５６０″Ｃの高温に接さす不活性被
膜、たとえば、ＣＶＤによるＳｉＯ□あるいはプラズマ
ＣｖＤでのシリコノナイトライドの嘆を介して高温処理
することで、平坦度の良好なオーミック電極を形成する
ことで、オーミック電極をレーザ光による認識パターン
として用い、パターン精度の高い半導体素子を製造する
ことが出来、その実用効果は大なるものがある。Effects of the Invention As described above, the present invention provides an inert coating in which a metal thin film serving as an ohmic electrode is directly exposed to a high temperature of 400'C to 560''C, such as SiO□ by CVD or silicononitride by plasma CVD. By forming ohmic electrodes with good flatness through high-temperature treatment, it is possible to use the ohmic electrodes as recognition patterns using laser light to manufacture semiconductor devices with high pattern accuracy, and to put this into practical use. The effects are huge.
第１図は従来のオーミック電極の形成方法を示すフロー
チャート、第２図は本発明によるオーミックｌの形成方
法を示すフローチャート、第３図は本発明の効果確認の
ための実験結果を示す頻度分布図である。
代理人の氏名 ブ１理士 中 尾 敏 υＪ ほか１名
第３図
平拝４（Ａ）
凍 灸
日ＩＩFig. 1 is a flowchart showing a conventional method for forming an ohmic electrode, Fig. 2 is a flowchart showing a method for forming an ohmic electrode according to the present invention, and Fig. 3 is a frequency distribution diagram showing experimental results for confirming the effects of the present invention. It is. Name of agent: 1st Physician, Satoshi Nakao υJ, and 1 other person Figure 3 Heibai 4 (A) Freeze Moxibustion Day II
Claims (1)
被膜で前記基板表面をおおい、４００℃から５５０℃ま
での温度で熱処理を行ないオーミック電極を形成するこ
とを特徴とする半導体素子の製造方法。A method for manufacturing a semiconductor device, which comprises depositing an ohmic electrode material on a semiconductor, covering the substrate surface with an inert film, and performing heat treatment at a temperature of 400° C. to 550° C. to form an ohmic electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59226352A JPS61102732A (en) | 1984-10-26 | 1984-10-26 | Manufacture of semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59226352A JPS61102732A (en) | 1984-10-26 | 1984-10-26 | Manufacture of semiconductor element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61102732A true JPS61102732A (en) | 1986-05-21 |
Family
ID=16843811
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59226352A Pending JPS61102732A (en) | 1984-10-26 | 1984-10-26 | Manufacture of semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61102732A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014078711A (en) * | 2012-10-10 | 2014-05-01 | Advanced Optoelectronic Technology Inc | Light emission diode and manufacturing method of the same |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5877227A (en) * | 1981-10-23 | 1983-05-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Method of forming ohmic contact |
-
1984
- 1984-10-26 JP JP59226352A patent/JPS61102732A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5877227A (en) * | 1981-10-23 | 1983-05-10 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | Method of forming ohmic contact |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014078711A (en) * | 2012-10-10 | 2014-05-01 | Advanced Optoelectronic Technology Inc | Light emission diode and manufacturing method of the same |
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