JPS61102777A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a semiconductor device with excellent high frequency characteristics.

Conventional structure and its problems In a bipolar transistor element, as a structure that reduces the base spreading resistance rbb''k that affects high frequency characteristics, the base electrode extraction part has a higher concentration than the base concentration directly under the emitter region. There is a so-called craft-based structure.

FIG. 1 is a sectional view of a typical conventional example of a bipolar transistor element equipped with a graft base. When this element is manufactured using standard manufacturing processes, P
An N-type epitaxial layer 3 having an N-type buried layer 2 is formed on a type silicon substrate 1, and element forming regions are separated by a P-type isolation diffusion layer 4. Next, a high concentration of boron is diffused to form the graft base layer 5, followed by active base +
m6f: 0 to diffuse low concentration of boron to form
Further, after simultaneously forming an N-type emitter layer 7 and an N-type collector layer 8, a wiring electrode layer 9 is provided, and in addition, a protective film 11 for surface stabilization is sequentially formed on the entire surface including the surface insulating film 10. However, in order to form the graft base layer 5 and the active base layer 6 in this way, it is necessary to use two types of photomasks and perform an independent base diffusion process for each, which reduces the manufacturing cost for forming the base region. There is a rising problem.

In addition, pattern misalignment among the graft base layer 5, active base layer, etc., and N-type emitter layer 7 tends to occur, and the current amplification factor hFE due to the decrease in the effective area of the emitter is caused by this.
There are also problems such as a decline in

OBJECTS OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that can realize a structurally stable graft-based transistor by introducing a relatively simple manufacturing process.

Structure of the Invention The present invention includes a step of completely forming a polycrystalline silicon layer of a predetermined shape on a part of the surface of a semiconductor substrate, and sequentially forming a first insulating film and a second insulating film covering the substrate and the polycrystalline silicon layer. , after opening the second insulating film in the same shape on the polycrystalline 7-licon layer, using this second insulating film as a mask, the first insulating film is exposed around the polycrystalline 7-licon layer so that the surface of the substrate is exposed. This method of manufacturing a semiconductor device includes a step of etching the first conductivity type impurity from the opening of the first insulating film, and a step of diffusing the first conductivity type impurity from the opening of the first insulating film. It is unified, and pattern deviation is also suppressed to a minimum.

DESCRIPTION OF THE EMBODIMENT First, as shown in FIG. 2a, N
A polycrystalline silicon film is grown on the element formation region of the mold by a well-known chemical vapor deposition method, and a polycrystalline silicon layer 12 having a predetermined shape is formed using photophosphorography technology. Subsequently, a silicon dioxide film 10 is formed by a thermal oxidation method or a chemical vapor deposition method, and a silicon nitride film 13 is further formed by a full chemical vapor deposition method. In addition,
This nitride/recon film 13 can also be replaced with a durable photomask.

Next, as shown in FIG. 2, an opening is made in the silicon nitride film 13 in the same shape as the polycrystalline silicon layer 12, and then an opening is made in the silicon dioxide 7 film 10i by chemical etching. Note that the size of the etched opening of 1° of silicon dioxide is determined by taking into account the size of the craft base.
Determine the area appropriately so that the substrate surface around the area is exposed. Thereafter, after removing the silicon nitride film 13, ion implantation is performed.

By diffusing boron by a thermal diffusion method or the like, an active base layer 6a and a graft base layer 6af as shown in FIG. 2C are formed.
form at the same time. In this case, boron diffusion conditions are determined by taking into consideration the thickness of the polycrystalline silicon layer. In addition, during this process, oxidation of the surface of the epitaxial layer 3 and the surface of the polycrystalline silicon layer 12 also progresses.

Next, as shown in FIG. 2d, the oxide film formed on the polycrystalline silicon layer 12 is removed. Next, as shown in FIG. 2e, phosphorus is diffused through the polycrystalline silicon layer 12,
At the same time as the N-type emitter layer 7ai is formed, the N-type collector contact layer Bai is formed, and the diffusion process is completed. Note that the polycrystalline silicon layer 12 can be left as it is as an emitter cage. Thereafter, an electrode wiring layer 9 is formed, and the surface is covered with a protective film 11, thereby completing a transistor having a graft base structure as shown in FIG.

Effects of the Invention As shown in the above embodiments, according to the present invention, an active base and a graft base can be formed in a single diffusion process using a photomask of 1↑techniques, and moreover, polycrystalline silicon By forming the base layer and emitter layer using the self 1 line/1 line process, pattern deviations of each layer do not occur, so a semiconductor device with excellent high frequency characteristics can be manufactured relatively easily.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a conventional bipolar NPN transistor, and FIGS. 2a to 2f are step-by-step sectional views showing a method of manufacturing a bipolar NPN transistor according to an embodiment of the present invention. 1 P type silicon substrate, 2 N type buried j8, 3
N-type Evitakinyal Ii, 4...P-type separation, 1
．． 5.5a, 5b Graft base layer, 6゜6a・
Active base layer, 7a ・N-type emitter layer, 8・
・N-type collector layer, 9...electrode wiring layer, 10...
...Silicon dioxide layer, 11...Protective film, 12.
...Polycrystalline silicon layer, 13...7 silicon nitride layer. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 2 Figure 5a /';' 6a 1, 6. ,,to f3 ,//

Claims (2)

[Claims] (1) A step of forming a polycrystalline silicon layer having a predetermined shape on a part of the surface of the semiconductor substrate, sequentially forming a first insulating film and a second insulating film covering the substrate and the polycrystalline silicon layer, and After opening the second insulating film in the same shape on the polycrystalline silicon layer, using the second insulating film as a mask, the first insulating film is etched around the polycrystalline silicon layer to the extent that the substrate surface is exposed. and a step of diffusing a first conductivity type impurity from an opening in the first insulating film. (2) The method for manufacturing a semiconductor device according to claim 1, wherein the second insulating film is a photoresist.