JPS61111155U - - Google Patents

Info

Publication number
JPS61111155U
JPS61111155U JP8057384U JP8057384U JPS61111155U JP S61111155 U JPS61111155 U JP S61111155U JP 8057384 U JP8057384 U JP 8057384U JP 8057384 U JP8057384 U JP 8057384U JP S61111155 U JPS61111155 U JP S61111155U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit board
lead
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8057384U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8057384U priority Critical patent/JPS61111155U/ja
Publication of JPS61111155U publication Critical patent/JPS61111155U/ja
Pending legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の実装基板の穴にリード端子を挿
入して実装するSIPタイプ混成集積回路基板で
aが正面図、bが側面図を示している。第2図は
本考案によるSIPタイプ混成集積回路基板の側
面である。第3図は本考案によるリード端子の斜
視図、第4図は本考案混成集積回路ユニツトの斜
視図、第5図は第4図の矢印bの方向から見た側
面図を示している。 図面において4は混成集積回路基板、6はリー
ド端子、8は引き出し導体パターン、9はリード
端子の第1突出片、10は第2突出片、11は実
装基板、12,13は導体パターンを示している
。
FIG. 1 shows a conventional SIP type hybrid integrated circuit board that is mounted by inserting lead terminals into holes in a mounting board, with a showing a front view and b showing a side view. FIG. 2 is a side view of the SIP type hybrid integrated circuit board according to the present invention. 3 is a perspective view of a lead terminal according to the present invention, FIG. 4 is a perspective view of a hybrid integrated circuit unit according to the present invention, and FIG. 5 is a side view as viewed from the direction of arrow b in FIG. 4. In the drawings, 4 is a hybrid integrated circuit board, 6 is a lead terminal, 8 is a lead-out conductor pattern, 9 is a first protruding piece of the lead terminal, 10 is a second protruding piece, 11 is a mounting board, and 12 and 13 are conductive patterns. ing.

補正 昭61.1.30 図面の簡単な説明を次のように補正する。 本願明細書の第7頁第18行目〜20行目に記
載の文章「第1図は従来の実装基板の穴にリード
端子を挿入して実装するSIPタイプ混成集積回
路基板でaが正面図、bが側面図を示している。
」を下記の通り補正する。 「第1図は本考案SIPタイプ混成集積回路ユ
ニツトの側面図、」
Amendment January 30, 1981 The brief description of the drawing is amended as follows. The text stated in lines 18 to 20 of page 7 of the specification of the present application: ``Figure 1 is a SIP type hybrid integrated circuit board that is mounted by inserting lead terminals into the holes of a conventional mounting board, and a is a front view. , b shows a side view.
' shall be corrected as follows. ``Figure 1 is a side view of the SIP type hybrid integrated circuit unit of the present invention.''

Claims (1)

【実用新案登録請求の範囲】 1 回路素子が実装された絶縁基板の端部に外部
引き出し用のリード端子を備えるための引き出し
導体パターンが形成された混成集積回路基板と、
絶縁板から成りその表面に導体パターンが形成さ
れている実装基板と、前記引き出しパターンに接
続する第1突出片と前記導体パターンに接続する
第2突出片を有する導電部材から成るリード端子
とを具備し、前記混成集積回路基板が前記実装基
板表面に対し略直角状態になるように前記リード
端子が前記導体パターンと前記引き出しパターン
間を接続することを特徴としたSIPタイプ混成
集積回路ユニツト。 2 前記第1突出片は前記混成集積回路基板端部
を挟持する2本の突出片から成ることを特徴とし
た実用新案登録請求の範囲第1項記載のSIPタ
イプ混成集積回路ユニツト。 3 前記第2突出部は、前記混成集積回路基板の
両側に略直角に張り出し、且つその先端部が階段
状に形成されており、該混成集回路基板を前記実
装基板に実装したとき該混成集積回路基板が該実
装基板表面より浮き上がるように形成されている
ことを特徴とした実用新案登録請求の範囲第1項
記載のSIPタイプ混成集積回路ユニツト。
[Scope of Claim for Utility Model Registration] 1. A hybrid integrated circuit board on which a lead-out conductor pattern for providing lead terminals for lead-out to the outside is formed at the end of an insulating board on which circuit elements are mounted;
A mounting board made of an insulating plate and having a conductive pattern formed on its surface, and a lead terminal made of a conductive member having a first protruding piece connected to the lead-out pattern and a second protruding piece connected to the conductive pattern. A SIP type hybrid integrated circuit unit, wherein the lead terminal connects the conductor pattern and the lead-out pattern so that the hybrid integrated circuit board is substantially perpendicular to the surface of the mounting board. 2. The SIP type hybrid integrated circuit unit according to claim 1, wherein the first projecting piece is comprised of two projecting pieces that sandwich the end portion of the hybrid integrated circuit board. 3. The second protrusion protrudes substantially perpendicularly to both sides of the hybrid integrated circuit board, and has a step-like tip, so that when the hybrid integrated circuit board is mounted on the mounting board, the hybrid integrated circuit board is mounted on the mounting board. 2. The SIP type hybrid integrated circuit unit according to claim 1, wherein the circuit board is formed to float above the surface of the mounting board.
JP8057384U 1984-05-31 1984-05-31 Pending JPS61111155U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8057384U JPS61111155U (en) 1984-05-31 1984-05-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8057384U JPS61111155U (en) 1984-05-31 1984-05-31

Publications (1)

Publication Number Publication Date
JPS61111155U true JPS61111155U (en) 1986-07-14

Family

ID=30626548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8057384U Pending JPS61111155U (en) 1984-05-31 1984-05-31

Country Status (1)

Country Link
JP (1) JPS61111155U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6379361A (en) * 1986-09-24 1988-04-09 Hitachi Vlsi Eng Corp Upright installation type semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6379361A (en) * 1986-09-24 1988-04-09 Hitachi Vlsi Eng Corp Upright installation type semiconductor device

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