JPS61114585A - 電気的結線構造及びその形成方法 - Google Patents

電気的結線構造及びその形成方法

Info

Publication number
JPS61114585A
JPS61114585A JP60194027A JP19402785A JPS61114585A JP S61114585 A JPS61114585 A JP S61114585A JP 60194027 A JP60194027 A JP 60194027A JP 19402785 A JP19402785 A JP 19402785A JP S61114585 A JPS61114585 A JP S61114585A
Authority
JP
Japan
Prior art keywords
layer
structure according
electrical connection
connection structure
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60194027A
Other languages
English (en)
Japanese (ja)
Other versions
JPH036675B2 (2
Inventor
ロバート・ベンジヤミン・ライボウイツツ
コーウイン・ポール・アンバツチ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS61114585A publication Critical patent/JPS61114585A/ja
Publication of JPH036675B2 publication Critical patent/JPH036675B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0912—Manufacture or treatment of Josephson-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/12—Josephson-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
JP60194027A 1984-11-05 1985-09-04 電気的結線構造及びその形成方法 Granted JPS61114585A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/668,537 US4751563A (en) 1984-11-05 1984-11-05 Microminiaturized electrical interconnection device and its method of fabrication
US668537 1991-03-13

Publications (2)

Publication Number Publication Date
JPS61114585A true JPS61114585A (ja) 1986-06-02
JPH036675B2 JPH036675B2 (2) 1991-01-30

Family

ID=24682719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60194027A Granted JPS61114585A (ja) 1984-11-05 1985-09-04 電気的結線構造及びその形成方法

Country Status (4)

Country Link
US (1) US4751563A (2)
EP (1) EP0180808B1 (2)
JP (1) JPS61114585A (2)
DE (1) DE3578634D1 (2)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019046557A (ja) * 2017-08-30 2019-03-22 国立研究開発法人理化学研究所 高温超伝導線材の接続体

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4740700A (en) * 1986-09-02 1988-04-26 Hughes Aircraft Company Thermally insulative and electrically conductive interconnect and process for making same
US4926237A (en) * 1988-04-04 1990-05-15 Motorola, Inc. Device metallization, device and method
US5185073A (en) * 1988-06-21 1993-02-09 International Business Machines Corporation Method of fabricating nendritic materials
US5137461A (en) * 1988-06-21 1992-08-11 International Business Machines Corporation Separable electrical connection technology
US4966885A (en) * 1989-08-25 1990-10-30 At&T Bell Laboratories Method of producing a device comprising a metal oxide superconductor layer
US5118299A (en) * 1990-05-07 1992-06-02 International Business Machines Corporation Cone electrical contact
EP0478464B1 (en) * 1990-09-27 1997-08-27 Sumitomo Electric Industries, Ltd. Method for manufacturing a superconducting device having an extremely thin superconducting channel formed of oxide superconductor material
DE69114435T2 (de) * 1990-09-27 1996-06-13 Sumitomo Electric Industries Supraleitendes Bauelement und dessen Herstellungsverfahren.
US5236896A (en) * 1990-10-08 1993-08-17 Sumitomo Electric Industries, Ltd. Superconducting device having an extremely thin superconducting channel formed of oxide superconductor material
US5105537A (en) * 1990-10-12 1992-04-21 International Business Machines Corporation Method for making a detachable electrical contact
FI950805A7 (fi) * 1994-02-24 1995-08-25 Shimadzu Corp Suprajohtava tunneliliitos ja menetelmä sen valmistamiseksi
US5863868A (en) * 1996-04-08 1999-01-26 Trw Inc. Superconductive quantum interference device for digital logic circuits
US6184062B1 (en) 1999-01-19 2001-02-06 International Business Machines Corporation Process for forming cone shaped solder for chip interconnection
US6198113B1 (en) 1999-04-22 2001-03-06 Acorn Technologies, Inc. Electrostatically operated tunneling transistor
US6347901B1 (en) 1999-11-01 2002-02-19 International Business Machines Corporation Solder interconnect techniques
US7615402B1 (en) 2000-07-07 2009-11-10 Acorn Technologies, Inc. Electrostatically operated tunneling transistor
KR100413828B1 (ko) * 2001-12-13 2004-01-03 삼성전자주식회사 반도체 장치 및 그 형성방법
RU2293400C1 (ru) * 2005-06-30 2007-02-10 Федеральное Государственное Унитарное Предприятие "Нижегородский Научно-Исследовательский Институт Радиотехники" Способ изготовления тонкопленочной структуры гибридной интегральной микросхемы сверхвысокочастотного диапазона
US7615385B2 (en) 2006-09-20 2009-11-10 Hypres, Inc Double-masking technique for increasing fabrication yield in superconducting electronics
US9692147B1 (en) * 2015-12-22 2017-06-27 Intel Corporation Small form factor sockets and connectors

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3689780A (en) * 1969-08-14 1972-09-05 Hans Walter Meissner Control of flow across a weak link in superconductive and superfluid devices
JPS5144871B2 (2) * 1971-09-25 1976-12-01
US4197332A (en) * 1977-10-26 1980-04-08 International Business Machines Corporation Sub 100A range line width pattern fabrication
US4224630A (en) * 1978-08-25 1980-09-23 Sperry Corporation Multiple weak-link SQUID
US4430790A (en) * 1980-05-20 1984-02-14 Rikagaku Kenkyusho Method of making a Josephson junction
US4415606A (en) * 1983-01-10 1983-11-15 Ncr Corporation Method of reworking upper metal in multilayer metal integrated circuits

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019046557A (ja) * 2017-08-30 2019-03-22 国立研究開発法人理化学研究所 高温超伝導線材の接続体
US11177588B2 (en) 2017-08-30 2021-11-16 Riken High-temperature superconducting wire connection assembly

Also Published As

Publication number Publication date
US4751563A (en) 1988-06-14
DE3578634D1 (de) 1990-08-16
EP0180808B1 (en) 1990-07-11
EP0180808A3 (en) 1987-05-13
JPH036675B2 (2) 1991-01-30
EP0180808A2 (en) 1986-05-14

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