JPS6112227B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention provides two types of underwater detection information on the same CRT.
The present invention relates to a device for displaying information on a display screen.

The all-round scanning sonar, which is a relatively new device, can set the beam in a desired angular direction by varying the tail, but due to the special shape of its transducer, the tail cannot detect accurately. Therefore, the angle is usually limited to 0° to 55°. For this reason, when searching directly below the ship, a method is adopted in which a separate fish finder for direct detection is installed and compensatory detection is performed within the blind spot (55° to 90°).

However, when observing the images displayed on each indicator of the sonar and detector, despite the need to accurately and quickly grasp and recognize schools of fish, there is a physical gap between each indicator (both (differences in distance between indicators, size of display screen, and magnification), making it extremely difficult and complicated for the observer.

In view of the above, the present invention provides a device that stores the above two types of information in different memories at independent write addresses, and displays them on the same screen at a common read address.

This will be explained below using the drawings.

FIG. 1 is an example of a circuit diagram of a device according to the present invention.
In the figure, 1 is a transducer for scanning sonar. Transmission and reception by the transducer 1 is performed based on the reference pulse generation circuit 2. That is, the output pulse from the reference pulse generation circuit 2 is converted by the angle signal forming circuit 3 into a signal of 1° to 360°, for example, every 1°, and then sent to the distance signal forming circuit 4 at the next stage. . The distance signal forming circuit 4
Each time the above-mentioned angle coincides with 360°, a distance signal is sent out in which the distance increases by, for example, 1 m, and when it reaches a predetermined value, it is reset to 0 m.
The distance signal is sent to a transmission pulse generation circuit 5, which generates a transmission pulse when the distance signal indicates 0 m. This transmission pulse is guided to the transducer 1 through the transmission/reception switching circuit 6, and as a result, ultrasonic pulses are transmitted in the entire circumferential direction of the specified tilt angle. The signal reflected by a school of fish and the like is received in a spiral manner by a transducer 1, passes through a transmission/reception switching circuit 6, an amplifier circuit 7, and is converted into a digital signal by an AD conversion circuit 8. Reference numeral 9 denotes a write address circuit that converts the angle signal and distance signal obtained by spiral scanning into XY address values obtained by raster scanning and sends them out. The above write address is
First, the distance is 0m and the angles are 1°, 2°, 3°,...
...changes to 360°, and the distance is 1m due to the 360° signal.
X corresponding to the above angle and distance,
The Y address value is subjected to address conversion using the X address n/2 and the Y address m/2 (FIG. 2) as base points. Therefore, the digital signal sent from the A/D conversion circuit 8 is stored at the designated write address of the storage circuit 10. FIG. 2 shows the storage addresses of the storage circuit 10, and the digital signals are stored in addresses 1 to n in the X direction and addresses 1 to m in the Y direction.

On the other hand, 1' is the transducer of the direct type fish finder,
Transmission and reception are performed based on the reference pulse generation circuit 11. The reference pulse generation circuit 11 is, for example,
Sends a depth pulse of 750Hz, that is, every 1m,
The signal is sent to the transmission trigger generation circuit 12. The transmission trigger generation circuit 12 is a 1/m frequency dividing circuit that generates a trigger pulse by the next depth pulse whose depth pulse corresponds to a predetermined depth, for example, m (m). In response to the trigger pulse, the transmission pulse generation circuit 13 sends out a transmission pulse, which is guided to the transducer 1' through the transmission/reception switching circuit 14, and transmits the ultrasonic pulse directly below. The signal reflected by a school of fish and the like is received by the transducer 1', and the signal is received by the transducer 1'.
4. The signal is passed through the amplifier circuit 15 and converted into a digital signal by the AD conversion circuit 16. A write address circuit 17 forms a write address based on the depth pulse and the transmission trigger pulse. In the above write address, first the X address is 1, the Y address changes to 1, 2, 3, ...m, and then when the Y address returns to 1, a transmission trigger consisting of a 1/m frequency dividing circuit is generated. The divide pulse from circuit 12 causes the next transmission and increments the X address by one. Then, when the X address is specified up to (n+k), the X address returns to 1 with the next transmission. At this time, old signals will be sequentially rewritten. Therefore, the above A-D conversion circuit 16
The digital signal sent out from the memory circuit 18 is stored at the write address designated as described above. That is, the memory circuit 18 is similar to the memory circuit 10.
Similarly, it has (n+k)×m addresses (FIG. 2).

The above is the memory write operation to each memory circuit 10 and 18. Next, the memory read operation will be described in detail.

Reference numeral 19 denotes a reference pulse generation circuit, and while the reference pulse generation circuits 2 and 11 have a sending pulse frequency that is related to the speed of sound in water, the standard pulse generation circuit 19 is a reference pulse generation circuit in which the sending pulse frequency is related to the speed of sound in water. The frequency is determined by setting the raster scanning speed, such as scanning the screen about 30 times per second. That is, the raster scanning signal forming circuit 20 forms sawtooth waves for X and Y deflection at a predetermined frequency based on the sending pulses from the reference pulse generating circuit 19, and this waveform causes a high-speed sweep in the X direction on the display surface of the CRT 21. Raster scanning is performed in which the image is sequentially moved in the Y direction. Reference numeral 22 denotes a read address circuit that forms and sends out read addresses based on pulses from the reference pulse generating circuit 19. The read address circuit 22 has an X address output of 1 to (n+k).
are repeated and changed, and each time 1 is output, Y
The address output is increased by 1, and the Y address output is changed by repeating 1 to m in sequence. That is, the electron beam scanning on the CRT screen and the read address are made to correspond.

Now, X sent out from the read address circuit 22
The address and Y address are guided to the memory circuits 10 and 18, but signal writing and memory reading are
As shown in FIG. 3, the cycle of pulse a is divided into two to form a write period W and a read period R, and switching operations (not shown) are performed at each address input terminal of each memory circuit 10 and 18. There is. The cycle of the pulse a may be, for example, the same as the sampling pulse cycle for AD conversion of the AD conversion circuit 8 (also not shown). Moreover, the above switching operation is performed for both memory circuits 10 and 1.
8 It may be joint time or it may be separate and independent. Furthermore, during the write period W, not only one address but also multiple addresses may be written, and during the read period R, many addresses may be stored. Usually the contents are read out. 23 leads the memory contents of the memory circuit 10 to the CRT 21 side during the period when the X address among the read addresses is 1 to n, and when the X address is (n+1).
The period from (n+k) is a counting circuit that performs X address counting in order to control switching of the changeover switch 24 so as to lead the stored contents of the storage circuit 18 to the CRT 21 side. That is, each time the count value matches 1, a high level output is sent out, and every time the count value matches (n+1), a low level output is sent out to switch the changeover switch.

Assuming that the read address value starts from X address 1 and Y address 1, in this case, the changeover switch 24 is connected to the storage circuit 10 side. First of all,
The Y address does not change, and the X address changes to 2, 3,...
...and the stored contents corresponding to the address value are read out from the storage circuit 10 and displayed on the display surface of the CRT 21. And the X address is (n
+1), the changeover switch 24 is connected to the storage circuit 18 side.

Incidentally, the adder circuit 25 operates as follows. That is, the X address value from the write address circuit 17 is added to the X address value from the read address circuit 22 and the result is led to the storage circuit 18 . For example, the X address value of the read address circuit 22 is (n+1)
Then, the X address value of the write address circuit 17 is l
When (1≦l≦n+k), the read address value X guided to the storage circuit 18 becomes n+1+l. However, the output value of the adder circuit 25 is (n+k)
After matching, it is reset and returns to 1 again, so
As an output value, (1) when n+1+l<n+k, sends n+1+l; (2) when n+1+l>n+k, sends n+1+l-
(n+k), that is, 1+l-k is sent.

In the above, when the X address of the write address circuit 17 is l, it means that the latest received signal from the fish finder is stored in the memory in the row where the X address is l. Therefore, the received signal based on the previous transmission has an X address of (l-1)
The oldest signal, that is, the received signal based on the (n+k-1) previous transmission, is stored in the memory in the row whose X address is (l+1).

The memory contents of the memory circuit 18 are read out when the X address is (1).
+(k-1), that is, n+k+l, that is, up to l; similarly, in the case of (2), 1+l-k+
(k-1), that is, up to l, so in the end, up to the l row of the X address where the latest received signal is stored is read out. In other words, on the CRT screen, the latest received signal is displayed in the part corresponding to the line with the X address (n+k) (usually at the top right corner of the screen), and the oldest received signal is displayed in the part corresponding to the line with the X address (n+1). The received and stored signals are displayed in k rows. Therefore, when the reception storage based on the current transmission is completed, (l+1) is sent as the X address from the write address 17 at the same time as the next transmission, so the part corresponding to the X address (n+k) on the screen is , the received and stored contents of the (l+1) line are displayed, and a so-called actual scene recording method can be achieved in which the display sequentially moves to the left one line at a time for each transmission. Further, by making the setting value of the counting circuit 23 variable, it is possible to display at any time up to the received signal based on the maximum (n+k) previous transmissions.

FIG. 4 shows another embodiment according to the present invention, in which 18' has a storage capacity of X address 1 to k,
This applies when the Y address is 1 to m. 26 is a subtraction circuit which sends out a value obtained by subtracting n from the X address value from the read address circuit 22, and 25' is an addition circuit configured such that the output value returns to 1 after matching with k. The circuit configuration of other parts is exactly the same as that in FIG. That is, in FIG. 4, if the X address of the read address circuit 22 now matches (n+1), the above (n+
1), the subtraction circuit 26 sends out 1.

By the way, when the X address of the write address circuit 17 is l (1≦l≦k), the latest received signal is stored in the storage circuit 18' in the l row of the X address as described above. The received signal based on the previous transmission is stored in the (l-1) row, and the received signal based on the oldest (k-1) previous transmission is stored in the (l+1) row. It turns out.

In the adder circuit 25', the output value 1 from the subtracter circuit 26 is the X address value l of the write address circuit 17.
is added as the read address value (l+
1) and guided to the storage circuit 18'. Therefore, the oldest information, the memory content of the (l+1)th line, is read out and sequentially (l+2), ..., k,
As a result of reading out the stored contents of rows 1, 2, . . . 1, the latest stored contents corresponding to row 1 are displayed at the right end of the screen. As the X address value of the write address circuit 17 changes,
It is possible to obtain an actual scene recording method in which the display signal moves to the left line by line.

As described above, in the present invention, although the scanning sonar reception signal and the direct-type fish finder reception signal are received and stored independently, they are the same.
Regarding the display on the CRT, by using a common readout address and using an extremely simple configuration, only the received signal of the fish finder can be recorded as the actual scene, allowing the user to compare and correlate the two images. It is not only extremely effective in understanding the situation, but also has excellent operability.

FIG. 5 shows an example of a scanning sonar reception signal and a fish finder reception signal displayed on a CRT screen.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. FIG. 2 is an explanatory diagram of addresses for explaining storage and read operations. FIG. 3 is a waveform diagram for explaining write and read periods. FIG. 4 shows an embodiment according to the present invention. Figure 5 is
This shows an example on a CRT screen. 9 and 17 are write address circuits, 10, 18 and 18' are storage circuits, 22 is a read address circuit,
23 is a counting circuit, 24 is a changeover switch, 25 and 25' are addition circuits, and 26 is a subtraction circuit.

Claims (1)

[Scope of Claims] 1. A scanning sonar configured to write and store a received signal based on each transmission by specifying an X, Y address corresponding to the direction and distance position of the received signal; A single beam type underwater detection device that writes and stores multiple reception signals based on the transmission by specifying X and Y addresses, and an X and Y address for reading out both of the above stored contents in synchronization with CRT raster scanning. a successive address circuit that generates a signal and displays the stored contents of the scanning sonar on the CRT; and a memory of the single beam underwater detection device when the X address value from the read address circuit is within a predetermined value range. A switching circuit that switches signals so that only the contents lead to the CRT side, and the X address value of the write address of the single beam underwater detector is added to the X address value of the above read address value to It consists of an adder circuit that uses the X address value for reading the memory of the beam type underwater detector, and uses the same read address signal to always transmit the latest display of only the memory content of the single beam type underwater detector among the above two memory contents. What is claimed is: 1. A display device for simultaneously displaying different kinds of underwater detection information, characterized in that the information is displayed sequentially from a received signal based on the received signal.