JPS61138325A - Starting method of hard copy device - Google Patents

Abstract

PURPOSE:To start a hard copy device with only a video signal by superposing a start signal on the video signal to transmit them in the host device side and detecting the start signal from the video signal to start the copying operation in the hard copy device side. CONSTITUTION:The video signal is transmitted from a shift register 4 of a host device 100 by the shift clock from a timing controller 3. Horizontal and vertical synchronizing signals are generated simultaneously by the controller 3, and they are inputted to a start signal superposing circuit 5, and the start signal is superposed. In a hard copy device 200, the video signal is inputted to a CRT7 and a hard copy control circuit 8 as it is, and superposed synchronizing signals are separated into synchronizing signals and the start signal by a start signal separating circuit 6. Synchronizing signals are inputted to the CRT7 and the circuit 8, and the start signal is inputted to the circuit 8. As the result, picture information is displayed as a soft copy on the CRT7, and the circuit 8 starts the hard copy operation and drives a printing means 9. The means 9 prints and records picture information on a recording paper 10.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a method for starting a hard copy device.

(Prior Art) A hard copy device prints and records an image displayed on a CRT (soft copy image) directly on recording paper, and uses, for example, a dot printer or an inkjet printer as a printing means. Digital image data sent to the hard copy device A is usually provided from the host device.

Conventionally, when driving this type of hard copy device, the operator presses a startup button provided on the hard copy device, or a startup signal is sent from the host device to the hard copy device, and the copy operation starts at that timing. is set to start.

(Problem to be solved by the invention) When using the former method, if there is a blinking part on the screen or if you press the startup button while the screen is updating, an incomplete ( In some cases, a problem may occur in which copies (mixed) are taken. This kind of problem occurs because the timing of the display operation on the CR7 screen and the timing when the operator presses the activation button are asynchronous.If the latter method is used, the activation signal is transmitted. This will require dedicated wiring.This is not a particular problem in cases where a dedicated hard copy connection cable can be installed, but the video signal (video signal and synchronization signal) that is being transmitted to the CRT monitor. ), in which case you are obtaining a hard copy using only the following, the latter startup method cannot be used.

The present invention has been made in view of the above points, and its purpose is to provide a method for starting a hard copy device that can give a starting signal to the hard copy device from the host device side even when only a video signal is transmitted. It is about realization.

(Means for Solving the Problems) The present invention, which solves the above-mentioned problems, sends only video signals (video signals and synchronization signals) from the host device side to the hard copy device side to make a hard copy of an image. In this case, the host device superimposes an activation signal of the hard copy device on the video signal at a predetermined timing, and the hard copy device detects the presence or absence of the activation signal from the video signal, and determines that the activation signal is present. The present invention is characterized in that it is configured such that a copy operation is started when the copy operation is performed.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an example of a system for implementing the present invention. In the figure, 100 is a host device, and 200 is a hard copy device. 1 is a refresh memory in which image data is stored; 2 is a pattern generator that outputs pattern data according to the output of the refresh memory 1; 3 is a pulse that controls the refresh timing of the refresh memory 1 and the output timing of the pattern generator 2; It is a timing controller with output. The timing controller 3 is composed of a pulse oscillation circuit that generates stable high-frequency pulses and a control logic circuit (including a frequency dividing circuit).

4 is a shift register that converts parallel data output from the pattern generator 2 into serial data using a shift clock; 5 is a start signal superimposition circuit that superimposes a start signal on the output of the timing controller 3; The host device 100 has a refresh memory 1. Pattern generator 2° timing controller 3. It is composed of a shift register 4 and an activation signal superimposing circuit 5.

Reference numeral 6 denotes a start signal separation circuit that separates the start signal from the synchronization signal sent from the post device 100, and 7 separates the synchronization signal separated by the start signal separation circuit 6 and the host device @10.
8 is a CRT that receives a video signal sent from 0 and displays (soft copy) the image information stored in refresh memory 1; A hard copy control circuit receives a copy start signal and performs timing and other controls for hard copy; 9 is a printing unit driven by the output of the hard copy control circuit 8; This is the recording paper on which information is recorded. As the printing means, various printing mechanisms such as an inkjet system, a thermal transfer system, or a wire dot system can be used.

The hard copy device 200 is composed of an activation signal separation circuit 6, a hard copy control circuit 8, and a printing means 9. The present invention will be described in detail using the apparatus configured as described above with reference to the timing chart of FIG.

Image data (including character data) stored in the refresh memory 1 is sequentially read out by control pulses (address signals) from the timing controller 3 and input to the pattern generator 2. The pattern generator 2 outputs pattern data according to input data in response to a read pulse from the timing controller 3. This pattern data (parallel data) enters the subsequent shift register 4, is converted into serial data by the shift clock from the timing controller 3, and is sequentially output from the host device @100.

On the other hand, the timing controller 3 simultaneously outputs the horizontal synchronization signal (ISYNC) and the vertical synchronization signal VSYN.
C is also generated, and these synchronization signals enter the activation signal superimposition circuit 5, where a separately input activation signal is superimposed. FIG. 3 is a diagram showing an example of a specific configuration of the activation signal superimposing circuit 5. As shown in FIG. In the figure, reference numeral 51 denotes a D-type flip-flop whose T input receives an activation signal as shown in FIG. 2 (B) as a latch pulse, and whose D input is grounded.

52 has the Q output of the flip-flop 51 as one input, and a vertical synchronizing signal VSYNC as shown in FIG. 2(A).
This is a Nant gate that receives the inverted signal of .

The vertical synchronizing signal VSYNC is inverted by passing it through an inverter 53.

54 is a first mono-multi vibrator (hereinafter abbreviated as mono-multi) that outputs a pulse with a constant width using the output of the Nant gate 52 as a trigger pulse; 55 outputs a pulse with a constant width using the first mono-multi as a trigger pulse. This is the second monomulti.

The Q output of the first monomulti 54 is given to the reset input R of the flip-flop 51 via a delay line 56. These first and second monomulti 54.55
The output pulse width of is determined by the time constant due to the added resistor and capacitor.

57 is an OR gate which receives the output of the second monomulti 55 at one input and the vertical synchronization signal VSYNC at the other input. The output of the OR gate 56 becomes the output of the activation signal superimposition circuit shown in the figure, and the hard copy device is activated! 1120
0 will be sent.

When the start signal rises at time t1 as shown in Figure 2 (B), in response to this rise, the Q output (start flag) of the flip-flop rises to 1'' as shown in Figure 2 (C). .

While the activation flag is 1'', the synchronizing signal VSYNC enters the Nantes gate 52 and passes through the gate.The vertical synchronizing signal VSYNC passing through the Nantes gate 52 has an opposite phase to the original synchronizing signal and becomes the first synchronizing signal. Enter Monomulti 54.

The first monomulti 54 is triggered by the falling edge of the vertical synchronization signal VSYNC at time t2, and as shown in FIG.
Outputs a pulse with a constant width as shown in . The Q output of this pulse enters the reset input R of the flip-flop 51 via the delay line 56 and resets the activation flag.

At time t3, when the output of the first monomulti 54 falls, the second monomulti 55 is triggered, and the monomulti 55 outputs a pulse with a constant width as shown in FIG. do. The output of the second monomulti 55 is ORed with the vertical synchronization signal @VSYNC at the subsequent OR gate 57. As a result, the output of the OR gate 57 becomes the vertical synchronizing signal VSYNC plus the activation signal, as shown in FIG. This signal (superimposed synchronization signal) is sent to the hard copy device 200 via a cable together with the video signal.
Sent to the side.

Next, the operation on the hard copy device 200 side will be explained. Of the video signals sent from the host device 100, the video signal is input as is to the CRT 7 and the hard copy control circuit 8, and the superimposed synchronization signal enters the activation signal separation circuit 6, where it is separated into a synchronization signal and a activation signal. Separated. Of these, the synchronization signal is input to the CRT 7 and the hard copy control circuit 8, and the activation signal is input to the hard copy control circuit 8. As a result, C
Image information is soft-copied to the RT 7, and the hard-copy control circuit 8 starts a hard-copy operation upon receiving the activation signal and drives the printing means 9. The printing means 9 is
Image information is printed and recorded on recording paper 10 in response to a drive signal from hard copy control circuit 8.

FIG. 4 is a diagram showing an example of a specific configuration of the activation signal separation circuit 6. The activation signal separation circuit 6 is a retriggerable mono-multi bi-break (hereinafter simply referred to as mono-multi).
61 and two AND gates 62 and 63. The Q output of the monomulti 61 enters one input of an AND gate 62, and the other input of the AND gate 62 receives the superimposed synchronization signal as is. The Q output of the monomulti 61 enters one input of an AND gate 63, and the other input of the AND gate 63 receives the superimposed synchronization signal as is, as in the case of the AND gate 62. The first pulse P1 of the superimposed synchronization signal is a synchronization signal, and the monomulti 61 is triggered at the falling edge of this pulse P1, as shown in FIG.
Although a pulse with a predetermined width is output as shown in (g), this pulse does not affect the output of the AND gates 62 and 63.

The next pulse P2 is also a synchronization signal, and the monomulti 61 is triggered by the fall of this pulse P2, and falls to 1" again as shown in FIG. 2 (g). Then, the Q output of the monomulti 61 s P before falling to “0” P after 2 pulses
The monomulti 61 is retriggered at the fall of the third pulse (in this case, the activation signal). Therefore, the Q output of the mono multi 61 remains in the "1" state until time t4.The AND gate 62 is opened only while the Q output of the mono multi 61 is "1".During this period, the superimposed synchronization signal is It passes through the AND gate 62.As a result, only the activation signal passes through the AND gate 62.On the other hand, since the AND gate 63 is gated by the Q output of the monomulti 61, only the synchronization signal passes through the AND gate 63. In this way, the AND gate 62 outputs the reproduction activation signal, the AND gate 63 outputs the reproduction synchronization signal, and the activation signal and the synchronization signal are separated.

In the above description, a case has been described in which the activation signal is superimposed on the vertical synchronization signal VSYNC of the video signal, but the present invention is not limited to this, and the activation signal is superimposed on the horizontal synchronization signal H8YNC. Good too.

Moreover, it is not necessary to superimpose the activation signal on the synchronization signal, and the activation signal may be superimposed on the video signal. In this case, the configuration differs slightly depending on whether it is superimposed within the display area or outside the display area, so it will be explained separately for each case.

(1) When superimposed within the display area, a specific display pattern is output to a predetermined position on the screen to generate an activation signal.

Generally, the display area of a display device is often divided into several areas (date, date, etc.).

(time display line, key manual code display line, etc.), there are places where it is never displayed (character by character). By outputting a specific display pattern to this display position, the hard copy side determines that a startup request has been made and starts operation. This method does not require any hardware modification on the host device side.

(2) When the image is superimposed outside the display area The above method (1) cannot be used when the screen is fully used. Therefore, there is a method of superimposing a specific pattern of a video signal, which means an activation signal, outside the display area. In this method, the signal to be superimposed in the method described in the embodiment is changed from a synchronization signal to a video signal.

In either method, various operating modes (number of copies, copy size, etc.) for the hard copy device can be specified by varying the superimposed activation signal.

(Effects of the Invention) As described in detail above, according to the present invention, for a hard copy device that receives only a video signal and makes a hard copy, by superimposing a start signal on a video signal and sending it out, The hard copy device can be activated from the host device side without increasing wiring. According to the present invention, since the activation signal can be sent in synchronization with the synchronization signal, a still image can be hard-copied even if it is a blinking image.

[Brief explanation of drawings]

FIG. 1 is a configuration block diagram showing an example of a system for implementing the present invention, FIG. 2 is a timing chart showing the operation of each part, FIG. 3 is a diagram showing a specific example of the configuration of the activation signal superimposition circuit, FIG. 4 is a diagram showing a specific example of the configuration of the activation signal separation circuit. 1...Flip 70 tube 2...Pattern generator 3...Timing controller 4...Shift register 5...Start signal superimposition circuit 6
...Start signal separation circuit 7...CRT 8...Hard copy control circuit 9...Printing means 10...Recording paper 51...Flip-flop 52...NAND gate 54.55.61...・Mono multi-by break 56・
...Delay line 57...OR gate 62.63...AND gate 100...Host device 200...Hard copy device

Claims (1)

[Claims] When performing a hard copy of an image by sending only a video signal (video signal and synchronization signal) from the host device side to the hard copy device side, the host device side sends a start signal for the hard copy device at the timing determined by the video signal. A method for starting a hard copy device, characterized in that the hard copy device side detects the presence or absence of a start signal from the video signal, and starts a copy operation if the start signal is present. .