JPS61138331A - Data reception control system - Google Patents

Abstract

PURPOSE:To reduce the memory capacity of a terminal machine or the like by providing a means which writes control information for transmission control procedures in a buffer for data reception. CONSTITUTION:A controller 1 receives data D2 from a controller 3 and stores it in an area B2 of a buffer memory 10. When detecting that the residual capacity of the memory 10 is small, a buffer control part 5 sets a signal NG to a register 12. next, data D3 is transmitted from the controller 3 and is stored temporarily in an area B3 of the memory 10, and the buffer control part 5 transmits the signal NG in the register 12 to a processor 4. After writing control information RNR in the area B3 of the memory 10, namely, the area where data D3 is already written, the processor 4 starts a transmission control part 6. The control part 6 transmits control information RNR in the area B3 of the memory 10 to a line 2 to report the impossibility of reception to the controller 3. Thus, a memory for control information write is unnecessary.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a control device 2 that receives data from another device.
The present invention relates to an improvement in a data reception control method for notifying a partner device of information about insufficient memory in a device.

7. When the remaining capacity of the receive buffer in the control device that receives data becomes small, the other device K.

We will notify you of this, but in that case, we will rarely take measures to secure the capacity of the buffer memory A=m.

[Conventional technology]

A conventional example will be explained with reference to FIG. FIG. 2 is a diagram illustrating the example.

The control device 1 is connected to another control device 3 via a line 2, and data transmission and reception is involved between the two. The controller device 1 has a built-in processor 4. HDLC (HLgh) is the control procedure for transmitting and receiving data.
-1 level Data Link Control and X.25 (CCITT standard). A case where data is transmitted from one control device 3 to the control device 1 using such a control procedure will be explained as an example.

The control device 3□1 first activates the transmission control unit 6 for the control device IK.The transmission control unit 6 takes out the response signal UA in the memory and sends it from the boat unit 8 to the time #2. The control device 3 that receives this sends the data DI-
Transmission of Dn is started.

In the control device l, the received data D1 is first sent to the reception control unit 9 via the boat unit 8 and stored in the buffer memory lO. This data storage control is performed by the buffer management section 5.

That is, data D is in the fJ area B indicated by the address pointer A in the first item of the memory management table 11.
r K 1 is stored. In this way, Ba Sofa Management Department 5
uses the memory management table 11 to manage the Ba Nofa memory 10. When there is sufficient remaining capacity in the backup memory IO, the buffer management section 5 sends a signal OK to the transmission control section 6. Upon receiving this, the transmission control unit 6 transmits the data to the memory 7.
The control information RR (Receive Read 7) is taken out and transmitted to line 2.

The control device 1.3 that receives this control unit @RR continues to send out data D. Control device 1 that received this
Now, the received data D, is processed by the same means as above,
Area B of Sofa Memory 10! Store in.

Continuing to receive the next data D, this is transferred to areas B and V.
When the remaining area of the buffer memory 10 becomes small when the data is stored, the buffer management section 5 sends a signal NG to the transmission control section 6. Upon receiving this, the transmission control unit 6 receives control information RNR (Receive Not R) in the memory 7.
ecd7) and sends it to the line 2 to notify the control device 3 that it cannot be received (buffer capacity is insufficient).

Note that the control information UA, RR, and RNR in the memory 7 are set in advance by the transmission value advance processor 4.

[Problem that the invention seeks to solve]

As is clear from the above, the conventional method has the problem of requiring a memory area for transmission control.

[Means for solving problems]

The above problem can be solved by a system in which a first device, a second device, and a second device are connected by a line, which has a buffer memory and a means for issuing control information indicating that the remaining capacity of the buffer memory has reached a predetermined value. (a means for storing the control information in the buffer memory; and a means for storing the control information in the buffer memory;
the first processing device is provided with means for sending data to the second device, and the first processing device stores received data from the second device in the buffer memory; When the capacity reaches a predetermined value, after the second received data received following the received data is written into the remaining area of the buffer memory, the control information is written to the remaining area, and the written control information is written to the remaining area of the buffer memory. This problem is solved by the data reception control method of the present invention, which sends control information to the second device to notify the second device that reception is not possible.

[Effect]

As described above, since the present invention has means for writing control information for transmission control procedures into a data reception buffer, it is possible to save memory capacity of a terminal device, etc.

〔Example〕

The present invention will be explained below with reference to the drawings. FIG. 1 is a diagram illustrating an embodiment of the present invention.

FIG. 1 shows a state in which the control device 1 receives data D from the control device 3 and stores it in the area B2 of the buffer memory 0.

At this point, the buffer management section 5 detects that the remaining capacity of the buffer memory 10 has decreased, and the control device 3 continues to send data D.

This data D is temporarily stored in area B of the buffer memory IO, but at this time, the buffer controller 5
The signal NG in register 2 is sent to processor 4.

The processor 4 writes one piece of power control information RNR to the area Bs of the buffer memory 0, that is, the area where the data D has already been written, and then writes it to the transmission control unit 6.
Start. The transmission control unit 6 sends the control information RNR of the area B of the buffer memory 10 to time IIJ2,
The control device 3 is notified of the unreceivable state.

In this manner, the present invention does not require a memory for writing control information.

〔Effect of the invention〕

The present invention has the advantage that the buffer memory of the terminal can be used effectively.

4. Brief explanation of aspects FIG. 1 is a block diagram explaining one embodiment of the present invention, FIG. 2 is a block diagram explaining a conventional example.
3 is a control device, 2 is a line, 4 is a processor, 5 is a buffer control section, 6 is a transmission control section, 7 is a memory, 8 is a port section,
9 is a reception control unit, 10 is a buffer memory, 11 is a buffer management terminal, -pull, and 12 is a register.

Claims (1)

[Claims] In a system in which a first device and a second device are connected by a line, the system includes a buffer memory and a means for emitting control information indicating that the remaining capacity of the buffer memory has reached a predetermined value. the first processing device, comprising means for storing in a buffer memory and means for sending the stored control information to the second device, and storing received data from the second device in the buffer memory; teeth,
When the remaining capacity of the buffer memory reaches a predetermined value, the first device writes second received data received following the received data into the remaining area of the buffer memory, and then controls the control. A data reception control system characterized in that information is written in the remaining area, and the written control information is sent to the second device to notify that reception is impossible.