JPS61176807A - Inspection of pattern - Google Patents

Inspection of pattern

Info

Publication number
JPS61176807A
JPS61176807A JP60016539A JP1653985A JPS61176807A JP S61176807 A JPS61176807 A JP S61176807A JP 60016539 A JP60016539 A JP 60016539A JP 1653985 A JP1653985 A JP 1653985A JP S61176807 A JPS61176807 A JP S61176807A
Authority
JP
Japan
Prior art keywords
pattern
partial image
inspected
defect
cut out
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60016539A
Other languages
Japanese (ja)
Other versions
JPH058762B2 (en
Inventor
Yukio Matsuyama
松山 幸雄
Keiichi Okamoto
啓一 岡本
Mitsuzo Nakahata
仲畑 光蔵
Shunji Maeda
俊二 前田
Hisafumi Iwata
岩田 尚史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60016539A priority Critical patent/JPS61176807A/en
Publication of JPS61176807A publication Critical patent/JPS61176807A/en
Publication of JPH058762B2 publication Critical patent/JPH058762B2/ja
Granted legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Image Processing (AREA)
  • Image Analysis (AREA)
  • Length Measuring Devices By Optical Means (AREA)

Abstract

PURPOSE:To detect a micro-defect with high reliability without generating a pseudo defect by cutting out a pattern to be inspected by using a small window, matching the position of the partial image within a model pattern and detecting the rate of dissidence. CONSTITUTION:The pattern 5 to be inspected is cut out as the partial image 7 by using the window consisting of, for example, 3X3 picture elements centering at the certain picture element 7A and the model pattern 6 is cut out as the partial image 8 by using the window of, for example, 7X7 picture elements centering at the picture element 7B corresponding to the picture element 7A. The partial image 7 is moved in the partial image 8 and both partial patterns are so matched in position as to minimize the number of the dissidence picture elements. The dissidence of the pattern 5 to be inspected and the part A of the model pattern 6 is thereby absorbed and the generation of the pseudo defect is prevented. On the other hand, the dissident picture elements remain even if the partial image 7' is matched in postion in whatever way within the partial image 8'. A defect 9 is thus detected.

Description

【発明の詳細な説明】 (発明の利用分野〕 本発明はパターンの検査方法に係シ、特にプリント基板
および半導体集積回路ウエノ・−1または、その製造用
マスクの回路パターンの欠陥検査等に用いるに適したパ
ターン検査方法に関する。
[Detailed Description of the Invention] (Field of Application of the Invention) The present invention relates to a pattern inspection method, and is particularly used for defect inspection of circuit patterns of printed circuit boards and semiconductor integrated circuits Ueno-1 or masks for manufacturing the same. This invention relates to a pattern inspection method suitable for.

〔発明の背景〕[Background of the invention]

第5図(4)および(b)は集積回路製造用マスクの1
部分の拡大図で、(4)は欠陥のない完全なパターン1
、(A)はパターンの突起2a 、断tI!A2b、孤
立欠陥2Gを含む欠陥パターン3を示す。従来このよう
なマスクパターンの欠陥を検査する方法とし【、被検査
マスク上の同一パターンを有する2個のチップパターン
を同時に撮像し、一方のパターンを手本パターン、他方
のパターンを被検査パターンとして両者を比較し、両者
の差異がある部分を欠陥として判定する方法が実施され
ている。
Figures 5 (4) and (b) show one of the masks for manufacturing integrated circuits.
In the enlarged view of the part, (4) is a complete pattern 1 with no defects.
, (A) is the protrusion 2a of the pattern, cut tI! A2b shows defect pattern 3 including isolated defect 2G. Conventionally, the method of inspecting defects in such mask patterns is to simultaneously image two chip patterns having the same pattern on the mask to be inspected, and use one pattern as a model pattern and the other pattern as the pattern to be inspected. A method has been implemented in which the two are compared and a portion where there is a difference between the two is determined to be defective.

しかし、被検査マスク上の同一パターンを有する2個の
チップパターンを同時に撮像し、それぞれを手本パター
ンおよび被検査パターンとして両者の位置ずれを完全に
除去して瀘ね合わせても、(G)図に示す如く、手本ノ
(ターン1(破巌にて弐示)と被検査パターン3(笑厭
にて禰示)は、欠陥部分2cL〜20以外でも完全には
一致しな−0 その原因としては久に述べるような理由が考えられる。
However, even if two chip patterns having the same pattern on a mask to be inspected are simultaneously imaged, each is used as a model pattern and a pattern to be inspected, and the positional deviation between the two is completely removed and filtered, (G) As shown in the figure, the sample pattern (turn 1 (shown in the second part) and the pattern to be inspected (shown in the second part) do not match completely except for the defective parts 2cL to 20. Possible causes include the following reasons.

(1)  露元、現輩、エツチング等のマスク製作退場
において2つのパターンが欠陥とはならない程度の微妙
な差異を持って形成さnる0 (2)  比奴すべき2つのパターンを撮揮する光学系
のアンバランスおよびマスクを載せたステージの走行誤
差等によシ図形歪みが宏しる。
(1) Two patterns are formed with subtle differences to the extent that they are not defects during mask production such as original, current, etching, etc. (2) Two patterns that should be compared are photographed. The shape distortion increases due to the unbalance of the optical system and the running error of the stage on which the mask is placed.

このため、(d)に示す如く、手本パターン1と被検査
パターン3の不一致部分には、2a〜2Gの欠陥以外に
、パターン−郭部の不一致によりて生ずる擬似欠陥4が
富まれることになる。
Therefore, as shown in (d), in addition to the defects 2a to 2G, the mismatched portion between the model pattern 1 and the pattern to be inspected 3 is enriched with pseudo defects 4 caused by mismatch between the pattern and the contour. become.

この擬似欠陥4を除去する方法として、従来たとえば特
公昭54−37475号公報で述べられている方法があ
る。この方法では、擬似欠陥を除去するために、手本パ
ターンと被t< IE パターンの不一致部分を欠陥候
補として検出すると同時に、手本パターンおよび被検査
パターンの双方からそれぞれパターンの輪郭部分を抽出
する。
As a method for removing this pseudo defect 4, there is a conventional method described in, for example, Japanese Patent Publication No. 54-37475. In this method, in order to remove false defects, a mismatched part between the model pattern and the pattern to be inspected is detected as a defect candidate, and at the same time, the contour parts of the pattern are extracted from both the model pattern and the pattern to be inspected. .

そして、手本パターンおよび被検査パターンそれぞれの
輪郭部分から共通輪郭部分を抽出し、8U紀欠陥候補の
うち、該共通輪郭部分に属する奄のを擬似欠陥として除
去する。
Then, a common contour portion is extracted from the contour portions of each of the model pattern and the pattern to be inspected, and among the 8U defect candidates, those belonging to the common contour portion are removed as pseudo defects.

しかしこの方法では、#145図(6)に示すパターン
の断f@24および孤立欠陥2Gは検出できるがパター
ン4111祁部に生じる微小な突起24は前記共通輪郭
部分に横われてしまい検出することが1―になる。また
、このような微小な欠1If1を検出するために、パタ
ーン検出lll1素プイズ°を小さくすると一検査速度
が遅くなって、装置のスルーグツトが低下してしlうこ
とになる。
However, with this method, although the cut f@24 and isolated defect 2G of the pattern shown in #145 (6) can be detected, the minute protrusion 24 that occurs at the scar of pattern 4111 lies across the common contour part and cannot be detected. becomes 1-. Furthermore, in order to detect such a minute defect 1If1, if the pattern detection lll1element size is made small, the inspection speed will be slowed down and the throughput of the apparatus will be reduced.

(発明の目的〕 本発明の目的は、上記従来技術の課題を解決し、砿小な
欠陥を擬似欠陥t−発生することなく高い信頼度で検出
できるパターン検査方法を提供するにある。
(Object of the Invention) An object of the present invention is to provide a pattern inspection method that solves the above-mentioned problems of the prior art and can detect small defects with high reliability without generating pseudo-defects.

〔発明の概要〕[Summary of the invention]

上記の目的を連成するために、本発明は被検f/”1タ
ーンを数画素X数画素の小さなウィンドウを用いて切出
し、該部分画像を手本パターン同で位置付せし不一致量
を検出することを特畝とする。こnによプパターンの微
小な差^および位置ずれの影臀が除去でき擬似欠陥の発
生が抑止できる。
In order to achieve the above objectives, the present invention cuts out one turn of the test f/'' using a small window of several pixels x several pixels, positions the partial image with the same model pattern, and calculates the amount of discrepancy. The special feature is to detect the ridges.This allows the slight differences in the tape pattern and the effects of positional deviations to be removed and the occurrence of false defects to be suppressed.

〔発明の芙施例〕[Example of invention]

以下本発明の一実施例を図に基づき説明する。 An embodiment of the present invention will be described below based on the drawings.

第1図(4)〜(−は不@明の原城図で、(&)図はB
部にパターンの突起による欠陥9ktむ被検査パターン
5と手本パターン6を重ね盆せた状′!At″示し、(
b)図は被検査パターン5のム部2s xsII&Ii
累のウィンドウを用−て切出した部分=m7(r−)図
は手不パターン6の同じくム部を787i1ii案のウ
ィンドウを用−て切出した部分画像8を示し、(d)図
は被検査パターン5の部分−1績7と手本パターン6の
部分画像8を不一致画lIg数が最小となるように位置
合せした状mt示す。(e)−(す図は(1〜ld)図
と同様、被検査パターン5および手本パターン6のB部
につ−て切出した部分画i17 、部分画像8および該
部分画像の不一致画票数が最小となるように位置合せし
た状態を示す。
Figure 1 (4) - (- is a map of the original castle of Ming Dynasty, (&) is B
The pattern 5 to be inspected, which has 9kt of defects due to protrusions of the pattern, and the model pattern 6 are stacked on top of each other! At'', (
b) The diagram shows the square portion 2s xsII & Ii of the pattern to be inspected 5
The part cut out using the 787i1ii window = m7 (r-) The figure shows a partial image 8 of the same part of the hand pattern 6 cut out using the window of the 787i1ii plan, and the figure (d) shows the part to be inspected. Part-1 result 7 of pattern 5 and partial image 8 of model pattern 6 are aligned so that the number of mismatched images is minimized. (e) - (S figure is (1 to ld)) Similar to the figure, the partial image i17, partial image 8, and the number of unmatched images of the partial image cut out from part B of the pattern to be inspected 5 and the model pattern 6 This shows the state in which the positions are aligned so that the distance is minimized.

(&)図に示す如く、被検奎パターン5と手本/ぐター
ン6を重ね合せその不一致部分を欠陥として検出した場
合、その慣出績釆にはB部の欠陥9と同時にCsのパタ
ーンずれが含tf′Lる0しかし、Csのパターンずれ
は前述したように、本来欠陥として検出すべきでない擬
似欠陥である。この擬似欠陥の発生を防止するため、(
b)図に示す如く被検査パターン5をある画業7Aを中
心とする例えば5X3iai素のウィンドウを用−て部
分iiijw7として切出すとともに、(C)図に示す
如く手本パターン6を、画素7ムに対応する&X7Bを
中心に例えば7部7画素のウィンドウを用いて部分画1
1!8として切出す。セし文部分画像7を部分画像8内
で動かし、(d)図に示す如く両部分画像の不一致一本
数が最小となるように位置合せを行う。このウィンドウ
を用−た位置合せ後の不一致部分を欠陥として検出する
ことにより 、(a)図に示す被検査パターン5および
手本パターン6のム部における不一致は吸収することが
でき績似欠陥の発生が防止できる。
(&) As shown in the figure, when the pattern 5 to be inspected and the pattern 6 are superimposed and the mismatched part is detected as a defect, the pattern Cs is displayed at the same time as the defect 9 in part B. However, as described above, the pattern deviation of Cs is a pseudo defect that should not be detected as a defect. In order to prevent this pseudo defect from occurring, (
b) As shown in the figure, the pattern to be inspected 5 is cut out as a part iiijw7 using a window of 5 x 3iai elements, for example, centered on a certain pixel 7A, and (C) the sample pattern 6 is cut out as a part iiijw7 as shown in the figure. For example, use a window of 7 parts and 7 pixels to create partial image 1 centered on &X7B corresponding to
Cut out as 1!8. The section sentence partial image 7 is moved within the partial image 8, and alignment is performed so that the number of mismatched lines between the two partial images is minimized as shown in FIG. By detecting the mismatched portion after alignment using this window as a defect, the mismatch in the gap portion of the pattern to be inspected 5 and the model pattern 6 shown in the figure (a) can be absorbed, and similar defects can be detected. Occurrence can be prevented.

また同様の位置合せを被検査パターン全面に対して行う
ことにより、(−3図に示した0部のパターンずれによ
る不一致はナベて、吸収することができ一似欠陥の発生
が防止できる。これに対し、(4)図に示したB部のパ
ターンは、(e)図に示す部分画gR7を、(f)−に
示す部分子lj像8円でいかに位置合せt行なっても(
t)図に示す如く不一致分画が残るため、欠陥9は検出
することができる。被検査パターン5を切出す5部5画
素のウィンドf)−rイズを例えは5部5画本にすれば
位置合せ補正m囲は±1−素となプ、例えば9部9画素
にすれば位置合せ補正範囲は±3画素となる。このよう
に手本パターン6を切出すワイントウサイズを変更する
ことによシ、被検査パターンと手本パターンの位置合せ
補正範囲を変更することができる。
Furthermore, by performing the same alignment over the entire surface of the pattern to be inspected, the mismatch due to the pattern shift of the 0 part shown in Figure 3 can be absorbed and the occurrence of similar defects can be prevented. On the other hand, the pattern of part B shown in (4) Figure (e) no matter how much the partial image gR7 shown in Figure (e) is aligned with the partial image lj image 8 circle shown in (f) - is (
t) Defect 9 can be detected because a mismatched fraction remains as shown in the figure. For example, if the window f)-r size of 5 pixels and 5 pixels to cut out the pattern 5 to be inspected is set to 5 pixels and 5 pixels, the alignment correction m range will be ±1-element, for example, 9 pixels and 9 parts. In this case, the alignment correction range is ±3 pixels. By changing the wine toe size at which the model pattern 6 is cut out in this manner, the alignment correction range between the pattern to be inspected and the model pattern can be changed.

第2図は以上説明した本発明によるバター/検査方法の
一実施例のブロック図である。図において10は5X3
切出口路で、被検査パターン5から5部5画素の部分画
像を切出す。11は7X7切出回路で、手本パターン6
から7部7画累の部分画像を切出す。12−1乃至12
−25はSXS切出回路で前記7X7切出回路11によ
って手本パターン6から切出した7部7画業の部分画像
から更に25個の3部3画巣の部分画源を切出す。13
−1乃至13−25は排他的論理和で、前記3X5切出
回路10からの出力と前記3X3切出回路12−1乃至
12−25からの出力に対しそれぞれ谷画業毎の排他的
−理和を演算する。
FIG. 2 is a block diagram of an embodiment of the butter/inspection method according to the present invention described above. In the diagram, 10 is 5X3
A partial image of 5 parts and 5 pixels is cut out from the pattern to be inspected 5 at the cutting exit path. 11 is a 7X7 cutout circuit, model pattern 6
A partial image of 7 parts and 7 strokes is cut out from the image. 12-1 to 12
-25 is an SXS cutting circuit which further cuts out 25 partial image sources of 3 parts and 3 strokes from the partial image of 7 parts and 7 strokes cut out from the model pattern 6 by the 7X7 cutting circuit 11. 13
-1 to 13-25 are exclusive ORs, which are exclusive ORs for each Tanigagyo for the output from the 3X5 cutout circuit 10 and the output from the 3X3 cutout circuits 12-1 to 12-25. Calculate.

−理和回路14−1乃至14−25は前記排他的論理和
13−1乃至15−25から各出力毎の論理和を演算し
、−埋積15では、前記論理和回路14−1乃至14−
25の出力の論理積を演算する。
- The logical sum circuits 14-1 to 14-25 calculate the logical sum for each output from the exclusive logical sums 13-1 to 15-25, and - In the filling circuit 15, the logical sum circuits 14-1 to 14 −
The logical AND of the outputs of 25 is calculated.

この−埋積の出力が欠陥信号16となる。The output of this -filling becomes the defect signal 16.

第3図は、第2図の7X7切出回路11の出力から3×
3切出回路12−1乃至12−25にょ夛25個の3部
3画業部分画像を切出す動作の説明図である。(’)図
は7X7切出回路11にょシ切出された部分画像a t
’ 、(J)図は、部分画像8からさらに切出された2
5個の3部3画素部分画琢8−1乃至8−25を示す。
Figure 3 shows 3x
3 is an explanatory diagram of the operation of cutting out 25 3-part, 3-art work partial images from 3-cutting circuits 12-1 to 12-25; FIG. (') The figure shows a partial image cut out by the 7X7 cutout circuit 11.
', (J) shows 2 images further cut out from partial image 8.
Five 3-part, 3-pixel sub-pixels 8-1 to 8-25 are shown.

図示の即く、25−aの5部3画業部分画像8−1乃至
8−25は、7部7画木部分画像8の中心5X5画紫の
各画業が中心となるように切出される。
As shown in the figure, the 5 part 3 painting partial images 8-1 to 8-25 of 25-a are cut out so that each 5x5 painting purple part of the 7 part 7 painting tree partial image 8 is centered.

このようにして手本パターン6から切出した25個の3
部3画素部分画像8−1乃至8−25を、第2図に示す
即く被検査パターン5がら切出したSXS画素部分画像
7と比較し、各mg毎の排他的論理和を演算するととに
よシ、部分画像7を部分画像8内で位置合ぜすることが
できる。排他的論理和13−1乃至13−25の出方の
うち少なくとも1つの出力がすべて“01であるなら前
記位置合せによプ、被検蓋パターン5と手本パターン6
が完全に一致したことを示しFa埋積15の出力である
欠陥信号16も“0′″となる。これに対し、部分画像
7を部分画像8内でどのように位置合せしても不一致画
凧が生じる場合は、論理積15の出力である欠陥信号1
6は′″11となシ、欠陥が検出できる。
In this way, 25 3's were cut out from the model pattern 6.
Comparing the part 3 pixel partial images 8-1 to 8-25 with the SXS pixel partial image 7 cut out from the inspected pattern 5 shown in FIG. 2 and calculating the exclusive OR for each mg. Yes, partial images 7 can be aligned within partial images 8. If at least one of the outputs of the exclusive ORs 13-1 to 13-25 is all "01", the alignment is performed, and the test lid pattern 5 and the model pattern 6 are
The defect signal 16, which is the output of the Fa buried layer 15, also becomes "0'", indicating that the values are completely matched. On the other hand, if a mismatched picture kite occurs no matter how the partial image 7 is aligned within the partial image 8, the defect signal 1 which is the output of the logical product 15
6 is ``11'' and defects can be detected.

以上の説明は被検査パターン5および手本パターン6が
ともに2値画像である場合を例としているが、被検査パ
ターン5および手本パターン6がともに多値画像であっ
ても同様の効果を得ることができる。
The above explanation takes as an example the case where both the pattern to be inspected 5 and the model pattern 6 are binary images, but the same effect can be obtained even if the pattern to be inspected 5 and the model pattern 6 are both multivalued images. be able to.

第4図は本発明によるパターン検査方法の他の実施例の
ブロック図で、被検査パターンおよび手本パターンがと
もに多値画像である場合を示す。第2図と同様、まず被
検査パターン5′か・ら3X3切出回路10′によp5
85画累部分画儂7を切出すとともに、手本パターン6
′から7X7切出回路11′によシフ×7画素部分画伽
8″を切出す。該7X7画累部分直像8から3×3切出
回路12−1乃至12−25によ925個の6×3画素
部分画像を切出した後、該部分画像と前記部分画像7 
との各分画毎の差分を差分回路17−1乃至17−25
によシ演算する。次に咳差分回路17−1乃至17−2
5の出力の絶対値を絶対値回路18−1乃至1 B −
25で演算した後、該出力を積分回路19−1乃至19
−25にて積分する。この積分回路19−1乃至19−
25の出力は、被検歪パターン5の部分画像7 を、手
本パターン60部分画律B内で位置合せした時の各位置
における画像の不一致量を表わす。このため、部分画像
7が部分画像8 内のある位置で不一致量が零となシ、
完全に位置合せができた場合、該位置に対応する積分回
路19の出力は零となる。しかし通常多値画像同志の位
置合せは、不一致量が完全に零となることは少なく不一
致量がある値以下の場合は位置合せができたものと見な
す必要がある。そこで積分回路19−1乃至19−25
の出力を比較回路20−1乃至20−25によシある定
数21と比較し、!IJ記積分回路の出力が定数21よ
シ大き一場合は“1″をそうでない場合は“0″′を出
力するようにする。
FIG. 4 is a block diagram of another embodiment of the pattern inspection method according to the present invention, showing a case where both the pattern to be inspected and the model pattern are multivalued images. As in FIG. 2, first, from the pattern to be inspected 5', p5 is
At the same time as cutting out the 85-stroke part picture 7, model pattern 6
A 7 x 7 pixel partial image 8'' is cut out from the 7 x 7 cut-out circuit 11'. From the 7 x 7 pixel partial direct image 8, 925 pieces are cut out by the 3 x 3 cut-out circuits 12-1 to 12-25. After cutting out a 6×3 pixel partial image, the partial image and the partial image 7
Difference circuits 17-1 to 17-25 calculate the difference between each fraction.
Calculate accordingly. Next, cough differential circuits 17-1 to 17-2
Absolute value circuits 18-1 to 1B-
25, the output is sent to integration circuits 19-1 to 19.
Integrate at −25. These integrating circuits 19-1 to 19-
The output 25 represents the amount of image mismatch at each position when the partial image 7 of the distortion pattern 5 to be tested is aligned within the partial image rule B of the model pattern 60. Therefore, if partial image 7 has a mismatch amount of zero at a certain position within partial image 8,
When the alignment is complete, the output of the integrating circuit 19 corresponding to the position becomes zero. However, when aligning multivalued images, the amount of mismatch is unlikely to be completely zero, and if the amount of mismatch is less than a certain value, it is necessary to consider that alignment has been achieved. Therefore, the integration circuits 19-1 to 19-25
The output of ! is compared with a certain constant 21 by the comparison circuits 20-1 to 20-25, and ! If the output of the integrator circuit written in IJ is greater than the constant 21, it outputs "1"; otherwise, it outputs "0"'.

そして該比較回路の出力の論理積を一理積回路15で演
算することによシ、前記被検査I(ターン5′の部分画
像7″が前記手本・くターン6′の部分画像8″内で位
置合せができた場合“0″、どのように位置合せを行っ
ても不一致量がある値以上となる場合“げとなる欠陥信
号16を得ることができる。
Then, by calculating the logical product of the outputs of the comparison circuit in the logical product circuit 15, the partial image 7'' of the test target I (turn 5') is changed to the partial image 8'' of the sample turn 6'. A defect signal 16 can be obtained which is "0" if alignment is achieved within the range, and "fail" if the amount of mismatch exceeds a certain value no matter how the alignment is performed.

以上詳細に説明したように、本実施例によれば被検査パ
ターンの大きさが、手本I(ターンと多少異なっていて
も、擬似欠陥を発生することなく、微小な欠陥を高い信
頼度で検出することが可能となる。また、本実施例によ
れば、検出画素ナイズと同程度の大きさの微小な欠陥を
検出することができるため、高速に被検査〕(ターンを
撮像することができ、検査時間の大幅な短縮に効果があ
る。
As explained in detail above, according to this embodiment, even if the size of the pattern to be inspected is slightly different from the pattern I (turn), it is possible to detect minute defects with high reliability without generating false defects. In addition, according to this embodiment, it is possible to detect minute defects with a size comparable to the detection pixel size, so it is possible to image the turn at high speed. This is effective in significantly shortening inspection time.

〔発明の効果〕〔Effect of the invention〕

以上、詳細に説明したように、本発明によれば、高速で
信頼性の高いパターン欠陥検査装置を実現することがで
きるので、例えば集積回路製造用マスクパターン検査工
程の効犀を向上しひいては工C等の一品の信頼性向上、
原価低減等に顕著な効果が得られる0
As described in detail above, according to the present invention, it is possible to realize a high-speed and highly reliable pattern defect inspection device, thereby improving the effectiveness of, for example, the mask pattern inspection process for integrated circuit manufacturing, Improving the reliability of products such as C, etc.
Remarkable effects on cost reduction etc.0

【図面の簡単な説明】[Brief explanation of drawings]

881図は本発明によるパターン検査方法の原理を示す
図、第2図は第1図の原理に基づく/<ターン検査方法
の一実施例のブロック図、第5図はその3X3切出回路
の動作を示すブロック図、第4図は本発明によるパター
ン検査方法の他の実施例のブロック図、第5図は従来の
Iくターン検査方法の説明図である。 5.5・・・被検査ノくターン 6.6・・・手本パターン io 、 io 、 12−1乃至12−25 、12
−1乃至12−25・・・3X5切出回路 11.11・・・7×7切出回路 13−1乃至15−25・・・排他的論理和14−1乃
至14−25・・・論理和 15・・・論理積 16・・・欠陥
Figure 881 is a diagram showing the principle of the pattern inspection method according to the present invention, Figure 2 is a block diagram of an embodiment of the turn inspection method based on the principle of Figure 1, and Figure 5 is the operation of the 3x3 cutting circuit. FIG. 4 is a block diagram of another embodiment of the pattern inspection method according to the present invention, and FIG. 5 is an explanatory diagram of the conventional I-turn inspection method. 5.5... Turn to be inspected 6.6... Model pattern io, io, 12-1 to 12-25, 12
-1 to 12-25...3x5 cutout circuit 11.11...7x7 cutout circuit 13-1 to 15-25...exclusive OR 14-1 to 14-25...logic Sum 15...Logic product 16...Defect

Claims (1)

【特許請求の範囲】 1、検査対象となるパターンと、該パターンに対応した
手本パターン或は前記検査対象となるパターンと同一の
形状を有するパターンとを比較して前記検査対象となる
パターンの欠陥を検出するパターン検査方法において、
前記検査対象となるパターンを微小なウインドを用いて
2次元画像として切出し、該切出した部分画像を前記比
較対象となるパターンに対し位置合せを行い、該位置合
せ後のパターンの不一致量から前記検査対象となるパタ
ーンの欠陥を検出することを特徴とするパターン検査方
法。 2、特許請求の範囲第1項記載のパターン検査方法にお
いて、前記2次元画像として切出された信号を2値化す
ることなく差分を求め、該差分の絶対値を積分した信号
を比較して、前記不一致量を算出するパターン検査方法
[Claims] 1. The pattern to be inspected is compared with a model pattern corresponding to the pattern or a pattern having the same shape as the pattern to be inspected, and the pattern to be inspected is determined. In a pattern inspection method for detecting defects,
The pattern to be inspected is cut out as a two-dimensional image using a minute window, the cut out partial image is aligned with the pattern to be compared, and the inspection is performed based on the amount of mismatch between the patterns after alignment. A pattern inspection method characterized by detecting defects in a target pattern. 2. In the pattern inspection method according to claim 1, a difference is obtained without binarizing the signal cut out as the two-dimensional image, and a signal obtained by integrating the absolute value of the difference is compared. , a pattern inspection method for calculating the mismatch amount.
JP60016539A 1985-02-01 1985-02-01 Inspection of pattern Granted JPS61176807A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60016539A JPS61176807A (en) 1985-02-01 1985-02-01 Inspection of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60016539A JPS61176807A (en) 1985-02-01 1985-02-01 Inspection of pattern

Publications (2)

Publication Number Publication Date
JPS61176807A true JPS61176807A (en) 1986-08-08
JPH058762B2 JPH058762B2 (en) 1993-02-03

Family

ID=11919068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60016539A Granted JPS61176807A (en) 1985-02-01 1985-02-01 Inspection of pattern

Country Status (1)

Country Link
JP (1) JPS61176807A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167980A (en) * 1986-12-30 1988-07-12 Narumi China Corp Method and device for defect inspection of printed wiring pattern or the like
JPH02236406A (en) * 1989-03-10 1990-09-19 Fujitsu Ltd Method for inspecting mask pattern
JPH03167407A (en) * 1989-11-28 1991-07-19 Kao Corp Apparatus for inspecting deviation of display pattern
US7844916B2 (en) 2004-12-03 2010-11-30 Sony Computer Entertainment Inc. Multimedia reproducing apparatus and menu screen display method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157505A (en) * 1983-02-28 1984-09-06 Hitachi Ltd Pattern inspecting device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157505A (en) * 1983-02-28 1984-09-06 Hitachi Ltd Pattern inspecting device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167980A (en) * 1986-12-30 1988-07-12 Narumi China Corp Method and device for defect inspection of printed wiring pattern or the like
JPH02236406A (en) * 1989-03-10 1990-09-19 Fujitsu Ltd Method for inspecting mask pattern
JPH03167407A (en) * 1989-11-28 1991-07-19 Kao Corp Apparatus for inspecting deviation of display pattern
US7844916B2 (en) 2004-12-03 2010-11-30 Sony Computer Entertainment Inc. Multimedia reproducing apparatus and menu screen display method

Also Published As

Publication number Publication date
JPH058762B2 (en) 1993-02-03

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