JPH02236406A - Method for inspecting mask pattern - Google Patents

Abstract

PURPOSE:To shorten time required for inspecting a mask pattern and to improve the processing efficiency of an inspection device by setting a defect detection reference corresponding to the design pattern references of respective mask pattern areas every inspection objective area. CONSTITUTION:The mask pattern 11 has two or more mask pattern areas A1 - An and the design pattern references R1 - Rn of the respective mask pattern areas A1 - An are different. Then, the respective mask pattern areas A1 - An are decided as the inspection objective areas B1 - Bn and the defect detection references epsilon1 - epsilonn corresponding to the design pattern references R1 - Rn of the respective mask pattern areas A1 - An are set every inspection objective area B1 - Bn. Based on the defect detection references epsilon1 - epsilonn, the defect of the mask pattern 11 is detected every inspection objective area B1 - Bn.

Description

DETAILED DESCRIPTION OF THE INVENTION (Summary) This invention relates to a method for inspecting a mask pattern, particularly for a mask pattern created according to two or more design rules depending on the functional content of a semiconductor element, etc. The purpose is to eliminate defect discrimination processing, reduce mask pattern inspection time, and improve processing efficiency of inspection equipment. Inspection of mask patterns with different standards, each of the mask pattern areas is defined as an area to be inspected, and a defect detection standard corresponding to a design pattern standard of each of the mask pattern areas is set for each area to be inspected; [Industrial Application Field] The present invention relates to a mask pattern inspection method, which includes detecting defects in a mask pattern for each inspection target area based on the defect detection criteria. Depending on the functional content of the semiconductor element, etc.
The present invention relates to a method of inspecting a mask pattern created using two or more design rules.

In recent years, as semiconductor integrated circuit devices have become ultra-fine and highly functional, one mask pattern includes many mask pattern areas created based on two or more design pattern standards.

By the way, defect detection in mask patterns created using different design pattern standards is performed by repeatedly inspecting the entire surface of the mask pattern many times while changing the defect detection standards. Therefore, as a result of inspecting the mask pattern area using defect detection standards that do not match the mask pattern area, it is necessary to perform a process to identify pseudo-defects that are determined to be defects, which requires a lot of inspection time. There is a problem in that the throughput of the device decreases.

Therefore, there is a need for an inspection method that can efficiently inspect mask patterns in a short time.

[Prior Art] FIGS. 8(a) and 8(b) are explanatory diagrams relating to a conventional mask pattern inspection method.

FIG. 2A shows a diagram related to a mask pattern of a semiconductor integrated circuit device.

In the figure, a mask pattern 1 consists of mask pattern regions A1 to A3 having different design pattern bases ttR1 to R3, respectively.

The mask pattern area A1 is, for example, a region zM in which a butt electrode or the like provided at the outer periphery of the semiconductor integrated circuit device is formed, and the defect detection criterion is ε]. Similarly, the mask pattern area A2 is a selection gate transistor formation area, etc., and the defect detection criterion is c2. Further, the mask pattern area A3 is a memory element formation area, etc., and the defect detection criterion is ε3. The defect detection standard in this case is ε1
〉a2>63.

FIG. 2B shows a flowchart related to the mask pattern inspection method.

In the figure, first, in step PI, the mask pattern area A is
Regardless of I-A3, the entire surface of mask pattern 1 is inspected based on defect detection standard ε1. At this time, a true defect in mask pattern area A1 is detected, and mask pattern areas A2 and A3 are detected as pseudo defects. Detected as a defect.

Next, in step P2, the entire surface of the mask pattern 1 is inspected similarly based on the defect detection criterion ε2. On this occasion,
A true defect in the mask pattern area A2 is detected, and a defect in the mask pattern area A3 is detected as a pseudo defect.

Furthermore, in step P3, based on the defect detection criterion ε3,
Inspect the entire surface of the mask pattern.

After that, the selection of doubtful defects is performed using Stenobu P4. At this time, regarding the mask pattern area A1, the mask pattern areas A2, A. Similarly, for the mask pattern area A2, remove the pseudo defects in the mask pattern area A3, and remove the pseudo defects in each mask pattern area A1.
A true defect was found from ~A3.

[Problems to be Solved by the Invention] Therefore, every time the defect detection criteria ε1, ε2, and ε3 change for one mask pattern 1, the entire surface inspection of the mask pattern is repeated.

For this reason, the integration of semiconductor integrated circuit devices has increased. For higher density, design pattern standard R1. R2. As R3... and the defect detection criteria εl1 ε2, ε3... increase, the number of times the entire surface of the mask pattern is inspected also increases. Furthermore, an increase in the number of inspections increases the inspection time and the process for identifying pseudo defects.

As a result, there is a problem that the inspection time for one mask pattern becomes long, the throughput of the inspection apparatus decreases, and efficient inspection cannot be performed.

The present invention was created in response to the problems of the prior art, and eliminates the process of identifying false defects in mask patterns, thereby reducing mask pattern inspection time and improving processing efficiency of inspection equipment. The purpose of the present invention is to provide a mask pattern inspection method that enables the inspection of mask patterns.

[Means to solve the problem]

FIGS. 1(a) and 1(b) show diagrams of the principle of the mask pattern inspection method of the present invention.

The method includes inspecting a mask pattern 1l having two or more mask pattern areas A1 to An and having different design pattern standards R1 to Rn for each mask pattern jJ area A1 to An, Area A
1 to An are defined as the inspection target h■ area Bl-Bn, and the design pattern standards R1 to 1 for each of the mask pattern areas Al to An are
Defect detection criteria ε1 to εn corresponding to Rn are set for each of the inspection target areas 81 to Bn, and the defect detection criteria ε1 to εn are set for each of the inspection target areas 81 to Bn.
The present invention is characterized in that defects in the mask pattern 11 are detected for each of the inspection target regions 81 to Bn based on n, thereby achieving the above object.

[Effect]

According to the present invention, mask pattern defects are detected for each of the inspection target areas 81 to Bn based on the defect detection criteria ε1 to εn set for each of the inspection target areas 81 to Bn.

Therefore, the inspection target area B corresponding to the defect detection criterion εi
For inspection target areas Bn other than i, defect detection criteria e
Defect detection based on t is not performed. Therefore, it is possible to omit the conventional wasted inspection time when inspecting the mask pattern in the inspection target area where the defect detection base εi and the inspection target area Bn do not correspond.

This makes it possible to eliminate the conventional process of determining pseudo defects caused by differences in defect detection groups γV. [Example] Next, an example of the present invention will be described with reference to the drawings.

2 to 7 are diagrams for explaining a mask pattern inspection method according to an embodiment of the present invention, and FIG. 2 shows a configuration diagram of a mask pattern inspection apparatus according to each embodiment of the present invention.

In the figure, 1l is semiconductor collection 1! It is a mask pattern for circuits, etc., and as shown in FIG.
-R3 is different for each mask pattern area A1 to A3, and 12 is an image acquisition means, such as a photoelectronic imaging device that acquires an image of the mask pattern 11. Reference numeral 13 denotes an image storage means, which stores image data obtained by binarizing the image of the mask Bakun 1l.

Denoted at 14 is a defect detection/determination means, which compares/determines the defect detection reference data and the acquired image data to find a defect.

15 is an inspection data setting means, and the mask pattern 11
Each mask pattern area A1 to A3 is the inspection target area B1.
~B3 or each mask pattern area A1~l\3
Defect detection standards ε1 to ε3 corresponding to the design pattern standards R1 to R3 are set for each of the inspection target areas 81 to B3.

Reference numeral 16 denotes an inspection data storage means, which stores coordinate data for dividing each mask pattern area, and data of defect detection criteria ε1 to ε3 corresponding to each design pattern reference R1 to R3.

17 is a stage control means, which controls the mask pattern l1 based on the coordinate data from the inspection data setting means 15.
It drives the stage on which the

These constitute an apparatus that directly detects defects from, for example, actually manufactured mask patterns 11. In addition,
A device for detecting defects at a stage before actually manufacturing the mask pattern 11, that is, at a design data stage, will be described later with reference to FIG.

FIG. 3 is an explanatory diagram of mask patterns of each embodiment of the present invention.

In the figure, the mask pattern 11 is, for example, a design pattern base Yp. Mask patterns with different Rl to R3? ITi area A. Consisting of l-A3, defect detection standard ε
ε3 is different for each mask pattern area At-A3.

For example, in the mask pattern 1l, the mask pattern area A1 has coordinates a (xi.yl), b(x3, yl
). This is an area other than the area surrounded by d(x3.y3) and c(xiy3). In addition, the mask pattern area A2 similarly includes the marker a(xi.yl). b (x3
．． yl). f (x3, y2), e (x2, y2).
This is the area surrounded by g (x2.y3) and c (xi, y3). Furthermore, mask pattern area A
3 is the locus 4Me (x2, y2), r (x3, y2
), d (x 3, 3' 3) and g (x2, y3
) is the area surrounded by.

FIG. 4 is a flowchart relating to the mask pattern inspection method according to the first embodiment of the present invention.

Here, for the mask pattern area A1, for example, the data of the design pattern standard R1 is 6 [μm], the data of the defect detection standard and 1 is 5 [μm], and similarly for the mask pattern area A2, the data of the design pattern standard R2 is 3
[μm], data of defect detection standard ε2 is 2.5 [μm]
Assume that for the mask pattern region A3, the data of the design pattern reference R3 is 1 [μm], and the data of the defect detection reference ε3 is l [μm].

In the figure, first, the steno knob Pi stores coordinate data of the mask pattern 1l, design pattern reference data, and defect detection reference data in the inspection storage means 16. At this time,
Coordinate data a for dividing mask pattern areas A1 to A3
(xi. yl), b (x3. yl), c (
xi. y3). d (x3, y3). e (x2.
y2), r (x3. y2) and g (x2. y3
) and data 6.3.1 of design pattern standards R1 to R3
(μm) and data of defect detection criteria 81 to ε35.
2.5. 1 (μm) is stored.

Next, in step P2, each mask pattern area A1
-A3 are defined as inspection target areas 81-B3. At this time, as shown in FIG. 5(a), the inspection target area B1 has coordinates a (xi. yl). b(x3.y1),
This is a region other than the region surrounded by d (X3, y3) and c (xi, y3), and this is the defect detection criterion t1.
will be subject to inspection. Similarly, the inspection target area B2 has the coordinates a (XI, yl) b (x3. yl),
r (x3, y2). g (x2.y3
) and c (xi.y3), and this is the area to be inspected by the defect detection standard ε2. Furthermore, the inspection target area B3 has coordinates e(x2.y2). r (
x3, y2), d (x3, y3) and g (x2, y
3), and this is the area to be inspected by the defect detection standard ε3.

Next, each mask pattern area At-A3 is
Defect detection criteria ε1 to ε3 corresponding to the design pattern criteria R1 to R3 are set for each of the inspection target areas 81 to B3. At this time, when specifying the inspection target area B1, for example, the inspection data setting stage 15 sends coordinate data a (xl, yl), b (x3, yl) to the stage control means 17.
), d(x3, y3), and c(xi, y3), and sends the data 5 (μm) of the defect detection standard εl to the defect detection/judgment means 14. In addition, in step P4, regarding the inspection target area B1, Defects are detected using defect detection criteria and 1. At this time, the image acquisition stage 12 acquires an image only for the mask pattern area A1 without inspecting areas other than the mask pattern area AI, Data 5 of the defect detection standard ε1 is obtained by the defect detection judgment step 14 through the image storage stage l3.
Defect detection is performed based on [μm]. For example, as shown in FIG. 5(b), if there is a pattern in the mask back area A1 in which the inter-pattern corner is erroneously close to 4 [μm] or 2 (μm), this is treated as defect E11. It can be found as E12.

Next, in step P5, defects are detected in the inspection target area B2 using the defect detection standard C2. At this time, the image acquisition step 12 acquires an image only for the mask pattern area A2 without inspecting areas other than the mask pattern area A2, and in accordance with the processing content of step P4, The defect detection criterion ε2 is determined by the defect detection judgment means 14.
Defect detection is performed based on the data of 2.5 [μm]. For example, if there is a pattern in the mask pattern area A2 whose pattern spacing is approaching 2 [μm] by mistake,
This can be found as defect E2. Thereafter, in step P6, defects are detected in the inspection target area B3 using the defect detection standard ε3. At this time, the image acquisition means 12 acquires an image only for the mask pattern area A3 without inspecting areas other than the mask pattern area A3, and similarly to the processing contents of step P4, the defect detection judgment means 14 Accordingly, defect detection is performed based on data 1 [μm] of defect detection standard ε3. For example, if there is a pattern in the mask pattern area A3 in which the pattern interval is erroneously approaching 0.9 [μm], this can be detected as a defect E3 as shown in FIG. 5(b).

FIGS. 5(a) and 5(b) are diagrams supplementing the flowchart of the first embodiment, and FIG. 5(a) shows the inspection target areas 81 to B3 of the mask pattern l1 and the defect detection standard ε.
1 to ε3.

Further, FIG. 3B is a diagram illustrating the defect inspection results of the mask pattern 11.

In the figure, Ell El2E2 and E indicated by arrows
3 is a defect, a design mistake. This is a portion where the pattern spacing is lower than the defect detection standards ε1 to ε3 due to a design defect or the like.

FIG. 6 is an explanatory diagram of the mask pattern inspection method of the second embodiment.

In the figure, the difference from the first embodiment is that in the second embodiment, when the image acquisition means 12 scans the entire surface from the top to the bottom of the page via the stage control means 17, the mask pattern areas A1 to Every time A3 changes, the defect detection standard and 1 to ε3 are also changed to perform defect detection. Here, assuming that the coordinates 3-g for dividing the mask pattern areas A1 to A3 and the defect detection criteria ε1 to ε3 are the same as in the first embodiment, first, for the acquired image data of the inspection target area B1, Defect detection is performed based on data 5 (μm) of defect detection standard ε1. Next, when the stage on which the mask pattern 11 is placed is moved and the image acquisition means 12 enters the mask pattern area B2, the acquired image data is adjusted to the defect detection standard ε2 of 2.5 [μm]. Based on this, defect detection is performed. At this time, the change from inspection target area Bl to 82 is as follows:
Coordinate data a − for dividing the mask pattern areas A1 to A3 set in advance by the inspection data setting means 15
This is done based on H. This coordinate data a-g is set in a register or the like, and when the count value of the stage movement data of the stage control stage control 17 matches the count value of the register, for example, the stage is temporarily stopped and the image acquisition stage is started. Settings such as the magnification of the 12 lens systems are changed each time. Similarly, when the image acquisition means 12 scans the inspection target area B3, the image acquisition data acquired in the inspection target area B3 is based on the data 1 [μm] of the defect detection standard ε3.
Defect detection is performed.

As a result, by scanning the image acquisition means 12 once over the entire inspection target area, defects El 1, E12, E2, and E3 as shown in FIG. 5(b) can be detected in a shorter time than in the first embodiment. It becomes possible to detect.

FIGS. 7(a) to 7(d) are block diagrams of a mask pattern inspection apparatus according to another embodiment of the present invention, and FIG.
Mask pattern 11a on the substrate. This shows an apparatus configuration for detecting defects by comparing 1 lb.

Components with the same name as the mask pattern device shown in FIG. 2 have the same functions, so their explanation will be omitted.

Thereby, defects can be detected based on the mask pattern inspection method of Example 1.2. FIG. 2B shows an apparatus configuration for comparing the mask pattern 11 on the substrate with the design data of the magnetic tape storage means 20. The design data read from the magnetic tape storage means 20 is converted into image display data by the data conversion means 21 and stored in the image storage means. As a result, the same figure (a
), in the defect detection and judgment means 18,
Defects can be detected based on the mask pattern inspection method of the embodiment.

FIG. 2C shows an apparatus configuration for converting the design data of the magnetic tape storage means 20 and detecting defects.

According to this, defects included in the design data can be removed before the mask pattern is created, as shown in FIGS.

FIG. 2D shows an apparatus configuration for converting both design data of the magnetic tape storage means 20a and 20b, comparing image display data, and detecting defects.

According to this, both design data can be compared in a short time and defects included in the design data can be found.

In this way, according to the first embodiment, the inspection target area 8
Data of defect detection criteria ε1 to ε3 set for each of B1 to B35. 2.5. I C μm], and the defects Elf, E12, E2, and E3 of the mask pattern 11 are detected for each inspection target region Bl-83.

Therefore, defect detection based on the data 5 [μm] of the defect detection criterion ε1 is not performed for the inspection target regions B2 and B3 other than the inspection region Bl corresponding to the data 5 [μm] of the defect detection criterion ε1. Therefore, the defect detection criterion ε1,
Inspection target areas B2 and B that do not correspond to the inspection target area B1
Regarding the mask pattern inspection in step 3, it is possible to omit the wasted inspection time required in the conventional method.

This makes it possible to eliminate the conventional process of determining suspected defects caused by differences in the defect detection criteria c1 to ε3.

〔Effect of the invention〕

As described above, according to the present invention, defects in mask patterns can be detected for each inspection target area associated with defect detection criteria.

Therefore, even as semiconductor integrated circuit devices become more highly integrated and densely packed, and design pattern standards and defect detection standards increase, it becomes possible to inspect the entire mask pattern in a short time.

This greatly contributes to improving the processing efficiency of the mask pattern inspection apparatus since the inspection time for one mask pattern can be shortened.

[Brief explanation of drawings]

Figure 1(a). (b) is a principle diagram of the mask pattern inspection method of the present invention; FIG. 2 is a block diagram of a mask pattern inspection apparatus according to each embodiment of the present invention; and FIG. FIG. 4 is an explanatory diagram of the mask butterfly, and FIG. 4 is a flowchart of the mask pattern inspection method according to the first embodiment of the present invention. (b) is a diagram supplementing the flowchart of the first embodiment of the present invention; FIG. 6 is an explanatory diagram of the mask pattern inspection method of the second embodiment of the present invention; (d) is a block diagram of a mask pattern inspection apparatus according to another embodiment of the present invention, and FIG. 8(a), (
b) is an explanatory diagram relating to a conventional mask pattern inspection method. (Explanation of symbols) 1l...mask pattern, A1-An... mask pattern area, B1-Bn...
- Inspection target area, R1 to Rn...Design pattern reference, ε1 to εn...Defect detection reference.

Claims (1)

[Claims] Having two or more mask pattern areas (A1 to An),
Inspection of a mask pattern (11) in which the design pattern standards (R1 to Rn) of each mask pattern area (A1 to An) are different from each other, and each of the mask pattern areas (A1 to An) is inspected as an inspection target area (B1). ~Bn), and defect detection standards (ε1~Bn) corresponding to the design pattern standards (R1~Rn) of each of the mask pattern areas (A1~An)
εn) is set for each of the inspection target areas (B1 to Bn), and defects in the mask pattern (11) are detected for each of the inspection target areas (B1 to Bn) based on the defect detection criteria (ε1 to εn). A mask pattern inspection method characterized by: