JPS61199933U - - Google Patents
Info
- Publication number
- JPS61199933U JPS61199933U JP8194885U JP8194885U JPS61199933U JP S61199933 U JPS61199933 U JP S61199933U JP 8194885 U JP8194885 U JP 8194885U JP 8194885 U JP8194885 U JP 8194885U JP S61199933 U JPS61199933 U JP S61199933U
- Authority
- JP
- Japan
- Prior art keywords
- solid state
- state relay
- display means
- absence
- relay according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000007787 solid Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
Description
第１図はこの考案に係るソリツドステートリレ
ーの構成を概略的に示す図、第２図は上記リレー
の回路構成例を示す図、第３図〜第５図はこの考
案の他の構成例を概略的に示す図である。
１……ソリツドステートリレー、１１……パツ
ケージ、２……入力回路、４……フオト・カプラ
、２１，２２……入力端子、３１……ゼロクロス
回路、３２……出力回路、３３……スナバー回路
、４１，４２……出力端子、４３〜４６……ダイ
オード、４７……抵抗、４８，５１……発光ダイ
オード。
FIG. 1 is a diagram schematically showing the configuration of a solid state relay according to this invention, FIG. 2 is a diagram showing an example of the circuit configuration of the relay, and FIGS. 3 to 5 are other configuration examples of this invention. FIG. 1... Solid state relay, 1 1 ... Package, 2... Input circuit, 4... Photo coupler, 21, 22... Input terminal, 31... Zero cross circuit, 32... Output circuit, 33... Snubber circuit, 41, 42... Output terminal, 43-46... Diode, 47... Resistor, 48, 51... Light emitting diode.
Claims (1)
を特徴とするソリツドステートリレー。 (2) 上記表示手段は、入力信号の有無を表示す
るものであることを特徴とする実用新案登録請求
の範囲第１項記載のソリツドステートリレー。 (3) 上記表示手段は、出力信号の有無を表示す
るものであることを特徴とする実用新案登録請求
の範囲第１項記載のソリツドステートリレー。[Claims for Utility Model Registration] (1) A solid state relay characterized by being equipped with a display means for displaying the operating status. (2) The solid state relay according to claim 1, wherein the display means displays the presence or absence of an input signal. (3) The solid state relay according to claim 1, wherein the display means displays the presence or absence of an output signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8194885U JPS61199933U (en) | 1985-05-31 | 1985-05-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8194885U JPS61199933U (en) | 1985-05-31 | 1985-05-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61199933U true JPS61199933U (en) | 1986-12-15 |
Family
ID=30629217
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8194885U Pending JPS61199933U (en) | 1985-05-31 | 1985-05-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61199933U (en) |
-
1985
- 1985-05-31 JP JP8194885U patent/JPS61199933U/ja active Pending
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