JPS61226843A - Device for detecting interruption abnormality - Google Patents

Abstract

PURPOSE:To solve easily the trouble due to an interruption abnormality by judging that the interruption processing is abnormal when the active condition time of the counted interruption request signal is longer than the prescribed time. CONSTITUTION:When an interrupting signal S is supplied from the external part to an interrupting processing control part 13, an interruption request signal RS is outputted to a microprocessor 11 and counted by a counter 21. When a counted value (n) set beforehand is counted, a counter output signal OS is outputted, a gate 23 is closed and the counting of the counter 21 is stopped. After that, when an initial resetting signal LS is inputted, a counter resetting signal CLS clears the counter 21 through a gate 24. When an active condition time T of the signal RS is longer than the counted value (n), namely, when the interruption request is not accepted and an interruption acknowledging signal AS is not outputted from the processor 11, or when the signal RS continues to be outputted more than necessary, the signal OS is outputted. Consequently, it can be judged that abnormalities occur at the interruption processing function.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention provides a processing device having an interrupt processing function,
The present invention relates to an improvement of an interrupt abnormality detection device that detects an abnormality in interrupt processing.

[Technical background of the invention and its problems] Generally, in a processing device that performs data processing based on a processor program, an interrupt is used to temporarily stop the currently executing process and interrupt a high-priority processing program. It has built-in processing functions. By executing this interrupt processing program, various processes such as power supply abnormality detection, timer function, and data transmission/reception are performed.

FIG. 3 is a block diagram showing the configuration of a conventional processing device of this type, and FIG. 4 is a diagram showing a timing chart of interrupt processing in the processing device. In Figure 3, 1
Reference numeral 1 denotes a microprocessor as a main body of the processing device having an interrupt processing function, and sends processing data D1 to a data bus 12 based on a processing program. 13 is an interrupt processing control section made of an LSI, which receives various interrupt signals 81, 82...Sn supplied from the outside.
In response, the interrupt request signal R8 is output to the microprocessor 11 to control the interrupt processing function in the microprocessor 11.

It has become.

Now, if a predetermined interrupt signal S is supplied to the interrupt processing control unit 13 at time t1, an interrupt request signal R8 is output from the interrupt processing control unit 13 to the microprocessor 11 at time t2. Then, at time t3, the microprocessor 11 outputs an interrupt acknowledge signal As to the interrupt processing control section 13. In the interrupt processing control section 13, upon receiving the interrupt acknowledge signal As, the interrupt vector corresponding to the interrupt signal S (the first storage address of the interrupt processing program stored in the program memory (not shown) of the microprocessor 11) is set. The corresponding code) B is determined and output to the data bus 12. At this time, the output of the interrupt request signal R8 is automatically stopped. On the other hand, in the microprocessor 11, an interrupt processing program is executed based on the interrupt vector B, and interrupt processing data D2 is output to the data bus 12. In this way, interrupt processing is performed.

By the way, in the above processing device, if some trouble occurs in the interrupt processing function of the microprocessor 11,
Even if the interrupt request signal R8 is supplied, the interrupt acknowledge signal As may not be output at a predetermined timing. In this case, since the interrupt request is not accepted normally, not only the interrupt processing corresponding to this interrupt request signal R8 cannot be executed normally, but also the interrupt processing control unit
3, the interrupt acknowledge signal As is not input at the predetermined timing, and the interrupt request signal R8 becomes HiQh.
There is a problem in that the level continues to be held, making it impossible to execute all interrupt processing corresponding to the newly generated interrupt signal S during this time. Furthermore, due to trouble in the interrupt processing control section 13, the interrupt request signal R8 may continue to be output for a longer period than necessary. The microprocessor 11 is
Detects the rising edge of the interrupt request signal R8, and sends the interrupt acknowledge signal AS during a period during which the interrupt acknowledge signal As corresponding to the interrupt request signal R8 can be normally sent 2 When the interrupt request signal R8 maintains the Hioh level , in order to receive the interrupt vector B from the interrupt processing control unit 13, if the interrupt request signal R8 continues to be output in this manner as described above, during this time the microprocessor 11 will:
There is a problem in that all interrupt processing corresponding to the interrupt signal S input to the interrupt processing control section 13 cannot be executed.

Therefore, in order to solve the above problem, it is necessary to monitor the process from the generation of an interrupt request until the interrupt processing is performed. However, conventional processing devices are not equipped with such a monitoring means and cannot detect abnormalities in the interrupt processing function.

(Object of the Invention) An object of the present invention is to provide an interrupt abnormality detection device that can detect an abnormality in an interrupt processing function and easily solve troubles caused by interrupt abnormalities in a processing device.

[Summary of the invention]

The present invention uses a counting means to count the active state time of an interrupt request signal output when requesting a processing device having an interrupt processing function to execute an interrupt process, and the counted active state time of the interrupt request signal. If the time is longer than a preset predetermined time, the determining means determines that there is an abnormality in the interrupt processing.

[Embodiments of the invention]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Note that the same parts as in FIG. 3 are denoted by the same reference numerals, and detailed explanations will be omitted. In FIG. 1, 20 is an interrupt abnormality detection circuit, which includes a counter 21, an inverting gate 22 . It is composed of gates 23 and 24 and a signal detection section 25.

The counter 21 receives an interrupt request signal R output when requesting execution of an interrupt process from the interrupt process control unit 13.
8 (active state at Ht ab level), and outputs a counter output signal 08 (active state at Hic>h level) when a preset predetermined count value is counted. It has become something to do. The gate 23 is a gate that takes the AND of the counter output signal O8 inverted by the inverting gate 22, the clock signal CK, and the interrupt request signal R8.
The output of No. 3 is supplied to the counter 21 as a counter clock signal O8. Also, gate 2
4 is the interrupt request signal R8 and the initial reset signal LS.
The output of this gate 24 is supplied to the counter 21 as a counter reset signal CLS (active at LOW level).

The signal detection section 25 detects the rising edge of the counter output signal O8 or the H+Qh level, and determines whether there is an abnormality in the interrupt processing function.

Next, the operation of the interrupt abnormality detection circuit 20 will be explained.

FIG. 2(a) shows 1WI when the interrupt request signal R8 is in the active state.
3 is a diagram showing a timing chart when T exceeds a preset count In of a counter 21. FIG. At time t11, a predetermined interrupt signal S is sent from the outside to the interrupt processing control unit 13.
is supplied, an interrupt request signal R8 is sent from the interrupt processing control section 13 to the microprocessor 11 at time t12.
is output. Then, the gate 23 becomes open and the counter clock signal C8 is output to the counter 21.
It is counted. In the counter 21, when a preset count value n is counted, a counter output signal O8 is outputted at time t13. Then, the gate 2
3 is in the closed state, and the counter 21 stops counting. Thereafter, when the initial reset signal LS is input at time t14, the counter reset signal CLS is inputted via the gate 24.
is output to the counter 21, and the counter 21 is cleared.

By the way, the counter output signal O8 is output when 11T is longer than the count value n when the interrupt request signal @R8 is in the active state.In other words, the interrupt request is not accepted and the interrupt acknowledge signal AS is It is output when there is no output from the microprocessor 11, or when the interrupt request signal R8 continues to be output longer than necessary.Therefore, when the counter output signal O8 is output, an abnormality occurs in the interrupt processing function. Therefore, by detecting the rising edge of the counter output signal O8 or the high level in the signal detection section 25,
Abnormalities in the interrupt processing function can be detected.

FIG. 2(b) shows the case where the active state time of the interrupt request signal R5 does not exceed the count value n (count value of the counter 21 = n
-i, where i≧2) is a diagram showing a timing chart. The process up to time t12 is the same as the case shown in FIG. When the interrupt request signal R8 becomes LOW level at time 15, the counter reset signal CLR is output to the counter 21 via the gate 24, and the counter 21 is cleared. Therefore, since the active state time T of the interrupt request time R8 does not exceed the preset count value n,
The counter output signal O8 is not output from the counter 21. In this case, the microprocessor 11 outputs the interrupt acknowledge signal AS, and it can be determined that the interrupt request has been normally accepted.

Thus, according to this embodiment, the rising edge or Hi
By detecting that it is at the gh level, it is possible to detect the occurrence of an abnormality in the interrupt processing function. the result,
If an error occurs in interrupt processing, for example, by inputting the counter output signal @O8 to the initial reset signal (not shown) of the microprocessor 11 and the initial reset signal LS of the counter 21, the processing can be restarted from the beginning and the interrupt error will be resolved. You can get out of the situation. By doing so, it is possible to prevent the microprocessor 11 from remaining in a state where it cannot process interrupts.

Note that the present invention is not limited to the above embodiments.

For example, in the embodiment described above, an abnormality in the interrupt processing function is detected by detecting the rising edge of the counter output signal O8 or the high level of the counter output signal O8 in the signal detection unit 25, but the counter output signal O8
8 may be supplied to the microprocessor 11 as a non-maskable interrupt signal - (NMI) to generate a non-maskable interrupt, thereby detecting an abnormality in interrupt processing. Furthermore, although the embodiment described above shows the case where the microprocessor 11 is used as the main body of the processing device, other processors may be used. It goes without saying that various other modifications can be made without departing from the gist of the present invention.

〔Effect of the invention〕

As described in detail above, according to the present invention, the active state time of the interrupt request signal output when requesting a processing device having an interrupt processing function to execute interrupt processing is counted by the counting means, If the active state M time of the interrupt request signal is longer than a preset predetermined time, the determination means determines that there is an abnormality in the interrupt processing function. It is possible to provide an interrupt abnormality detection device that can easily solve troubles caused by interrupt abnormalities in the device.

[Brief explanation of the drawing]

FIG. 1 and FIGS. 2(a) and 2(b) are diagrams showing one embodiment of the present invention, FIG. 1 is a block diagram showing the configuration of the same embodiment, and FIGS. 2(a) and (b) 3 is a diagram showing a timing chart for explaining the operation, and FIGS. 3 and 4 are diagrams showing a conventional structure and a timing chart for explaining the operation. 11...Microprocessor, 12...Data bus, 13...Interrupt processing III 1111 section, 2o...
・Interrupt abnormality detection circuit, 21... Counter, 22...
- Inversion gate, 23°24...gate, 25...signal detection section. Applicant's agent Patent attorney Shikihiko Suzutsuta Figure 1 Wholesale 112 Figures (a) (b)

Claims (1)

[Claims] a counting means for counting the active state time of an interrupt request signal output when requesting a processing device having an interrupt processing function to execute an interrupt process; and a counting means for counting the active state time of the interrupt request signal counted by the counting means. 1. An interrupt abnormality detecting device comprising: a determining means for determining that an interrupt processing is abnormal if a preset predetermined time period is exceeded.