JPS6123687B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to an audio power amplifier, and more particularly to a power amplifier in which the biasing means of the power amplifier element is improved. An example of a conventional power amplifier of this kind is the first
There is one configured as shown in the figure. That is, input resistors 2a and 2b are connected to the audio input signal terminal 1, respectively.
The output terminal of one of the voltage amplifiers 2a is a constant voltage that determines the idling current as will be described later. NPN type and PNP form the power amplifier 6 via the sources 4 and 5, respectively.
It is connected to each base terminal of a pair of power transistors Q1 and Q2. The commonly connected emitter terminals of these pair of power transistors Q1 and Q2 are grounded via a load resistor R _L and two series connected feedback resistors which determine the voltage gain of the power amplifier 6. It is grounded via 7 and 8. A connection point between both feedback resistors 7 and 8 is connected to the other input terminal of the voltage amplifier 3a. The respective collector terminals of the power transistors Q1 and Q2 are connected to power amplifiers 11 for power supply driving, which will be described later.
Floating power supplies 9 and 10 for the power amplifier 6 connected so that the output voltage of the power amplifier 6 becomes the reference voltage.
connected to. Further, the output terminal of the other voltage amplifier 3b is
Each base terminal of a pair of NPN type and PNP type power transistors Q3 and Q4 forming a power supply driving power amplifier 11 for driving the power supplies 9 and 10 of the power amplifier 6 according to an input signal. connected to. The commonly connected emitter terminals of both power transistors Q3 and Q4 are connected to the connection point of power supplies 9 and 10 for the power amplifier 6, and determine the voltage gain of the power amplifier 11 for driving the power supply. 2
It is grounded through feedback resistors 12 and 13 connected in series. A connection point between both feedback resistors 12 and 13 is connected to the other input terminal of the voltage amplifier 3b. and both power transistors Q
Each collector terminal of Q3 and Q4 is connected to the power supply 14 of the power supply driving power amplifier 11 whose connection point is grounded.
15, respectively. Next, the operation of the power amplifier configured as described above will be explained. First, the input audio signal e applied to the input terminal 1 is applied to both voltage amplifiers 3a and 3b via input resistors 2a and 2b, respectively, and is appropriately amplified. Therefore, both voltage amplifiers 3a and 3b
A pair of power transistors Q1 and Q2 forming the power amplifier 6 and a pair of power transistors Q3 and Q4 forming the power supply driving power amplifier 11 are driven according to the output signal from the A desired output signal can be obtained between both ends of the load resistor R _L , and in this case, the power amplifier 11 for driving the power supply has a reference voltage that appears at the connection point of the floating power supplies 9 and 10 of the power amplifier 6 . It acts to change the operating voltage level similar to the input signal waveform. Here, the voltages of the floating power supplies 9 and 10 are respectively
⁺ V _CC1 , ^- V _CC1 , positive side output voltage of power amplifier 6
V ⁺ , the negative side output voltage is V ^- , the load voltage is V ₀ , the voltage gain of the power amplifier 6 is 1/βa, the voltage gain of the power amplifier 11 for power supply driving is 1/βb, the input signal e is If the angular frequency is ω and the output voltage of the power amplifier 11 for driving the power supply is Vb, then Vb = (1/βb)e sinωt,

[Table] Therefore, the collector-emitter voltage V _CE of the power transistors Q1 and Q2 that constitute the power amplifier 6 is as follows: V _CE = V _CC1 + (1/βb) e sin〓 ^t − (1/βa ) e sin〓 ^t = V _CC1 + (1/βb−1/βa) e sin〓 ^t …(2). Here, the resistance values of the feedback resistors 7 and 8 on the power amplifier 6 side are respectively R1 and R2, and the resistance values of the feedback resistors 12 and 13 on the side of the power amplifier 11 for driving the power source are R1 and R2, respectively.
3, R4, 1/βa=1+R1/R2, 1/βb=1+R3/R4, and generally 1/βa=1/βb=1/β, so the above equation (2) is V _CE = V _CC1 and is maintained regardless of the signal. Therefore, the floating power supplies 9 and 10 on the power amplifier 6 side are set to a low voltage, and the power supplies 14 and 15 on the power drive power amplifier 11 side are set to a high voltage, and the power transistors on the power amplifier 6 side are set to a high voltage. Q
1. Apply idling current for class A operation to Q2,
Moreover, if the power transistors Q3 and Q4 on the side of the power amplifier 11 for driving the power source are operated in class B operation,
The collector loss of each power transistor Q1, Q2 that constitutes the power amplifier 6 is small, and the load voltage
Since V ₀ swings with an amplitude almost close to the power supply voltage of the power supply drive power amplifier 11, it is possible to easily realize a high-output class-A operation power amplifier with power efficiency close to that of class-B operation. Become. However, in the power amplifier configured as above, the power supply of the power amplifier operating in class A is driven by the output of another power amplifier operating in class B. If a certain phase difference θ exists in the output of each power amplifier in the used frequency band, the above (2)
The formula is: V _CE = V _CC1 + (1/βb)e sin (〓 ^t + θ) − (1/βa) e sin〓 ^t = V _CC1 + (1/β) e {(cos θ-1) sin〓 ^t +sin θ cos〓 ^t } = V _CC1 + (1/β)e√2-(1-) ・sin(〓 ^t + α), and as the phase difference θ increases, V _CE changes according to the signal, and finally V
There was a drawback that the output waveform was distorted because there was no margin for _CE and a so-called clipping phenomenon occurred. In addition, since two power amplifiers are always required, the circuit and structure are quite complicated and varied. The present invention was made based on such circumstances,
It is an object of the present invention to provide a class A power amplifier that uses only one power amplifier and has good power efficiency without causing distortion in the output waveform. Embodiments of the power amplifier according to the present invention will be described in detail below with reference to FIGS. 2 to 4. FIG. 2 is a circuit configuration diagram of one embodiment of the present invention, in which a prevoltage amplifier 2 has one input terminal connected to an audio input signal terminal 21 via an input resistor 22.
3, and the output terminal of this voltage amplifier 23 is connected to each base terminal of a pair of NPN type and PNP type input power transistors Q11 and Q12 via constant voltage sources 24 and 25 for idling current setting, respectively. . On the other hand, these pair of input power transistors Q
NPN type and PNP type with each emitter terminal connected in cascode to each collector terminal of Q11 and Q12.
A pair of cascode power transistors Q13,
The collector terminals of the pair of cascode power transistors Q13 and Q14 are respectively connected to power sources 26 and 27 whose connection points are grounded. Between these two power supplies 26 and 27, two resistors are connected, each consisting of two series resistors 28, 29 and 30, 31, each of which is connected to the base terminal of each corresponding cascode power transistor Q13, Q14. The pressure circuits 32 and 33 are connected in series. The connection point of both voltage dividing circuits 32, 33 is connected to the commonly connected emitter terminal of both input power transistors Q11, Q12 and grounded via a load resistor R _L , and the flow of each input power transistor Q11, Q12 is Teing power supply 34, 35
and the input power transistor Q1 through each series circuit of diodes 36 and 37 of the illustrated polarity.
1, Q12, that is, two series-connected feedback resistors 38, 39 which are connected to the emitter terminals of cascode power transistors Q13, Q14 corresponding to each phase, and which determine the voltage gain of the power amplifier 20. Ground through. In other words, the connection point between these feedback resistors 38 and 39 is the voltage amplifier 23
is connected to the other side input terminal. Next, the operation of the power amplifier according to the present invention configured as described above will be explained. This power amplifier 20
is a floating power supply 34 in which cascode power transistors Q13 and Q14 are connected to input power transistors Q11 and Q12 to which audio signals are applied, and the output voltages of input power transistors Q11 and Q12 serve as reference voltages. , 35 are configured to supply the idling current of the input power transistors Q11, Q12 through the diodes 36, 37.
The operation when the floating power supplies 34 and 35 are disconnected and the floating power supplies 34 and 35 are unrelated will be described. The audio input signal applied to the terminal 21 is applied to the voltage amplifier 23 via the input resistor 22 and is appropriately amplified. Since the output voltage of the voltage amplifier 23 obtained in this way drives the input power transistors Q11 and Q12 of the output stage, a voltage corresponding to the output of the voltage amplifier 23 is generated across the load resistor _RL . It will be done. At this time, the base voltage of the cascode power transistors Q13, Q14 is determined by the voltage dividing circuits 32, 33 connected between the power supplies 26, 27 and the terminal voltage of the load resistor R _L.
Since it is given by , it also changes depending on the input signal. Furthermore, the emitter terminals of the cascode power transistors Q13 and Q14 are driven with constant current by the input power transistors Q11 and Q12, so the cascode power transistor Q1
3. Load current flows from the power supplies 26 and 27 through Q14. and input power transistor Q1
1, Q12 and cascode power transistors Q13, Q14 are determined by the ratio of the voltage dividing resistors connected in series in both voltage dividing circuits 32, 33.
1, Q13 side is also connected by voltage dividing resistors 28 and 29.
The PNP transistors Q12 and Q14 are determined by voltage dividing resistors 30 and 31. Therefore, the distribution of collector losses between input power transistors Q11, Q12 and cascode power transistors Q13, Q14 is also determined by the ratio of the voltage dividing resistors, so the collector losses of input power transistors Q11, Q12 are reduced. If the voltage dividing ratio is determined by the voltage dividing resistors, there will be no thermal problem even if the input power transistors Q11 and Q12 are operated in class A mode. However, in such a configuration, if input power transistors Q11 and Q12 are set to class A operation, cascode power transistors Q13 and Q14 are also set to class A operation, so cascode power transistor Q
The collector losses of Q13 and Q14 are large, and are equivalent to class A operation with one power transistor without cascode connection. Therefore, the input power transistor Q11,
In order to operate only Q12 in class A mode, it is sufficient to connect a current source having a heavier load than the cascode power transistors Q13 and Q14 only for the idling current as a load for the input power transistor. To this end, the present invention is configured such that floating power supplies 34, 35 whose reference voltage is the load voltage are connected to the collector terminals of input power transistors Q11, Q12 via diodes 36, 37. For convenience of explanation, the positive half-cycle operation of the NPN side power transistors Q11 and Q13 will now be described. First, when there is no signal, if an idling current necessary for class A operation flows through the input power transistor Q11 by the constant voltage sources 24 and 25 for idling current setting, then the cascode power transistor Q13 and the floating power supply 34 control the idling current setting of the input power transistor Q11. The floating power supply 34 becomes a load, and the cascode power transistor Q
13, the idling current will be supplied from the floating power supply 34. At this time, cascode power transistor Q1
3 attempts to cause current to flow into the floating power supply 34, but is blocked by the diode 36 and acts to supply current to the input power transistor Q11. The amount of current from the cascode power transistor Q13 at this time is determined by its base voltage, the voltage of the floating power supply 34, and the emitter voltage determined by the forward voltage of the diode 36, and by adjusting the base potential, the current You can change the size of the amount. Next, the positive half-cycle operation of the input signal will be described. As the input signal level gradually increases to the positive side, the base voltage of the input power transistor Q11 increases according to the output waveform of the voltage amplifier 23, so that the base voltage of the input power transistor Q11 increases.
The emitter voltage increases, current flows through the load resistor R _L , and an output waveform similar to the output of the voltage amplifier 23 is generated. At this time, floating power supply 34
is driven by the load voltage, so it increases with the load voltage, but the input power transistor Q11
The influence on the input power transistor Q11 remains unchanged, and the load current increased by the input power transistor Q11 is supplied from the power supply 26 through the cascode power transistor Q13. Therefore, the increase in load voltage is compensated by the voltage between the collector and emitter of cascode power transistor Q13 until it is saturated, and the increase in load voltage from the saturation of cascode power transistor Q13 to the saturation of input power transistor Q11 is compensated for by the voltage between the collector and emitter of cascode power transistor Q13. This is supplemented by the voltage between the collector and emitter of Q11, and the load current is supplied from both the power supply 26 and the floating power supply 34. Next, the operation for the negative half cycle of the input signal will be explained. As the input signal level gradually decreases to the negative side, the base voltage of the input power transistor Q11 decreases in accordance with the output waveform of the voltage amplifier 23, so the base-emitter voltage of the input power transistor Q11 begins to decrease. The collector current of input power transistor Q11 flowing from cascode power transistor Q13 and floating power supply 34 begins to decrease. However, even when the PNP side power transistors Q12 and Q14 are at maximum output or current, 2V _CC3 = V _{BE (Q11)} + V _{BE (Q12)} (V _CC3 is the voltage of the floating power supplies 24, 25,
V _{BE (Q11)} and V _{BE (Q12)} are the base-emitter voltages of the input power transistors Q11 and Q12, respectively), and the base-emitter voltage V _{BE (Q11)} of the input power transistor Q11 is set so as not to be cut off. Therefore, idling current flows even at the maximum drop point. In this case, as the collector current of the input power transistor Q11 decreases, its collector-emitter voltage increases, and the voltage V _CC3 of the floating power supply 34 increases.
From the moment when the input power transistor Q11 becomes larger than the cascode power transistor Q1
A current is supplied from a power supply 26 through 3. Regarding the PNP side power transistors Q12 and Q14, the above NPN side power transistor Q11,
The same operation as Q13 is performed, and the class A operation of the power amplifier 20 consisting of a push-pull output stage is performed in which the input power transistors Q11 and Q12 perform class A operation, and the cascode power transistors Q13 and Q14 perform class B operation. What is achieved will be readily understood by those skilled in the art. Figure 3 shows the diode 3 in the embodiment of Figure 2.
6, its emitter is connected to the collector of the input power transistor Q11, that is, the emitter of the cascode power transistor Q13, and its base and collector are connected to the floating power supply 34.
An NPN transistor Q15 connected to the diode 37 is used, and its emitter is connected to the collector of the input power transistor Q12, that is, the emitter of the cascode power transistor Q14, and its base and collector are connected to the floating power supply 35. FIG. 3 is a circuit configuration diagram showing another embodiment of the present invention configured to use a PNP type transistor Q16. In addition, in FIG. 4, instead of the diode 36 in the embodiment of FIG. 2, its collector is connected to the collector of the input power transistor Q11, that is, the emitter of the cascode power transistor Q13, and its base is connected to the input power transistor Q11, It is connected to the commonly connected emitter of Q12, and the emitter is connected to the floating power supply 3.
4 and its base via a resistor 42, and instead of the diode 37, its collector is connected to the collector of the input power transistor Q12, that is, the emitter of the cascode power transistor Q14, Its base is connected to the commonly connected emitters of the input power transistors Q11 and Q12 via a resistor 43, and its emitter is connected to the floating power supply 35, and the resistor 4
4 is a circuit configuration diagram showing still another embodiment of the present invention configured to use an NPN type transistor Q18 connected to its base via a transistor Q18. Furthermore, the third
Components in the figures and FIG. 4 that are the same as those in FIG. Even in the power amplifier configured as shown in FIGS. 3 and 4 above, it can be implemented in the same manner as the power amplifier shown in the embodiment of FIG. 2, and the same effect can be obtained. will be clear to those skilled in the art. As described in detail above, according to the present invention, there is no risk of clipping caused by the phase difference as in the conventional power amplifier shown in FIG. There is no need to consider adopting elements with excellent high-frequency characteristics to reduce the phase difference, and the structure does not require two power amplifiers, so it is possible to achieve low-cost, high-performance, high-efficiency class A power amplifier. There is an advantage that a drawer can be easily realized.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional power amplifier;
4 to 4 are circuit configuration diagrams showing different embodiments of the power amplifier according to the present invention. Q11, Q12...Input power transistor, Q
13, Q14...cascode power transistor,
36, 37...diode, Q15, Q16, Q1
7, Q18...Diode-connected transistor. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Claims] 1 In a power amplifier that handles audio signals,
The output stage is composed of an input power transistor to which an audio signal is applied, and a cascode power transistor connected in cascode to this input power transistor, and the output power of the input power transistor is referenced through a diode at the cascode connection point. A floating power supply is connected to generate a voltage, and a current is passed through a closed circuit consisting of the floating power supply, a diode, and an input power transistor, so that the input power transistor operates in class A mode, and the cascode power transistor operates in class B mode. A power amplifier characterized by: