JPS61237101A - Power source sequencer device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power sequencer device for controlling power on and off of a plurality of devices in a computer system or the like.

[Conventional technology]

FIG. 3 is a block diagram showing a power sequencer device for controlling power on and off used in a conventional electronic computer system. In the figure, (1) is a power supply sequencer device configured with relay logic to turn on and off the power, and has a plurality of control outlets (N/) to (N is
) have. (K) is the central processing unit C of an electronic computer (hereinafter referred to as CPU), (,7) is the control exit (
C'PU power supply control line connecting Nt) and CPU (J),
(d) is the input/output control device, (5) is the input/output control device power supply line connecting the control outlet (NJ) and the input/output control device (6) is the disk control device, (7) is the Control outlet (NJ
) and the disk controller (A), (t) is the disk device, (q) is the disk device power control line that connects the control outlet CN and the disk device (ff), (io ) is the magnetic tape device, (11) is the a tape device power supply control line connecting the control exit (N ts) and the magnetic tape device (lO), (1) is the line printer device, (tJ') is the control exit Line printer device power control line connecting (N/$) and line printer device (l), (c0 inputs power-on instruction signal P-ON of the entire computer system given to power supply sequencer device (1) The power-on instruction line (15) is the power supply sequencer device (
A power-off instruction line that inputs the power-off instruction signal P-OFF of the entire computer system given to /l, (/4)
Unused control outlet (H) of Fi power sequencer device (1)
e) Connected to K and connected with a jumper connector for jumpering the power control signal.

Next, the operation of the power supply sequencer device (1) shown in FIG. 1 will be explained with reference to the flow chart diagram.

The power-on signal P-ON for the electronic computer system is sent to the stain source sequencer device (
1) is given. Power supply sequencer device (/l has 13
Control exits (NJ) to (N / & ) are prepared1), and control exits (Ni) (N
J) (NaXNz) (NJJ) (NJII) has CP
U (J), input/output control device (Hiro), disk control device (
6), disk device (f), magnetic tape device (lθ),
Each line printer device (1) has control lines (3) (
Control outlet (N41) Ic is connected to jumper connector (/6) 2) E. Step (
After confirming the input of the power-on signal P-ON in step (1), the power sequencer device (1) moves to step (2) and first instructs C'PU (,21) to turn on the power. Confirm that it has been completed (step (J4')), then sequentially turn on the power to the input/output control device (6) via step (J4'). Control exit (
11) is connected to the jumper connector (t4), so it moves to the next control exit (Nz) and the disk device (t4) is connected to the jumper connector (t4).
), magnetic tape device (io), 9 imprinter device (1
2) and turn on the power in sequence. In this way, a power-on instruction is given to the control exits (NJ) to (N/#)K.

Since nothing is connected to the control outlet (N#), it is necessary to detect the completion of power-on of the control outlet (N/I) (step (3)) and detect the power-off instruction signal P-OFF (step (3)). )) and becomes a looped state.・Step (
When detecting that the power-off instruction signal 0-OFF has been applied to the power supply sequencer device (1), the power supply sequencer device (1) executes the control exit (N tz
) to (NJ), the power cutoff jitance operation (step C tips) to (,7/)) is started.

The power-off sequence is a simple disconnection operation from the control exit (NJj) to (N), but from the control exit (Ml) to (N)
1), a Booms delay circuit (not shown) is provided (step (J i )).

Because disk device (t), magnetic tape device (10)
And as a time to ensure that the power to the line printer device (lco) is turned off! This is because a delay time of r00ms is required. After that, the disk control device (6), input/output control device (&), and C'PU (21) are sequentially disconnected, and the entire computer system is turned off by detecting the completion of turning off the control exit (NJ) of the step (Koku). Complete power off.

[Problem that the invention seeks to solve]

Conventional power supply sequencer devices are configured as described above, and the control outlet containing the delay circuit is fixed, so if the number of control devices to be connected is small, a jumper connector can be connected. There was a problem that it had to be done.

This invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a power sequencer device that eliminates the need for jumpers and connectors by freely setting the position where the delay circuit is inserted.

[Means for solving inter-group points]

The power supply sequencer device according to the present invention replaces the conventional relay logic system with a microprogram and is further provided with a delay control exit setting switch.

[For production]

The power supply sequencer device according to the present invention can freely set the position of the delay using the delay insertion control exit setting switch.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (21~(t!r), (NJ)~(His
), P-ON, and P-OFF are the same as the configuration shown in FIG. (th) is microprogram rMJ
This is a power supply sequencer device using an IC. (/7) is a delay control exit setting switch for specifying which control exit the delay time is to be set, and is configured on the Dapitz. /g) is a delay time for determining how much delay time to set from the control exit (Nx) set by the delay control exit setting switch (l) to the next control exit (Nx-/). Each setting switch is a delay time setting switch consisting of bits.

The signal from (1K) is applied to the power sequencer device (lA)K via the setting line (17a) (/+ra).

See also the flowchart diagrams in the following E and fa diagrams.

The operation of the power sequencer device (lA) will be explained.

In FIG. 2, steps (C) to (C) to (C) are the same as those in FIG. The power supply sequencer device (lA) has K/7 control outlets (Nt) to (Ntz) as in the case of FIG.
It is assumed that a CPU (co) to a line printer (l co) are connected in order to Hz') and (NtJ).

When the stain source turn-on instruction signal P-ON is input to the power-on instruction line (c0) of the entire electronic computer system, the power supply sequencer device (lA) performs steps (co/) to (corri).

(coro) and (3) K to CPU 12), perform power-on control while confirming that the power-on is completed, and control the control exit (N/#
') Proceed to the power-on instruction. However, the control outlet (N
Since the device to be turned on is not connected to /#), a loop is created between step (3) and the step (3) of detecting the power-off instruction signal P-OFF. When the power cut-off instruction signal P-OFF is given, the process moves to step (33), where the control exit (N/9) is instructed to turn off the power, and then the set value S/l of the delay control outlet setting switch (l) is set. Step r
j4')) If there is a mismatch, move to the control exit (N/J) power-off instruction via step (t).
) Setting value S of the delay control exit setting switch (l), which instructs the power to be turned off sequentially (steps) until K is reached.
/? If the control exit that issued the power-off instruction matches, K (step (36)
) ) Proceed to the next power-off instruction.

Since the delay control exit setting switch (Liri) is composed of Hirobit, each control exit (N/) ~ (N/!')
It is possible to set one location corresponding to the following. Also, since the delay time setting switch (/1) is configured with mogubits,
If it is variable in units of ooms, it can be set in units of iooma between 0 and t and rooms.In the above embodiment, a delay control exit setting switch (1) and a delay control exit setting switch (1) are installed outside the power supply sequencer device (lA). Time setting switch (
/1) are provided one each, but more than one may be provided.

These setting switches (/7) (/l) may be provided inside the power sequencer device (lA). Further, if there is no problem even if the delay time is fixed, only the delay control exit setting switch (l) may be provided, and the delay time setting switch (/l) may be omitted and the time may be fixed.

Further, in the above embodiment, a power supply sequencer device for a computer system has been described, but the power supply sequencer device according to the present invention is used for power control between a control device and a device, and a configuration in which it is necessary to provide a delay time at one or more locations in a disconnection sequence is used. The device may also have the same effect as the above embodiment.

〔Effect of the invention〕

As described above, according to the present invention, the delay control exit setting switch is provided and the setting value is compared with the power cutoff control exit number, so that the delay control exit can be freely set, and the jumper This has the effect of providing a power sequencer device that does not require a connector, has a simple structure, and is inexpensive.

[Brief explanation of the drawing]

FIG. 1 is a block connection diagram showing a power supply sequencer device according to an embodiment of the present invention, FIG. 2 is a 70-chart diagram showing the operation of the power supply sequencer device according to an embodiment of the present invention, and FIG. 3 is a conventional sequencer The block connection diagram of the device, Figure D is a flowchart showing the operation of the conventional power supply sequencer device. (lA) is the power supply sequencer device, (1) is the delayed opening exit setting switch, (1g) is the delay time setting switch,(
Ml') to (Ntz) are control outlets of the power sequencer device. In addition, in FIG. 1, the same reference numerals indicate the same or equivalent parts. Rhinoceros 1

Claims (2)

[Claims] (1) In a power supply sequencer device that has a plurality of control outlets and sequentially controls the power of a plurality of devices connected to the control outlet, for setting a delay time during a disconnection sequence at a desired position of the control outlet. A power supply sequencer device characterized by being provided with a delay control exit setting switch. (2) The power supply sequencer device according to claim 1, further comprising a delay time setting switch for setting the delay time to an arbitrary length.