JPS61246801A - Terminal device - Google Patents

Abstract

PURPOSE:To attain automatic switching connection to a built-in circuit by providing plural connectors connected to a bus from an arithmetic controller and a means detecting to which connector the bus is connected. CONSTITUTION:Connectors 2A, 2B are connected respectively to both ends of an internal bus 5 via 3-state buffer circuits 6A, 6B. A built-in circuit 8 transmitting/receiving a data with the arithmetic control main body device 3 and inputting an external signal or outputting a signal externally is connected to the internal bus 5. The 3-state buffer circuits 6A, 6B are enabled by an output of monostable multivirators, 7A, 7B retriggerable provided correspondingly and the monostable multivibrators 7A, 7B are triggered by a signal (e.g., READ signal, WRITE signal or clock signal) generated always within a prescribed interval among control signals from the device 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field 1] The present invention relates to a terminal device constituting a peripheral device for an arithmetic control main body device such as a sequencer equipped with a CPU or the like.

[Background Art] Conventionally, it has been customary for arithmetic control main unit, such as a sequencer equipped with a CPU, etc., and a terminal device, which is a peripheral device, to be connected on a one-to-one basis through dedicated connectors.
Due to structural problems of terminal devices, some terminal devices are provided with a plurality of connectors so that no matter which connector is used, it can be connected to the arithmetic control main unit via a bus. Figure 8,
FIG. 9 shows an example in which the terminal device 1 is provided with two connectors 2 A and 2 B, and FIG. 8 shows a case where the terminal device 1 is connected to the arithmetic control main device 3 via the bus 4 using the connector 2 A. FIG. 9 shows a case where the connector 2B is used to connect to the arithmetic control main unit 3 via the bus 4. By the way, this type of terminal device 1 uses a switch (not shown) to switch between the connectors 2A and 2B, and therefore the user has to look at the switching states of the switches to determine which connectors can be used. There was also the problem that the system would not operate if the user forgot to switch the switch, causing people to panic when starting the system.

[Object of the Invention] The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a terminal device that can automatically detect a required connector and switch and connect the built-in circuit and the external connector. There is something to do.

[Disclosure of the Invention] 119 FIG. 1 shows the circuit configuration of the embodiment, in which connectors 2A and 2B are connected to both ends of the internal bus 5 via 3-step buffer 7 circuits 6A and 6B, respectively. It is. A built-in circuit 8 that exchanges data with the arithmetic control main unit 3 and outputs external signal input or external signals is connected to the internal bus 5.

Each 3-step buffer 7 circuit 6 A, 6 B is a retriggerable monostable multi-pipe lake 7 provided correspondingly.
The monostable multivibrators 7A and 7B are enabled by the outputs of the control signals A and 7B, and each monostable multivibrator 7A and 7B receives a signal generated within a certain interval (for example, a lead The trigger is triggered by a signal READ, a write signal WRITE, or a clock signal.

The arithmetic control main unit 3 connects to the connector 2 via the bus 4.
A, when the read signal READ, for example, is output from the arithmetic control main unit 3, the trigon of the monostable multivibrator 7A is input to the terminal via two connectors, and this input causes the monostable multivibrator 7A to 7A is triggered to generate an output and set the 3-state buffer 7 circuit 6A to an enabled state. At this time, since the read signal READ from the arithmetic control main unit 3 is not input to the connector 2B side, the monostable multipipe leak 7B is not activated, and the 3-state buffer 7 circuit 6B is in a disabled state. Therefore, the arithmetic control main unit 3 is connected to the connector 2A side.
When the built-in circuit 8 is connected, the built-in circuit 8 is operated by the signal sent through the 3-state buffer 7 circuit 6A.

Similarly, the bus 4 from the arithmetic control main unit 3 is connected to the connector 2B.
is connected. The monostable multivibrator 2B is trigged by the read signal READ, and the 3-state buffer 7 circuit 6B is enabled, and the built-in circuit 8 is operated by the signal inputted via the 3-state buffer circuit 6B.

By the way, the built-in circuit 8 is provided with a circuit for displaying the state of a signal input to or output from an ink 7 process section with an external device. The WtJ2 diagram shows an example of this circuit.
In this circuit, the signal a shown in Figure J3 (a) is input at high speed.
The timer circuit 11 outputs the signal as a signal and inputs it to the AND date 9.

The timer circuit 11 is triggered at the falling edge of the signal a, as shown in FIG.
'' signal is output to the AND date 9.

The fixed time T is a value determined depending on the relationship with the display element 10, and is a sufficient time to visually confirm that the display element 10 has disappeared if it is turned off for at least one hour. The display element 10 is driven to turn on when both the signal a and the signal A are H'', and blinks at a visible speed when the signal a is intermittent, and when the signal a is continuously H'', the display element 10 is driven to light up. This display element 10
In this state, the user can visually determine whether the signal a is a pulse or a continuous signal. FIG. 3(c) shows the output C of ANDDATE 9. FIG. 4 shows the case where a monostable multi-pipe rake is used in the timer circuit 11. When is L', the display element 10 made of a light emitting diode is turned on. Further, as a circuit for inputting an external signal, a circuit as shown in FIG. 5 is used. In other words, in this circuit, the variable resistance R,
This allows the threshold value of the operating voltage of the photocoupler PH to be freely set. FIG. 6 shows an example in which a plurality of the circuits shown in FIG. 5 are provided, and in this case, the threshold value of each photocoupler PH, .
+... can be defined as terminal X.

It is possible to input a mixture of external input signals having different input characteristics. FIG. 7 shows a case where variable resistor R2 is connected in parallel to the light emitting diode of photocoupler PH.

[Effects of the Invention] The present invention is connected to an arithmetic control main unit consisting of a CPU or the like via a bus such as a data bus, an address bus, or a control bus, and transmits and receives data between the built-in circuit and the arithmetic control unit. In the terminal device that performs the operation, it is equipped with a plurality of connectors that connect to the bus from the arithmetic control main unit, and also includes means for detecting which connector the bus is connected to, and connecting the connector detected by the means to the built-in circuit. Therefore, when connecting to the arithmetic control main unit via the bus, the built-in circuit can be automatically switched and connected according to the connector used, eliminating the hassle of manually switching the switch as in the past. This eliminates the need for switching, prevents troubles caused by forgetting to switch or erroneous switching, and allows the user to freely connect the bus to any connector without being conscious of switching the built-in circuit.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram of an embodiment of the present invention, FIG. 2 is a circuit diagram of a signal display circuit that can be used in the above, FIG. 3 is a time chart for explaining the operation of the signal display circuit in the same, and FIG.
The figure is a specific circuit diagram of the signal display circuit same as the above, Figure 5 is a circuit diagram of the input circuit used in the same as the above, Figure 6 is a circuit diagram showing the usage state of the same input circuit as the above, and Figure 7 is the circuit diagram of the same as the above input circuit. The circuit diagrams of other examples, FIGS. 8 and 9, are explanatory diagrams of conventional examples, and 1
is a terminal device, 2A, 2B are connectors, 3 is arithmetic control main unit, 4 is a bus, 6A, 6B are 3 steps, a total of puffs 77
Circuit, 7 A, 7 B are monostable multivibrators, 8
is a built-in circuit. Agent Patent Attorney Ishi 1) Long 7C) (箮<, a I+11P ゞW

Claims (1)

[Claims] (1) In a terminal device that is connected to an arithmetic control main unit consisting of a CPU or the like via a bus such as a data bus, address bus, or control bus, and exchanges data between the built-in circuit and the arithmetic control unit, It is equipped with a plurality of connectors that connect to the bus from the arithmetic control main unit, a means for detecting which connector the bus is connected to, and a means for connecting the connector detected by the means to the built-in circuit. A terminal device characterized by: