JPS6126868A - speed detector - Google Patents

Abstract

PURPOSE:To obtain high-resolution speed information by multiplying an encoder signal through a PLL circuit. CONSTITUTION:The position deviation of the profile of a position command pulse from a feedback pulse corresponding to the actual rotation of a servo- motor is detected by a deviation counter 18, and converted by a D/A converter 19 into an analog speed command voltage, which is inputted to one terminal of a matching point 20; and a speed voltage obtained by the F/V conversion of high- resolution speed information multiplied by PLL multiplying circuits 32-35 is inputted to the other terminal. Then, a speed error signal is amplified by an amplifier 21 to drive the servo-motor 22. Thus, the encoder signal is multiplied by the PLL circuits 32-35 to obtain the high-resolution speed information.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a speed detector for a highly accurate speed control or positioning control device.

Structure of a conventional example and its problems In a conventional positioning control device, a position command of a pulse train is given to a deviation counter 2 from a position command terminal 1, as shown in a specific example of the structure in Fig. 1.

In addition, the other input of the deviation counter 2 is an incremental encoder 7 directly connected to the rotating shaft of the servo motor 6.
The output is multiplied by 8, and a feedback pulse train whose direction is determined by a pulse separation circuit is input. Therefore, the deviation counter 2 outputs the difference between the position command pulse and the feed bank pulse, which is converted into an analog quantity by the D/A converter (digital-to-analog converter) 3, and is converted into an analog quantity as the speed command voltage at the matching point 4. It is entered at one end. On the other hand, at the other end of the butt point 4, a pulse train having a directionality proportional to the output frequency of the 8 multiplication pulse separation circuit is connected to an F/V converter (
A signal converted into a speed voltage by a frequency-voltage converter (9) is input. The speed error signal output from the matching point 4 is amplified by an amplifier 5 and drives a servo motor 6. 11 is a moving table, which is a ball screw for converting rotational motion into linear motion. In operation, the servo motor rotates with a certain time delay based on the profile of the position command pulse, and finally, when both the position command pulse and the feedback pulse become equal, the servo motor stops.

Figure 2 shows a principle diagram of the speed voltage generation method using the F/V converter 9, and 12.13 is the two-phase signal output waveform of the incremental encoder 7, which has a phase difference of 90 degrees. ing. Naturally, the sum of the two signals is switched depending on the direction of rotation of the servo motor, and 14 is a signal obtained by multiplying the two-phase signal by 4 using an 8-multiplying circuit. 15° and 16 are waveforms created by the F/V converter 9. 160 waveforms are obtained by triggering a monostable multivibrator with time τ using 14 pulse trains, and 16 analog voltages are obtained by integrating them. can be obtained. Analog voltage V.

is proportional to the frequency of the two-phase signal, that is, the rotational speed of the servo motor.

As described above, the method of obtaining the speed voltage by F/V converting the encoder output signal eliminates the need for a tacho generator in the servo motor, and is advantageous in terms of the cost and size of the servo motor. However, since the speed detection method described above can only obtain speed information discretely, problems occur in low-speed rotation or in a servo-locked state after completion of position control. In other words, the F/V conversion output can no longer be ignored at the ginogle speed rotation, and delays in the integration circuit can make the system unstable (-).Especially when the servo is locked, the speed signal ripple becomes a disturbance, resulting in a stable servo lock state. In some cases, it may not be possible to maintain the

OBJECTS OF THE INVENTION In view of the above-mentioned drawbacks, the present invention provides a means for obtaining high-performance, high-resolution speed information without adding a tachometer generator exclusively for speed detection.

Structure of the Invention The speed detector of the present invention comprises a two-phase signal with a phase difference of 90 degrees obtained from an incremental encoder, a reference frequency generation circuit, and a frequency division of the reference frequency output into 17M (M is an integer), which are separated by 90 degrees from each other. A frequency divider circuit that generates carrier signals having a phase difference, a plurality of modulation circuits that modulate the plurality of carrier signals with the encoder two-phase signal, an addition circuit that adds the outputs of the modulation circuits, and a fundamental frequency of the output of the addition circuit. PLL circuit (PhaseLo) that multiplies the component by M times
cked Loop circuit), a phase comparator that compares the phase of the multiplied output of the voltage controlled oscillation circuit of the PLL circuit and the reference frequency output of the reference frequency generation circuit, and a low-pass filter that passes low frequency components of this output. It is composed of a waveform shaping circuit that shapes the output of the low-pass filter to generate a rectangular wave pulse, and an F/V converter (frequency/voltage converter) that generates a voltage proportional to the frequency of the rectangular wave pulse. When performing speed control, position control, etc. using a servo motor or the like, it is possible to obtain high-performance, high-resolution speed information without using a dedicated tacho generator or the like.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the positioning control device shown in FIG. 3, a position command pulse train input terminal 17 is inputted to one end of a deviation counter 18. The other end of the deviation counter receives a feedback pulse signal which is separated into pulses by 24 pulse separators in order to determine the direction of the two-phase signal which is the output of the incremental encoder 23 directly connected to the rotating shaft of the servo motor 220. Reference numeral 19 denotes a D/A converter which converts the digital value of the deviation counter into an analog value of speed command voltage. The speed command voltage is input to one end of the matching points 20, and the speed voltage of the servo motor 22, which is the output of the F/V converter (frequency-voltage converter) 41, is input to the other end. A speed error signal output from 20 is amplified by an amplifier 21 and drives a servo motor 22. The rotating shaft of the servo motor converts rotational motion into linear motion using 25 ball screws and moves 26 moving tables. Further, the two-phase signal outputs having a 90 degree phase difference from the incremental encoders 23 are input to one ends of multipliers 27a and 27b, respectively, and are modulated with high frequency carriers 28a and 28b. However, the phases of these carrier signals also have a phase difference of 90 degrees. 29 is an adder circuit that adds the modulated signals.

Reference numeral 30 is a rotary filter that extracts only the fundamental wave component, and 310 is a waveform shaping circuit that converts the fundamental wave into a rectangular wave. Now, the fundamental wave signal of the two-phase signals of the 23 rotary encoders is expressed as follows.

2πX K1(3)=B”°.

However, X is the amount of change of the moving table 26, L is the amount of displacement of the moving table 9 drawn by one cycle of the encoder signal (that is, the number of rotary encoder pulses per one revolution of the pole screw PID), and K is the half-width value of the amplitude.

On the other hand, the carrier signals 28a and 28b are c 1 (t),
If c2(t), then C1(t) = 5in(2πfot)C2(t)
-si (2πfo t-;) (where f. is the carrier frequency) If the result of modulation in the modulation circuits 27a and 27b and addition in the addition circuit 29 is S(t,X), then S(t-X)= 2(Xi
-C2(t) Also, when the moving platform 26 is moving at a speed V, X=V t, so the function S(t, V
) is S(t −V) −Kcos(2πfot −−H
Vt) This means that the velocity information (■) is the carrier frequency f. is meant to be expressed as a frequency deviation from . The low-pass filter 30 is used to obtain the fundamental wave component since the encoder p-signal 23 and the two-phase carrier signals 1, 2sa, and 2sb are not sine waves and often contain noise. .

Now, since the modulated and added signal S(t·■) cannot be used as is, it is necessary to demodulate it. This demodulation method is
PLL (Phase Locked) including frequency divider
A demodulation method is used in which speed information with high resolution is extracted by multiplying S(t·■) using a loop (Loop) circuit and comparing it with a reference frequency. The PLL circuit includes a phase comparator 32, a low-pass filter 33 that passes the low frequency range of this output, a VCO (voltage controlled oscillator) 34 that is controlled by this output, and a component that divides this frequency into 17M (M is an integer). It consists of a frequency generator 35. The inputs of this phase comparator 32 are the 5(t-V) converted into a rectangular wave by the waveform shaping circuit 31 and the frequency-divided output of the VCO 34. With this configuration, the output of the VCO 34 is 5 (t-V).
is multiplied by M, and becomes =2πMf-2π-Vt.

CL Here, it is possible to separate only the reference frequency generation ports such as fo-Mfo. Phase comparator 3 is used for this comparison and separation.
A low-pass filter 38 and a waveform shaping circuit 39 are used. 40 is a pulse separation circuit; since the output of the waveform shaping circuit 39 has no polarity, the direction cannot be determined even if the output is directly input to the F/V converter 41; therefore, the output is a circuit for determining the direction. The F/V converter 41 converts a pulse train having speed information whose direction has been determined into an analog speed voltage.

As is clear from the above, speed detection using this method makes it possible to obtain high-resolution speed information by multiplying the signal from the rotary encoder using a PLL circuit. The positioning control operation in FIG. 3 is basically the same as the conventional example shown in FIG. 1.

That is, the position deviation of the feedback pulse according to the profile of the position command pulse and the actual rotation of the servo motor is detected by the deviation counter 18, and converted into an analog speed command voltage by the D/A converter 19. A speed voltage obtained by F/V conversion of high-resolution speed information multiplied by a PLL multiplier circuit is inputted to the other end. The speed error signal is amplified by 21 amplifiers and drives 22 servo motors. Eventually, the servo motor rotates until the number of position command pulses and feedback pulses become equal, and positioning is completed. As described above, by creating a speed signal using high-resolution speed information and feeding it back to the control system, highly accurate and stable control is possible with less influence of speed voltage ripples and the like as in the conventional system.

Effects of the Invention As described above, in the present invention, high-resolution speed information can be obtained by multiplying the encoder signal by a PLL circuit, and as a result, ripples, time delays, etc. of the speed detector are small, and the control system is improved. It becomes possible to improve stability and servo performance, and a practical effect can be expected.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional positioning control system, FIG. 2 is an explanatory diagram of the operation of the F/V converter of FIG. 1, and FIG. 3 is a block diagram of a control system of an embodiment of the present invention. 18... Deviation counter, 19... D/A
Converter, 21...Amplifier, 22...Servo motor, 23...Rotary encoder,
27a, 27b...modulator, 29...adder, 32, 37...phase comparator, 34...
・・VCO136・・・・Reference frequency oscillator, 41・
...F/V converter. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 ==2=2r/6 Figure 3

Claims (1)

[Claims] A two-phase signal with a 90 degree phase difference obtained from an incremental encoder and a reference frequency generation circuit, and a component that divides the reference frequency output into 1/M (M is an integer) to generate a carrier signal with a 90 degree phase difference from each other. a circuit, a plurality of modulation circuits that modulate the plurality of carrier signals with the encoder two-phase signal, an adder circuit that adds the outputs of the modulator circuits, and a fundamental frequency component of the output of the adder circuit that is multiplied by M times. PLL circuit (Phase Locked Loop)
a phase comparator that compares the phase of the multiplied output of the voltage controlled oscillation circuit of the PLL circuit and the reference frequency output of the reference frequency generation circuit; and a low-pass filter that passes low frequency components of the output. a waveform shaping circuit that shapes the output of the low-pass filter to generate a rectangular wave pulse; and an F/F/F/F that generates a voltage proportional to the frequency of the square wave pulse.
A speed detector consisting of a V converter (frequency-voltage converter).