JPS614221A - Bonding of semiconductor substrate - Google Patents
Bonding of semiconductor substrateInfo
- Publication number
- JPS614221A JPS614221A JP59124683A JP12468384A JPS614221A JP S614221 A JPS614221 A JP S614221A JP 59124683 A JP59124683 A JP 59124683A JP 12468384 A JP12468384 A JP 12468384A JP S614221 A JPS614221 A JP S614221A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- oxide films
- substrates
- faces
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、二枚の半導体基板を接着剤等を用いることな
く強固に接合して一体化する半導体基板の接合方法に関
する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for bonding semiconductor substrates by firmly bonding and integrating two semiconductor substrates without using an adhesive or the like.
半導体基板上に導電型や不純物濃度の異なる層を形成す
るためには、従来より、拡散、イオン注入、エピタキシ
ャル成長等が用いられている。半導体基板同士を接着剤
を用いることなく直接接合することができれば、厚い拡
散層や成長層を得るための高温、長時間の拡散工程、エ
ピタキシャル成長を省くことができて非常に便利である
。Conventionally, diffusion, ion implantation, epitaxial growth, and the like have been used to form layers having different conductivity types and impurity concentrations on a semiconductor substrate. If semiconductor substrates could be directly bonded to each other without using an adhesive, it would be very convenient because it would eliminate the high-temperature, long-time diffusion process and epitaxial growth required to obtain thick diffusion layers and growth layers.
従来、li面研磨されたシリコンウェー八同士を水やア
ルコールなどで濡れた状態で接触させると、両者が接着
する現象はしばしば観測されるところである。しかしな
がらこれは、水等の液体による表面張力によるものであ
り、乾燥させたウェーハでは観測されない。Conventionally, when silicon wafers whose Li surfaces have been polished are brought into contact with each other while wet with water, alcohol, etc., it has often been observed that the two adhere to each other. However, this is due to surface tension due to liquid such as water, and is not observed in dried wafers.
これに対して本発明者等は、鏡面研磨されたシリコンウ
ェーへの研磨面を酸化性の条件で親水性化処理した後、
この研磨面同士を実質的に異物の介在しない清浄な雰囲
気下で密着させることにより、強固な接合体が得られる
ことを見出し、これを先に提案している。この場合、2
00℃以上の温度で熱処理すれば、より強固な接合体と
なることが明らかになっている。この方法により、高不
純物濃度基板と低不純物濃度基板を接合して良好な電気
的特性が得られて訃る。この接合の現象を詳細に検討し
た結果、シリコン基板の表面に自然酸化膜が形成されて
いることが強固な接合体を得るための必要な条件である
ことが分っている。この様な自然酸化膜の存在は例えば
、エリプソメトリ−などの方法で確められる。In contrast, the present inventors performed hydrophilic treatment on the polished surface of a mirror-polished silicon wafer under oxidizing conditions, and then
It has been discovered that a strong bonded body can be obtained by bringing these polished surfaces into close contact with each other in a clean atmosphere substantially free of foreign matter, and this has been proposed previously. In this case, 2
It has been revealed that heat treatment at a temperature of 00° C. or higher results in a stronger bonded body. By this method, a high impurity concentration substrate and a low impurity concentration substrate can be bonded together and good electrical characteristics can be obtained. As a result of a detailed study of this bonding phenomenon, it has been found that the formation of a natural oxide film on the surface of the silicon substrate is a necessary condition for obtaining a strong bonded body. The presence of such a natural oxide film can be confirmed, for example, by a method such as ellipsometry.
しかしながら、この直接接合法では、特に不純物濃度の
低い半導体基板同士、を接合した場合、接合のオーミッ
ク特性が余り良くないう問題があることが分った。これ
は、接合面に残される自然酸化膜が本質的には絶縁膜で
あるため、電気的に一種のバリアが形成されるためと思
われる。However, it has been found that this direct bonding method has a problem in that the ohmic characteristics of the bond are not very good, especially when semiconductor substrates with a low impurity concentration are bonded together. This is thought to be because the natural oxide film left on the bonding surface is essentially an insulating film and forms a kind of electrical barrier.
本発明は上記した点に鑑みなされたもので、直接接合法
により良好なオーミック特性を示す接合が得られる半導
体基板の接合方法を提供することを目的とする。The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a method for bonding semiconductor substrates in which a bond exhibiting good ohmic characteristics can be obtained by a direct bonding method.
(発明の概要〕
本発明は、二枚の半導体基板の各接合面を好ま一シクは
表面粗さ500Å以下に鏡面研磨した後、例えば弗酸中
に浸漬するなどして表面酸化膜を除去し、水洗、乾燥さ
せて、ゴミ浮遊量が20個/cd以下のクリーンな雰囲
気下で研磨面同士を密着させ、200℃以上、好ましく
は500℃以上の温度で熱処理して接合体を形成する。(Summary of the Invention) The present invention preferably involves mirror polishing each joint surface of two semiconductor substrates to a surface roughness of 500 Å or less, and then removing the surface oxide film by, for example, immersing it in hydrofluoric acid. The polished surfaces are brought into close contact with each other by washing and drying in a clean atmosphere in which the amount of floating particles is 20 particles/cd or less, and then heat-treated at a temperature of 200° C. or higher, preferably 500° C. or higher to form a bonded body.
本発明によれば、半導体基板の接合体が得られ、しかも
自然酸化膜除去の工程を入れること7によって接合の良
好なオーミック特性が得られる。充分な厚みの自然酸化
膜を残した状態で半導体基板を接合する場合に比べて、
直後の機械的接合強度は劣るが、200℃以上の熱処理
を行なうことにより厚い自然酸化膜を残した場合と変ら
ない接合強度が得られることが確認されている。According to the present invention, a bonded body of semiconductor substrates can be obtained, and by adding a step 7 of removing a natural oxide film, good ohmic characteristics of the bond can be obtained. Compared to bonding semiconductor substrates with a sufficiently thick natural oxide film remaining,
Although the mechanical bonding strength immediately after is inferior, it has been confirmed that by performing heat treatment at 200° C. or higher, the same bonding strength as when a thick natural oxide film is left can be obtained.
そして本発明は、深い拡散層の形成や厚いエピタキシャ
ル層の形成等の代替技術として利用すれば、工程が簡単
になるだけでなく、不純物濃度の制御や厚みの制御が容
易になり、多くの半導体素子に適用して大きな効果を期
待することができる。If the present invention is used as an alternative technology for forming deep diffusion layers or thick epitaxial layers, it will not only simplify the process, but also make it easier to control impurity concentration and thickness, making it possible to improve the performance of many semiconductors. Great effects can be expected when applied to devices.
(発明の実施例)
以下、本発明の詳細な説明する。20Ω・αのn型(1
00)シリコン基板を二枚用意し、そ・れぞれの接合す
べき面を表面粗さ500Å以下に鏡面研磨した。次いで
濃弗酸に1分浸漬した後、2分間流水で洗浄した。この
後基板を乾燥させ、クリーンルーム中で実質的に異物の
介在しない条件で両者の研磨面同士を密着させた。これ
をオーブンに入れ、200℃、1時間の熱処理を行なっ
た。(Examples of the Invention) The present invention will be described in detail below. 20Ω・α n-type (1
00) Two silicon substrates were prepared, and the surfaces to be bonded were mirror-polished to a surface roughness of 500 Å or less. Next, it was immersed in concentrated hydrofluoric acid for 1 minute, and then washed with running water for 2 minutes. Thereafter, the substrates were dried, and the polished surfaces of both substrates were brought into close contact with each other in a clean room with substantially no foreign matter present. This was placed in an oven and heat treated at 200°C for 1 hour.
こうして得られた接合体基板は、充分強固な接合強度を
示した。熱処理温度と接合強度の関係を測定した結果、
500℃以上で熱処理した試料ではシリコン自体の強度
と誤差の範囲内で一致した。The thus obtained bonded substrate exhibited sufficiently strong bonding strength. As a result of measuring the relationship between heat treatment temperature and bonding strength,
For samples heat-treated at 500°C or higher, the strength matched the strength of silicon itself within a range of error.
1000℃で2時間の熱処理を行なった試料について、
金−1%アンチモンの電極を形成して電圧−電流特性を
カーブ1〜レーサで測定したところ、広い電圧範囲で直
線となり、良好なオーミック特性を示すことが確認され
た。 参考例として、同様のシリコン基板を鏡面研磨し
た後、過酸化水素−硫酸の混合液で3時間煮沸して酸化
膜を形成し、この後水洗、乾燥を行ない実施例と同様に
して接合体を形成した。この方法では接合強度は充分で
あったが、電圧−電流特性は直線とな゛らず、接合特性
が非オーミツクとなった。Regarding the sample heat treated at 1000℃ for 2 hours,
When electrodes of gold-1% antimony were formed and voltage-current characteristics were measured using a laser from Curve 1, it was confirmed that the electrodes were linear over a wide voltage range and exhibited good ohmic characteristics. As a reference example, a similar silicon substrate was mirror-polished, then boiled in a hydrogen peroxide-sulfuric acid mixture for 3 hours to form an oxide film, and then washed and dried to form a bonded body in the same manner as in the example. Formed. Although the bonding strength was sufficient with this method, the voltage-current characteristics were not linear and the bonding characteristics were non-ohmic.
Claims (1)
研磨面の酸化膜を除去した後、水洗、乾燥して、これら
の接合面を実質的に異物の介在しない条件下で直接密着
させて200℃以上の温度で熱処理することを特徴とす
る半導体基板の接合方法。Each bonding surface of two semiconductor substrates is mirror-polished, the oxide film on each polished surface is removed, and then washed with water, dried, and the bonded surfaces are directly brought into close contact under conditions with virtually no foreign matter present. 1. A method for bonding semiconductor substrates, characterized in that heat treatment is performed at a temperature of 200° C. or higher.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59124683A JP2621851B2 (en) | 1984-06-18 | 1984-06-18 | Semiconductor substrate bonding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59124683A JP2621851B2 (en) | 1984-06-18 | 1984-06-18 | Semiconductor substrate bonding method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS614221A true JPS614221A (en) | 1986-01-10 |
| JP2621851B2 JP2621851B2 (en) | 1997-06-18 |
Family
ID=14891486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59124683A Expired - Lifetime JP2621851B2 (en) | 1984-06-18 | 1984-06-18 | Semiconductor substrate bonding method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2621851B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62229820A (en) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | Manufacture of semiconductor device |
| CN111785614A (en) * | 2020-06-18 | 2020-10-16 | 上海空间电源研究所 | A bonding structure for reducing voltage loss and preparation method thereof |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5613773A (en) * | 1979-07-03 | 1981-02-10 | Licentia Gmbh | Fet and method of manufacturing same |
-
1984
- 1984-06-18 JP JP59124683A patent/JP2621851B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5613773A (en) * | 1979-07-03 | 1981-02-10 | Licentia Gmbh | Fet and method of manufacturing same |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62229820A (en) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | Manufacture of semiconductor device |
| CN111785614A (en) * | 2020-06-18 | 2020-10-16 | 上海空间电源研究所 | A bonding structure for reducing voltage loss and preparation method thereof |
| CN111785614B (en) * | 2020-06-18 | 2022-04-12 | 上海空间电源研究所 | Bonding structure capable of reducing voltage loss and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2621851B2 (en) | 1997-06-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |