JPS6143024A - Reception channel automatic setting device - Google Patents

Abstract

PURPOSE:To attain automatically the channel selection of a receiver without troublesome operation by storing sequentially a CH data set by channel CH setring operation at an address corresponding to an operating time. CONSTITUTION:A CPU2-8 has a count means counting the time, the time is stored in an internal section 28-1 and a CH data designated by scanning a keyboard 2-2 is stored sequentially in a CH storage section 2-11 at an address corresponding to the operating time. Further, the data relating to the sound volume corresponding to the tims is stored in a sound volume storage section 2-10. The CPU2-8 controls a power unit control section 2-6 when the set prescribed time is reached, the power unit control section 2-6 is controlled to apply power to each part of the receiver, the CH data read from the storage section 2-11 controls the front end section 2-2 via a CH switching section 2-9, a prescribed CH is selected and fed to an intermediate amplification and detection section 2-3, the sound volume data read from the storage section 2-10 controls a sounc volume control section to adjust the sound volume to a prescribed value and it is subject to power amplification 2-5 and the result is outputted to a speaker 2-14.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an automatic reception channel setting device for a receiver that receives broadcast radio waves such as radio and television.

[Technical background]

When listening to radio or TV, you often select the same station at almost the same time every day or week, but this selection can be done automatically. There is a method using a timer. In this system, data such as the day of the week, time, and broadcast station are programmed into the timer, and then the timer automatically turns on and off the power and selects the station.

This method using a timer has the drawback that it is extremely troublesome to input data to the timer, and input errors are likely to occur.

[Purpose of the invention]

The present invention has been made in view of the circumstances mentioned above,
The purpose of this is to automatically select the reception channel of 4N'@ without the need for complicated operations such as inputting various data into a timer in advance. The purpose is to provide a setting device.
・ [Summary of the invention] The present invention allows, for example, if you select the same station (channel) at the same time for two weeks, from the next week onwards, the channels selected in the previous week and the week before the previous week will be automatically selected. It was designed to be synchronized at approximately the same time.

[Embodiments of the invention]

An embodiment in which the present invention is applied to a radio receiver capable of electronic tuning and electronic volume control will be described.

FIG. 1 shows an external view of the radio receiver of this embodiment. The reference numeral (1-1) in the figure is a group of operation keys for operating and turning on this device, and is currently the power OFF key.

-1 volume UP key and DOWN key, ICH ~ 70H
Consists of channel switching keys. Sign (1
-2) is a display unit that displays channel frequency, volume, etc. Also, code (1-3) is the speaker, (1-4
) is an antenna.

FIG. 2 shows the internal circuit block configuration of this device. Reference numeral (2-1) in the figure is the antenna shown in FIG. 1, and radio waves guided into the apparatus from this antenna (2-1) are input to the front end section indicated by reference numeral (2-2). The front end section (2-2) is composed of a tuning circuit, an oscillation circuit, and a mixing circuit, and selects only the desired frequency, converts it to an intermediate frequency by the oscillation and mixing circuit, and then converts it to an intermediate frequency, which is then sent to the next stage intermediate amplification frequency detection section. Sends a signal to (2-3). In addition, the front end section (2-2)' includes a channel switching section (2-9).
) is connected, and the desired frequency can be selected by a signal from the channel switching section (2-9).

The signal sent from the front end section (2-2) is input to an intermediate amplification/detection section (2-3). The intermediate amplification/detection section (2-3) consists of an amplifier and a detector.The amplifier uses the input signal to amplify the input signal to a signal level that allows the detector to operate sufficiently, and the detector uses the amplifier to amplify the high-frequency signal. Only the low frequency audio signal is taken. The volume control section (2-4) is capable of electronically varying the signal level,
The control is performed by a signal from the second output port Z of the CPU (2-8), which will be described later.

The output of the volume control/control section (2-4,) is given to the four power amplification sections (2-, 5). This power increase 4 (
2-5) is the speaker, speaker, and car (2-5) connected to the output side.
14) Electricity to supply sufficient power, for! It is something that carries out a wide range of activities. In this way, the antenna (2-1)
Broadcast signal input from 1, speaker (2-14)
It is emitted as a sound.

The power supply unit (2-7) supplies power to each block in this device, and the CPU (2-8) and volume storage unit (to be described later).
2-10), the channel storage unit (2-11), and the front end unit (2-11) described above.
j), power supply control for intermediate amplification/detection section (2-3), volume control section (2-4), power amplification section (2-5), and channel switching section (26-9). 2-6. This power supply control section (2-6) controls the power on and off, and when the signal a from the CPU (2-8) is at a high level, the internal switch 1 closes. , signal a: is at a low level, the internal switch is opened. In this way, CPU (2
-8), the soundscape memory section (2-10), and the channel memory section (2-11) are constantly supplied with power, but these blocks have lower power consumption than C-MOS K. 5, and even if a book or device is powered by a battery, it will have almost no effect on the battery life.

Reference numeral (2-8) is a CPU, which controls the device. The CPU (2-8) is connected to the channel switching section (2-9) via the output port Y.
The channel to be received can be selected depending on the data to be sent. Furthermore, the output port a is connected to the power supply controller (2-6), and the CPU (2-8) is connected to each of the aforementioned blocks (2-2) to (2-5), (2-9).
) can be controlled.

Output port) D is a group of terminals for outputting display data to the display section (2-13); This is a terminal for detecting keys operated on the keyboard section (2-12), and the CPU (2-8) sends a key scan signal through the terminal during key sampling, which will be described later.
). input/output capo)X is the volume memory [5
(2-10) and channel storage unit (2-11) K is connected to write and read data to and from the volume storage unit (2-10) and channel storage unit (2-11).
11) for writing and reading data. The CPU (2-8) also has an internal storage section (
2-8-1) and an arithmetic unit (2-8-2).

Next, the channel storage section (2-11) will be explained in line 5.
゜ Fig. 3 shows an internal configuration diagram of the channel storage section (2-11). This channel storage unit (2-11) is a memory (RAM) that can read and write data, and its capacity is 4 bits x 1008 WORDs in this embodiment.
, that is, 4 b with address 1o08
It is a parallel read/write RAM. The address of this channel storage unit (2-11) is
-8) Specified by K, CPU (z-t) is the current day of the week, hour, minute (0 minutes to 9 minutes, 10 minutes, -19 minutes,
20 minutes to 29 minutes, 30 minutes to 39 minutes, 40 minutes to 49 minutes, 5
0 minutes to 59 minutes), the ゛, r dress to be specified is determined. In other words, there are 7 days of the week, 24 hours, and 10 minutes.
This means that 7x24x6=1008 addresses can be specified in 6 ways (per minute).This channel storage unit (2-11) is stored in the format shown in the partially enlarged view in Figure 3, and the channel of the radio to be received is specified in 6 ways. The data (3 bits) and the decision flag (1 bit) accompanying it can be written and changed in units of 10 minutes.

A configuration diagram of the volume storage section (2-10) is shown in FIG. The volume storage section (2-10) is stored by the CPU (input/output capo)
2-8), and the CPU (2-8) sends out address information from the input/output port X to write and read data regarding the sound volume. This volume storage section (
2-10) has a capacity of 4 bits x 8 words, or 32 bits, and the address is in 3 hour units (A
Address 0 from MO time to 2:59 AM, from 3:00 AM
Person Ms: ss+i address 1, AM6:00-AM8:
59 is updated with address 2, etc.), and "at"
It consists of addresses 0 to 7. Further, reading and writing of data is performed in parallel for 4 btts, and volume information for that time period is held. This volume information consists of 4 bits, where "oooo" = O represents the minimum volume, and '1111' = 15 represents the maximum volume.
Note that the data stored in the volume storage section (2-10) is for one day, and the address is determined regardless of the day of the week.

Next, the operation of the present invention will be briefly explained based on the flowcharts shown in FIG. 6 and subsequent figures. In addition to the normal function of receiving a desired channel Φ- for which the frequency of a broadcasting station is preset in advance, the radio receiver of this embodiment also measures time. It has the function of automatically storing information such as the reception channel, time, and volume in real time, and determining and executing subsequent operations based on the correlation with time.

Thus, the CPU (2-8) repeatedly executes each process of snaps A1 to A7 in the flowchart shown in FIG. First, the CPU (2-8) is connected to the keyboard section (2-12).
) via the input/output port K, and determines whether or not there is a key operation on the keyboard section (2-12) K (step AI). If it is determined that there is a key operation, the mI corresponding to each operation key is
Step A2 for switching channels and turning on the power when the ICH to 7CH keys are operated
, and when the power OFF key is operated, step A3 is executed. However, if there is a key operation, the CPU (2-8) performs the CH memory automatic setting process (step A5) whose details are shown in FIG.
Volume memory automatic setting process (step A) whose details are shown in the figure.
6) and (step A7), respectively, and return to the key sampling process (step AI) for waiting for the next key operation.

The CPU (2-8) also performs timekeeping processing, and the timekeeping processing is performed within the timer interwoven processing shown in detail in FIG.

In this embodiment, an interrupt occurs to the CPU (2-8) every second, and when an interrupt occurs, the CPU (2-8) simultaneously
8) is one in which the time is updated in the timer-interrupted processing shown in FIG. 2-8) is the process shown in Figure 6 and the process shown in Figure 7.
The time measurement process shown below is performed in a time-division manner.

Next, before giving a detailed explanation based on actual key operations, we will explain the internal storage section (2-8) in the CPU (2-8) shown in FIG.
-1) We will explain and explain the data and fly. In Fig. 51, ('5-A) to (5-G) are seconds, minutes, respectively.
This is a storage area for counting the days of the week, and 1.1 word taste is 4 bits. These counters are updated and changed during the timer interwoven process shown in FIG. 7, and indicate the current day of the week and time. The volume timer indicated by (5-H) in the figure is used in the volume storage automatic setting process (FIG. 11), which will be described later, and is incremented by 1 every minute.

The current channel indicated by (5-, I) in the figure indicates the channel currently being received, 1 when receiving IC) II, 2 when receiving 2CH, 7 when receiving 7CH, power OFF.
This is a flag that sometimes becomes '0'.The manual operation flag shown as (5-J) in the figure is set (becomes 1) when the channel designation key 7- is operated by the operator.
It is a flag and is reset (set to 0) by the power OFF key. In the figure (5-K) is the CPU (
2-8) is the area where the data is stored when sending the sound/volume data to the volume control section (2-4) via the output capo (Z), and the sound 1tUP/DOW shown in Fig. 10 is stored.
It is incremented by +1 or -1 during N processing.

Next, we will explain how the volume is automatically memorized and automatically set based on the actual keystrokes, and then how the radio reception channel is automatically memorized and automatically set. state

(Volume automatic memory, automatic setting) 6.

Regarding the sound and electric automatic memory/settings below, the keys shown in Table 1, -
The case where the operation is performed will be explained.

(Table 1) At 8:08 AM, ICU%UP is suppressed three times. First, when the IC and H keys on the keyboard section (,2,'+12.:) are pressed, the CPU (2-8) Detect this during key sampling in processing step A1 in Figure 6◇
Therefore, the processing of c, PtJ (2 knees s) moves on to the (, H key processing of step 1, knob A, 2, the details of which are shown in FIG. 8. This will be explained below with reference to FIG. 8. Futte 2
Tree 1, the CPU (2-8,") has an output port (2-6) that connects to the power control and low control section (2-6) mentioned above. This (or worse, the power controller section 0-16)
Close the 7th point engineering department, (2-2
), intermediate amplification, detection, branch section (2-3) 1, volume control section (2-4), power center section (2-'5), and channel switching section (2-9) are supplied with power. , the device is turned on. In step B2, the manual operation flag c5-J) shown in FIGS. 3- Sends the data corresponding to the operated ICH key from the output port of the CPU (2-J3) to the channel switching unit (279).The front end unit (2-2) ) and the channel switching unit (2-9) select only the frequency and number corresponding to the ICH, and the sound is emitted from the speaker (2-14) through each subsequent circuit block.
Current channel (5-I) in internal storage (2-8-1)
) is written with a numerical value "'1" representing the ICH currently being received. Next, in step B5, the address of the volume storage section (2-10) corresponding to the current time is calculated. Since the current time is 8:08 AM, the volume memory (
2-10) points to 2, and in step B6 the contents of address 2 are stored in the internal storage section (2-8) in the CPU (2-8).
8-1) is written to the volume counter (5-K).

Now, the contents of address 2 in the volume storage section (2-10) are 0.
”, the volume counter (5-K) will be 0.”
is written. After that, the content of the volume counter (5-K) is set to "0" from the boat 2 of the CPU (2-8) at step B7.
Output as a process.

Therefore, the volume control section (2-4) operates to reach the minimum volume state, and therefore the speaker (2-14)
will output audio at the minimum volume.

) ゞt″″′C″4°f,,x,f97B″-1
-, @61EOCH&l:”Automatic setting process (Step A
5), volume memory automatic setting processing (step A6), display processing (step A7), and then the process returns to key sampling (step AI).

Next, when the operator operates the UP key to increase the volume of this device, the CPU (2-8) detects this during key sampling (step AI), and processes the sound tUP as detailed in Figure 10. The process advances to /DOWN processing (step A4).

In the volume up P/D OWN process, step D in Figure 10
1 to step D2 and increments the volume counter (5-K). Therefore, the volume counter (5-K)
becomes 11”.Next, in step D3, over 7
0- is checked, but since over 7a- is not currently occurring, the process moves to step D8, and data "1" is sent from port z of the CPU (2-8) to the volume control section (2-4). Ru. With the above operation, the speaker (2
The volume of the sound emitted from -14) increases by one step. Next, the process moves to D9, where the internal storage section (2-8-1
) Clear the volume timer (5-H). This post-processing goes through step A5 in FIG.
Proceed to 6. Details of the volume storage automatic setting process are shown in FIG. 11. First, in step El, the volume timer (5-J
, ”) is examined and it is determined whether it is 5 or more.

The volume timer (5-J) is a timer that is cleared each time the UP or DONN key is operated, and since the UP key has just been operated as described above, the next process advances to E3. Continued≦Steps E3, E4, and E5 are all quantity and dynamic setting processes, and automatic setting is also shown in Figure 4! AMI2:00, AM3:00, AM6: 0
0. AM9: 00. 12:00 PM, 3:00 PM
, PM6:00, and PM9:OO. Specifically, in step E4, the volume storage section (2) corresponding to the current time is
-10) address is calculated, and then in step E5, the current time is past 8 AM, and the process returns to the display process in step A7 of FIG. 6 without automatically setting the volume. After the updated volume information is displayed, the process moves to key sampling in step A1.

Next, when the UP key (second time) is operated again, the volume goes up through the above-mentioned route, but after that process, the content of the volume counter (5-K) becomes '2' and the speaker (2-14 The volume of the sound emitted from will increase by l steps, and the contents of the volume timer (5-H) will also be cleared (=0) again.Furthermore, during LTP - (3rd time)
is operated, the content of the volume counter (5-K) becomes '3'', the speaker (2-14) emits audio at the corresponding volume, and the volume timer (5-H) is activated.
is cleared.

The operator then turned on the power, designated ICH, and completed the key operations shown in Table 1 (2) to set the device to the desired volume. However, the CPU (2-8) is A1 shown in FIG.
→ A5 → A6 → A7, and furthermore, the timer interrelated processing (FIG. 7) continues to be executed. As mentioned above, the timer interwoven process (FIG. 7) is performed every second, and the seconds, minutes, hours, and day of the week are updated and the volume timer is incremented every minute. In other words, considering 5 minutes after the operator last operated the UP key, the content of the volume timer (5-'H) will be '5'.
Step E1 during the volume memory automatic setting process shown in FIG.
The process then proceeds to step E2. The current volume counter (5-
The content "'3" of K) is placed in the address in the volume storage section (2-10) corresponding to the time zone of the current time. Specifically, ``3'' is written in the address area 2 shown in FIG. 4. This completes the automatic storage process of the volume from 6 AM to 9 AM.

■ 8:35 AM 0FF When the OFF key is operated, the operation is detected by the key sampling (step AI) shown in Fig. 6, and the process starts at step 9.
The process moves on to power OFF processing, the details of which are shown in the figure. First, in step c1, the internal storage section (2-8-1') of the CPU (2-8) is
0" is written in the current channel (5-I), indicating that the power is off. Next, in step c2, the port a of the cPU (2-8) is set to the "Low" level.

As mentioned above, a is the power control section (2-1
6), and the CPU (2-8) and volume storage unit (
2-10) All power supplies except the channel storage unit (2-11) are cut off. Then steps c3, C4, C5,
C6 and C7 are executed, but these are processes related to automatic storage of channels, and the details and operations will be described later. In this way, the power of the device is set to 0FFL, and the process repeats A1→A5→A6→A7 in FIG. 6 again.

(2) PMIO: 10 4CH, UP 5 times suppression First, the CPU (2-8) operating the 40H key performs the CH key processing (step A2) in FIG. In this step A2, the power of the device is turned on and tuned to the frequency corresponding to 4CH. Next, the volume storage section (2
-10), reads its contents, and sends the volume data to the volume control section (2-4) via the boat Z (step B shown in Fig. 8).
7).

At this time, if the volume data is 0'', the speaker car (
2-14) When the crabs are able to output the minimum volume, they will do it five times, the content of the volume counter (5-K) will become 5", and the volume timer (5-H) will be cleared. After that, the seventh The volume timer (5-H) is incremented every minute by the timer interrelated process shown in the figure, so after 5 minutes, the volume memory corresponding to the current time will be stored during the volume memory automatic setting process in step A6. It is written to address 7 in section (2-10).With the above, PA9:O'0 to P Ml
This means that the volume up to l:59 is automatically set.

■ PMII: 30 0’FF The operation is the same as in the above-mentioned item (2), so the explanation will be omitted.

■ Next day AM 8:02 30H When the operator presses the 30H key on the keyboard (2-12), the CPU (2-8) detects the operation by key sampling in step AI in Figure 6, and the process is CH key processing. (Step A2) Move to K.

In the CH key processing (Figure 8), the device is first powered on (Step Bi), and data corresponding to 30H is output from the boat Y to the channel switching section (2-9). Therefore, this device will be tuned to 30H. Next, the address of the capacity storage unit (2-10) corresponding to the current time is calculated. However, due to one work the day before, it was 6 AM:
@3''' is stored in the address corresponding to 00-AM8:59, that is, address 2 shown in Figure 4, and the volume is automatically set to 3 by steps B6 and B7, and the operator presses the volume key. You don't have to operate it.

■　AM8:30　OFF Since this is the same as ①, the explanation will be omitted.

■ PM1015 4CH When the operator presses the 4CH key on the keyboard (2-12), the CPU (2-8) detects the key operation by key sampling in step A1 in Fig. 6, and the processing starts with CH key processing ( Proceed to step A2). In CH key processing (Fig. 8), first turn on the power of this device (Step Bl), then press 4 from boat Y to the channel switching unit (2-9).
Sends data equivalent to 0H. Therefore, this device is 4C
Tune in to H. Next, the sound corresponding to the current time is stored in the storage section (2
-10) Calculate the address. However, due to the operation of ■ on the previous day, 5'' was written to address 7 corresponding to PM9:OO-PMll:59, and step B6
．． The volume is automatically set to 3 in step B7.

In this way, 5 minutes after the volume UP%DOWN key is operated, the volume information at that time is stored in the volume storage section (2-1).
0) in the address area corresponding to the current time. Therefore, when operating the radio receiver at approximately the same time on a daily basis, the volume is automatically set according to the volume information up to the previous day without having to operate the volume key each time.

(Channel automatic storage, automatic setting processing)) Below, we will explain the case where the key operations shown in Table 2 are performed when channel 7 is set to automatic storage.

(Table 2) ■ 1st week Mon 8:08 AM 10H First, when the ICE key on the keyboard section (2-12) is pressed, the CPU (
2-8) detects this during key sampling in processing step A1 shown in FIG. Therefore, the processing of the CPU (2-8) moves to the CH key processing of step A2, the details of which are shown in FIG. The explanation will be given below with reference to FIG. First, from step BIIC, the CPU (2-8) sets the output cap (a) to the power supply control section (2-6) to hi.
gh” level. This will cause the power control section (
2-6) closes the circuit and connects the front end section (2-2),
Intermediate amplification/detection section (2-3), volume control section (,
2-4), power is supplied to the power amplifying section (2-5) and the channel switching section (2-9), and the device is turned on.

In step B2, the manual operation flag (5-J) in the internal storage section (2-8-1) is set to "1" to store that the power is currently turned on by the operator. Next, in step B3, data corresponding to the operated key (I CH key) is sent from port Y of the CPU (2-8) to the channel switching section (2-9). As a result, only the frequency corresponding to ICH is selected by the front end section (2-2) and channel switching section (2-9), and the audio is transmitted through the subsequent circuit blocks to the speakers (2-9).
-14). In addition, the internal storage unit (2-8-
In step B4, a numerical value "1" representing the ICH currently being received is written to the current channel (5-I) in 1).

Next, in step B5, the volume storage section (2
-, 10'). Current time is AM
8:08 is written to the volume counter (5-K) in the internal storage section (2-8-1). Now, the volume memory section (
If the content of address 2 in 2-10) is '3'', the volume counter (5-K) will be 13''. Then C
Volume counter (5-
The content "'3" of K) is output as step B7.

Therefore, the volume control section (2-4') has a volume of 3.
The power amplifier (2-5
), and the sound is emitted from the speaker (2-14).

Next, the process proceeds from step B7 to the CH memory automatic setting process (step A5) shown in FIG. The CH memory automatic setting process performs various processes detailed in FIG. 12. First, it is determined whether the current time is the time at which the current operating state is to be stored (step Fl). As mentioned above, in this example,
The power OFF state of the receiving channel is automatically set every 10 minutes based on the information written in the channel storage section (2-11). However, since it is currently 8:08 AM, no processing is performed, and the volume memory automatic setting processing (step A6) and display processing (step A7) described above are performed.
Then, key sampling (step AI) is sequentially performed again. After that, AM8: When 10 minutes have passed, the process proceeds from step Fl to step F2 in FIG. In step F2, it is determined whether the current action is performed by the operator. This is to prevent the channel from automatically turning off or automatically changing when it is turned on manually. Since the manual operation flag is currently "1", the process advances to step Fil. In step F11, the day of the week,
The address of the channel storage unit (2-11) corresponding to the current time is calculated from the hours and minutes (valid only in units of 10 minutes). Specifically, Monday (=1), 8 o'clock (=8), 10
From minute (=1), 1+8X6+IX(24X6)=19
3, that is, the address is determined to be 19'3. Thereafter, in step F9, the current channel (5-I) in the internal storage section (2-4-1) representing the channel currently being received and the channel storage section (2-11) addressed as described above.
(Channel information at the same time last week) is compared. Assuming that the data in the channel storage unit (2-11) is now 1'1ooo'', that is, the decision flag is set on channel 0 (power OFF decision).
The process advances from step F9 to step F12. Step F1
In 2.

Clear the decision flag (most significant bit) in the channel storage unit (2-11) corresponding to the current time, write '1' in the current channel (5-I), and step A in FIG.
After going through the volume storage setting process in step 6 and the display process in step A7, the process repeats step A1.

■ Mon 8:45 AM 8:4 OFFAM
5, when the operator operates the OFF key, the CPU (
2-8) detects a key operation by key sampling in step A1, and proceeds to step A3, the details of which are shown in FIG. In steps 01 to C3 of FIG. 9, as already mentioned, 0 is written to the current channel (5-I), indicating that the power is off, and the manual operation flag (5-J), indicating that the operation is manual, is set. clear. Next, each step 94, C5, C6, and C7 is executed, but this is done manually when the power is turned off to 0FFL and the channel storage unit (2-
If data is continuous from the address corresponding to the current time in 11), the continuous data is erased.

However, now the process returns to the flow shown in FIG. 6 at step C5. Power OFF processing is performed as described above.

When operations ■ and ■ are completed, the channel storage section (2-
The data in 11) are shown in Figure 13.
In FIG. 3 and FIG. 14, which will be described later, the determination flag and CH data (4 bits) are shown arranged vertically for clarity.

2nd Entrance ■ Monday 7:52 AM When the 1CHICH key is operated by the operator, the C of Step A2 in Figure 6
ICH is selected by H key processing, and the speaker (2
-14) A sound is emitted from φ. Also, at this time, it is determined whether or not it is a manual operation flag. Currently AM7:5
2, the process goes through the volume memory automatic setting process of step A6 in FIG.
Then proceed to step F2. In step F2, it is determined whether the manual operation flag (5-J) has been turned on by manual operation. Here, go to FilK, the current day of the week,
The address in the channel storage section (2-11) corresponding to the time is calculated, and the current channel (5-11) is calculated in step F9.
I) and the data in the channel storage section (2-11) are compared.

The current channel (5-I) is '1', and the contents of the address corresponding to the current day of the week and time in the channel storage unit (2-Xl) are changed as shown in Figure 13 by the above-mentioned operations ■ and ■. In other words, '1000' (■ in the diagram)
Since last week's lower 3 bits are 'ooo', it can be seen that the power was off.Therefore, the process advances from step F9 to step F12 and step F13, and the memory content is changed to 0001''.

Then at 8:10 AM, it will be Monday at 8:1 AM.
The memory contents in the channel storage unit (2-11) corresponding to 0 were set to 'oooi' last week as shown in Figure 13 (■). Step F1 → Step F2 → Step Fil → Step F9&C in the diagram, and the current content of 0H (5-I) and the lower abi of the content of Figure 13 ■
t (last week's channel) are compared. As a result, the process advances to step F10. In step FIO, the 4 bits in Figure 13 ■ are used because the operating state is the same for two consecutive weeks)
The operation determination flag is set to 'l'.The above operations are executed until the operator presses the OFF key to update the data in the channel storage section (2-11).

■Mon 8:51 AM OFF The operation is the same as ■, so its explanation will be omitted.

FIG. 14 shows the stored contents of the channel storage section (2-11) after operations (1), (2), (2), and (2) are performed.

3rd week then 3rd week Monday 8:10am, 12th week
The CH storage automatic setting process shown in the figure proceeds from step F1 to step F2. Current manual operation flag (5-J)
is '0' and the process advances from step F2 to step F3.

In step F3, an address corresponding to the current day of the week and time is calculated (O in FIG. 14). In step F4, the operation determination flag shown in FIG.

In step F5, the CH data is checked and the power is 0.
Determine whether it is FF. The current CH data is in Figure 14'@
@1001'', that is, ICH.

For this reason, step F7. This device is powered ONI at F8,
, will be tuned to ICH.

Thereafter, the CPU (2-8) repeats the process every 10 minutes while comparing the current receiving channel with @0■■ shown in FIG. After that, at 9:00 AM, the channel memory automatic setting process in FIG. 12 starts at step F1.
→F2 →F3 →F4 →F5, and in step F5, the CH data at 9:00 AM on Monday is checked. That is, it is determined whether the lower 3 bits of [phase] in FIG. 14 are 0 or not. Now, Figure 14 ■ is “1000” and the lowest 3 bi
t is 0, which indicates power OFF. The process then moves from step F5 to step F6, and the power of the apparatus is automatically turned off at 9:00 AM.

During this period, while receiving the broadcast, CH Data
It is stored in an address area determined by the day of the week and time of the channel storage unit (2-11). If the same channel is selected at approximately the same time (in 10 minute units) for two weeks, a determination flag is set at the corresponding address in the channel storage section (2-11) together with the CH data. Therefore, in the third week, only if the same channel selection operation was performed at approximately the same time on the same day of the week over the past two weeks (the previous week and the week before the previous week), the channel will be automatically selected without any channel specification operation. , the broadcast is also broadcast in the third and subsequent weeks.

In addition, a changeover switch may be provided on the main body of the device to enable or disable the automatic setting of the volume and channel described above. Also, although the automatic channel setting cycle is set to one week, this also means that if the same channel is specified at the same time for two or three days, the automatic channel setting will be set from the next day. Alternatively, these periods may be arbitrarily switched by the operator.

〔effect〕

As described in detail above, according to the present invention, when the same channel is selected at approximately the same time every time, there is no need to specify the receiver channel each time.

[Brief explanation of the drawing]

The drawings all relate to a radio receiver that is an embodiment of the present invention, and FIG. 1 is an external perspective view, FIG. 2 is a block circuit diagram, and FIG.
FIG. 3 is a diagram showing the storage area of the channel storage section, FIG. 4 is a diagram showing the storage area of the volume storage section, FIG. 5 is a diagram showing the storage area of the internal storage section, and FIG. 6 is a diagram showing the overall operation of the CPU. 7 is a flowchart for explaining timer interwoven processing, and FIG. 8 is a flowchart for explaining timer interrelated processing.
7μm chart to explain H key processing, Fig. 9 is a flowchart to explain power OFF processing, and Fig. 10 is a 7μm chart to explain volume U@/DOWN processing.
11 is a flowchart for explaining the volume memory automatic setting process, FIG. 12 is a flowchart for explaining the CH memory automatic setting process, and FIGS. 13 and 14 are the channel storage section. FIG. 3 is a diagram showing an example of a storage state of . 2-2...Front engine)"m, 2-4...Volume control section, 2-6...Power supply, controller, loop i
l, 2-7...power supply section, 2-8...'CPU, 2-
9... Channel switching section, 2-10... Volume storage section, 2-11... Channel storage section.

Claims (1)

[Claims] A clock means for counting time; a memory means for sequentially storing channel data designated by a channel designation operation at an address corresponding to the operation time; and an address of the memory means is specified according to the time measurement content of the time clock means. and a control means for reading out the channel data stored at the designated address, and a receiving means for selecting a reception channel based on the channel data designated by the channel designation operation and the channel data read from the storage means. An automatic receiving channel setting device comprising: