JPS6143409A - Manufacture of semiconductor thin film crystal layer - Google Patents
Manufacture of semiconductor thin film crystal layerInfo
- Publication number
- JPS6143409A JPS6143409A JP16490784A JP16490784A JPS6143409A JP S6143409 A JPS6143409 A JP S6143409A JP 16490784 A JP16490784 A JP 16490784A JP 16490784 A JP16490784 A JP 16490784A JP S6143409 A JPS6143409 A JP S6143409A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- semiconductor thin
- laser beam
- substrate
- crystal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 43
- 239000010409 thin film Substances 0.000 title claims abstract description 39
- 239000013078 crystal Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 3
- 230000003287 optical effect Effects 0.000 claims description 7
- 239000010408 film Substances 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 3
- 230000001678 irradiating effect Effects 0.000 claims description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 claims 1
- 229910052814 silicon oxide Inorganic materials 0.000 claims 1
- 230000007547 defect Effects 0.000 abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052710 silicon Inorganic materials 0.000 abstract description 5
- 239000010703 silicon Substances 0.000 abstract description 5
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 239000000377 silicon dioxide Substances 0.000 abstract description 4
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- 238000001816 cooling Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract description 3
- 238000010438 heat treatment Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、絶縁層上の半導体薄膜結晶層の製造方法に関
する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor thin film crystal layer on an insulating layer.
近年、ＳＯ８（シリコン・オン・サファイア）基板に変
わるものとして、単結晶Ｓｉ基板を酸化して形成したＳ
ｉ ０２層上や該基板に堆積したＳｉＯ２層上に３ｉ
薄膜を堆積した、所謂Ｓｏｌ基板を用いることが検討さ
れている。５ｉＯ２Ｎｆｌ上に８１薄膜を堆積しただけ
では結晶粒径が高々数１００〜数１０００［人］１１度
の多結晶であるが、これにレーザビームや電子ビームを
細く絞って膜上を走査させることにより、その膜を溶融
・再凝固化せしめ、結晶粒径を著しく大きくしたり、単
結晶層を形成することが可能となっている。このような
方法を用いることにより、数［μＴｒＬ］〜数１０［μ
７ＦＬ］の結晶粒径を持つ多結晶３ｉや、結晶方位制御
がなされた単結晶が得られ、且つこのＳｉｌ膜上に形成
されたＭＯＳトランジスタの電界効果移動度は、Ｎチャ
ネルトランジスタの場合バルク３ｉ基板のそれの５０［
５１以上にも達するものが得られている。In recent years, as an alternative to SO8 (silicon on sapphire) substrates, S, which is formed by oxidizing single crystal Si substrates, has been
3i on the i02 layer and the SiO2 layer deposited on the substrate.
The use of a so-called Sol substrate on which a thin film is deposited is being considered. If only a thin film of 81 was deposited on 5iO2Nfl, it would be polycrystalline with a crystal grain size of several 100 to several 1000[human] 11 degrees, but by scanning the film with a narrow laser beam or electron beam, By melting and resolidifying the film, it is possible to significantly increase the crystal grain size or form a single crystal layer. By using such a method, the number [μTrL] to several tens [μ
A polycrystalline 3i with a crystal grain size of 7FL] or a single crystal with crystal orientation control is obtained, and the field effect mobility of a MOS transistor formed on this Sil film is the bulk 3i in the case of an N-channel transistor. 50 [of that of the board]
Those reaching 51 or more have been obtained.
しかしながら、このような方法によって得られた素子に
おいては、次のような問題があった。即ち、上述のＭＯ
Ｓトランジスタはチャネル幅Ｗ−５０［μｍ］、チャネ
ル長Ｌ−５０［μｍ］といった比較的大きな面積を持つ
素子であった。これがＷ−８［μｍ］、Ｌ−４［μｍ］
とイッた小さな面積のトランジスタになると、移動度が
４５０［ｃａｌ／ｖｓｅｃコとバルクＳｉのそれの約６
０［％］のものもある一方、数１０ ［ｃｉ／ｖ ｓｅ
ｃ ］ Ｌ／かない素子もでてくる。また、リーク電流
の多い素子も見受けられる。これらの原因を調べて見る
と、移動度の小さな素子には下地絶縁層と８１薄膜との
境界面から表面に向けて多くの格子欠陥が存在している
ことが判った。However, the device obtained by such a method has the following problems. That is, the above-mentioned M.O.
The S transistor was an element having a relatively large area, with a channel width W-50 [μm] and a channel length L-50 [μm]. This is W-8 [μm], L-4 [μm]
For a transistor with a very small area, the mobility is 450 [cal/vsec], which is about 6 times lower than that of bulk Si.
Some are 0 [%], while some are 10 [ci/v se
c] L/non-conducting elements also appear. Also, some elements have a large amount of leakage current. After investigating these causes, it was found that in devices with low mobility, many lattice defects exist from the interface between the underlying insulating layer and the 81 thin film toward the surface.
本発明の目的は、絶縁層上に格子欠陥の少ない半導体１
１１１１結晶層を形成することができ、該結晶層上に形
成する素子の特性向上等に寄与し得る半導体薄膜結晶層
の製造方法を提供することにある。An object of the present invention is to provide a semiconductor with few lattice defects on an insulating layer.
An object of the present invention is to provide a method for manufacturing a semiconductor thin film crystal layer that can form a 1111 crystal layer and contribute to improving the characteristics of an element formed on the crystal layer.
本発明の骨子は、アニールすべき半導体薄膜に照射する
レーザビームとは別に、該半導体薄膜の下地である絶縁
層を加熱するレーザビームを用い、半導体薄膜の急冷に
よる格子欠陥の発生を防止することにある。The gist of the present invention is to prevent the generation of lattice defects due to rapid cooling of the semiconductor thin film by using a laser beam that heats the insulating layer underlying the semiconductor thin film, in addition to the laser beam irradiated to the semiconductor thin film to be annealed. It is in.
即ち本発明は、半導体基板上に形成された絶縁層上に半
導体薄膜を形成し、この半導体８１Ｍをレーザビームア
ニールにより溶融・再結晶化せしめる半導体薄膜結晶層
の製造方法において、前記半導体薄膜に該薄膜に吸収さ
れる波長を持つ第１のレーザビームを基板上方から照射
すると共に、前記半導体基板に対して透過性を持ち前記
絶縁層に吸収される波長の第２のレーザビームを上記第
１のレーザビームの光軸と揃えて基板下方から照射し、
且つ上記各ビームと前記基板との相対位置を移動して前
記半導体薄膜のアニールすべき領域全体をアニールする
ようにした方法である。That is, the present invention provides a method for manufacturing a semiconductor thin film crystal layer in which a semiconductor thin film is formed on an insulating layer formed on a semiconductor substrate, and this semiconductor 81M is melted and recrystallized by laser beam annealing. A first laser beam having a wavelength that is absorbed by the thin film is irradiated from above the substrate, and a second laser beam that is transparent to the semiconductor substrate and has a wavelength that is absorbed by the insulating layer is applied to the first laser beam. Align the optical axis of the laser beam and irradiate from below the substrate.
Further, in this method, the relative positions of each of the beams and the substrate are moved to anneal the entire region of the semiconductor thin film to be annealed.
ここで、上記第２のレーザビームの波長を半導体基板に
吸収されない波長に選んだ理由は、第２のレーザビーム
が半導体基板に吸収されると基板自体が加熱され、絶縁
層の加熱に大きなエネルギーを要する。さらに、基板の
厚みにより絶縁層の加熱領域が広がることになり、絶縁
層の局所的な加熱ができなくなるからである。Here, the reason why the wavelength of the second laser beam was selected to be a wavelength that is not absorbed by the semiconductor substrate is that when the second laser beam is absorbed by the semiconductor substrate, the substrate itself is heated, and a large amount of energy is required to heat the insulating layer. It takes. Furthermore, the heating area of the insulating layer expands due to the thickness of the substrate, making it impossible to locally heat the insulating layer.
本発明によれば、第１及び第２のレーザビームをその光
軸を揃えて基板上に照射することにより、半導体薄膜の
溶融・再凝固の際に該薄膜が急冷するのを未然に防止す
ることができる。このため、絶縁層上に格子欠陥の発生
の少ない半導体薄膜結晶層を形成することができる。従
って、該結晶層上に形成する素子の特性向上等に橿めて
有効である。また、絶縁層を加熱するためのレーザビー
ムは局所加熱に用いるものであるから、その出力は左程
大きいものである必要はない。さらに、局所加熱である
ことから、基板全体をヒータ等により加熱する方法に比
べ、熱応力を小さくできる等の利点がある。According to the present invention, by irradiating the substrate with the first and second laser beams with their optical axes aligned, rapid cooling of the semiconductor thin film during melting and resolidification is prevented. be able to. Therefore, a semiconductor thin film crystal layer with fewer lattice defects can be formed on the insulating layer. Therefore, it is extremely effective in improving the characteristics of elements formed on the crystal layer. Furthermore, since the laser beam for heating the insulating layer is used for local heating, its output does not need to be as large as shown above. Furthermore, since it is localized heating, it has the advantage that thermal stress can be reduced compared to a method in which the entire substrate is heated with a heater or the like.
以下、本発明の一実施例方法を第１図乃至第３図を参照
して説明する。Hereinafter, a method according to an embodiment of the present invention will be described with reference to FIGS. 1 to 3.
まず、第２図に示す如く単結晶８１基板（半導体基板）
１上を醇化して厚さ０．５［μＴｒＬ］の８１０２層（
絶縁層）２を成長させ絶縁性基板を形成し、その上に多
結晶Ｓｉ膜（半導体ｉ１［１１）３を成長ざせ試料４と
した。この工程は、通常のビ−ムアニールに先立つ試料
形成工程と同様である。First, as shown in Figure 2, a single crystal 81 substrate (semiconductor substrate)
1 and 8102 layers with a thickness of 0.5 [μTrL] (
An insulating layer) 2 was grown to form an insulating substrate, and a polycrystalline Si film (semiconductor i1[11)3 was grown thereon to form a sample 4. This step is similar to the sample forming step prior to normal beam annealing.
次いで、この試料４を第１図に示す如くシリコン基台５
上に基板１を下にして載置し、表面側（Ｍ板上方）から
ＧＷ−Ａｒレーザ（第１のレーザビーム）６を図示しな
い光学系で絞り、出力１２〜１６ ［Ｗ］で試料４上に
照射する。一方、裏面側（Ｍ板下方）からはＣＷ−ＣＯ
２レーザ（第２のレーザビーム）７を同様に光学系で絞
りＣＷ−Ａｒレーザ６の光軸と揃うように出力５〜１０
［Ｗ］で試料４に照射する。そして、両方のレーザ６．
７の光軸が揃うように、第３図に示す如く試料４の全面
に亙りＸ方向及びＹ方向に走査し、多結晶５ＩＩＩ３の
全面をアニールした。Next, this sample 4 is placed on a silicon base 5 as shown in FIG.
The substrate 1 is placed on the top with the substrate 1 facing down, and the GW-Ar laser (first laser beam) 6 is focused from the front side (above the M plate) using an optical system (not shown), and the sample 4 is heated at an output of 12 to 16 [W]. irradiate on top. On the other hand, from the back side (below M plate), CW-CO
2 laser (second laser beam) 7 is similarly apertured with an optical system so that the aperture is aligned with the optical axis of the CW-Ar laser 6, and the output is 5 to 10.
Irradiate sample 4 with [W]. and both lasers 6.
As shown in FIG. 3, the entire surface of the sample 4 was scanned in the X and Y directions so that the optical axes of the polycrystal 5III3 were aligned, and the entire surface of the polycrystalline 5III3 was annealed.
ここで、ＣＷ−Ａｒレーザ６の波長は約０．５［μｍ］
であり、＄１に良く吸収される。また、ＣＷ −ＣＯ２
レーザ７の波長は約１０ ［μ７ＦＬ］ テあり、この
光は３ｉに対し透過性でＳｉＯ２に良く吸収される。こ
のため、基板下方から照射されたＣＷ−ＣＯ２Ｌ／−ｆ
７Ｇ；ｔｓ ｉ ０２１２（７）みを選択的に加熱する
ことになる。即ち、ＣＷ−ＣＯ２レーザ７により絶縁層
２が加熱されることになり、これによりＣＷ−Ａｒレー
ザ６によって溶融したＳｉが再凝固する際に急冷するの
が防止される。Here, the wavelength of the CW-Ar laser 6 is approximately 0.5 [μm]
, and is well absorbed by $1. Also, CW -CO2
The wavelength of the laser 7 is about 10 μ7 FL, and this light is transparent to 3i and well absorbed by SiO2. Therefore, CW-CO2L/-f irradiated from below the substrate.
7G; ts i 0212 (7) will be selectively heated. That is, the insulating layer 2 is heated by the CW-CO2 laser 7, thereby preventing the Si melted by the CW-Ar laser 6 from being rapidly cooled when resolidifying.
このため、５ｉＳｉＯｚ界面からの格子欠陥発生を抑え
ることが可能となる。Therefore, it is possible to suppress the occurrence of lattice defects from the 5iSiOz interface.
かくして本実施例方法によれば、５ｉＯｚ層２−上に格
子欠陥の穫めて少ない単結晶５ｉｌｌｌｌを得ることが
できる。このため、該薄膜上に形成する素子の特性面上
等に橘めて有効である。また、下地基板全体をその裏面
側からヒータ等により加熱する方法と比較し、局所加熱
であるから、熱応力が小さい等の効果がある。Thus, according to the method of this embodiment, a single crystal 5illll with very few lattice defects can be obtained on the 5iOz layer 2-. Therefore, it is effective for the first time in terms of characteristics of elements formed on the thin film. Furthermore, compared to a method in which the entire base substrate is heated from the back surface side using a heater or the like, since local heating is performed, thermal stress is reduced.
なお、本発明は上述した実施例に限定されるものではな
い。例夫ば、前記半導体薄膜は多結晶Ｓｉに限るもので
はなく、非晶質Ｓ１でもよい。さらに、Ｓｌに限らず、
各種の半導体１膜を用いることが可能である。同様に、
下地基板や絶縁層の材質は適宜変更可能である。また、
前記第１のレーザビームとしては、半導体薄膜に良く吸
収される波長を有するものであればよい、さらに、前記
第２のレーザビームとしては、下地半導体基板に対して
透過性で絶縁層に良く吸収される波長を有するものであ
ればよい。また、前記試料として半導体薄膜が絶縁層に
設けられた開孔を介して一部下地基板に接触しているも
のを用いるようにしてもよい。さらに、前記シリコン基
台の代りには、第２のレーザビームに対して透過性を有
するものであれば用いることができる。また、前記レー
ザビームを走査する代りに、試料を移動するようにして
もよい。その他、本発明の要旨を逸脱しない範囲で、種
々変形して実施することができる。Note that the present invention is not limited to the embodiments described above. For example, the semiconductor thin film is not limited to polycrystalline Si, but may be amorphous S1. Furthermore, not only SL,
It is possible to use various types of semiconductor films. Similarly,
The materials of the base substrate and the insulating layer can be changed as appropriate. Also,
The first laser beam may have a wavelength that is well absorbed by the semiconductor thin film, and the second laser beam may be one that is transparent to the underlying semiconductor substrate and well absorbed by the insulating layer. Any wavelength that can be used may be used. Furthermore, the sample may be one in which the semiconductor thin film is partially in contact with the underlying substrate through an opening provided in the insulating layer. Furthermore, instead of the silicon base, any material can be used as long as it is transparent to the second laser beam. Furthermore, instead of scanning the laser beam, the sample may be moved. In addition, various modifications can be made without departing from the gist of the present invention.
第１因乃至第３図はそれぞれは本発明の一実施例方法を
説明するためのもので第１図はレーザビーム照射方法を
示す模式図、第２図は試料構造を示す断面図、第３図は
レーザビーム走査方法を示す模式図である。
１・・・単結晶３ｉ基板（半導体基板）、２・・・５１
０２層（絶縁層）、３・・・多結晶Ｓ１薄膜（半導体薄
膜）、４・・・試料、５・・・シリコン基台、６・・・
ＣＷ−Ａｒレーザ（第１のレーザビームン、７・・・Ｃ
Ｗ−ＣＯ２レーザ（第２のレーザビーム）。Figures 1 to 3 are for explaining a method according to an embodiment of the present invention. Figure 1 is a schematic diagram showing a laser beam irradiation method, Figure 2 is a cross-sectional view showing a sample structure, and Figure 3 is a schematic diagram showing a laser beam irradiation method. The figure is a schematic diagram showing a laser beam scanning method. 1... Single crystal 3i substrate (semiconductor substrate), 2...51
02 layer (insulating layer), 3... Polycrystalline S1 thin film (semiconductor thin film), 4... Sample, 5... Silicon base, 6...
CW-Ar laser (first laser beam, 7...C
W-CO2 laser (second laser beam).
Claims (4)
を形成し、この半導体薄膜をレーザビームアニールによ
り溶融・再結晶化せしめる半導体薄膜結晶層の製造方法
において、前記半導体薄膜に該薄膜に吸収される波長を
持つ第１のレーザビームを基板上方から照射すると共に
、前記半導体基板に対して透過性を持ち前記絶縁層に吸
収される波長の第２のレーザビームを上記第１のレーザ
ビームの光軸と揃えて基板下方から照射し、且つ上記各
ビームと前記基板との相対位置を移動して前記半導体薄
膜のアニールすべき領域全体をアニールすることを特徴
とする半導体薄膜結晶層の製造方法。(1) A method for manufacturing a semiconductor thin film crystal layer, in which a semiconductor thin film is formed on an insulating layer formed on a semiconductor substrate, and the semiconductor thin film is melted and recrystallized by laser beam annealing. A first laser beam having a wavelength that is absorbed is irradiated from above the substrate, and a second laser beam that is transparent to the semiconductor substrate and has a wavelength that is absorbed by the insulating layer is irradiated with the first laser beam. Manufacturing a semiconductor thin film crystal layer, characterized in that the entire region of the semiconductor thin film to be annealed is annealed by irradiating the substrate from below in alignment with the optical axis of the semiconductor thin film and moving the relative position of each of the beams and the substrate. Method.
絶縁層としてシリコン酸化膜、前記半導体薄膜として多
結晶シリコン若しくは非晶質シリコンを用いることを特
徴とする特許請求の範囲第１項記載の半導体薄膜結晶層
の製造方法。(2) The semiconductor thin film according to claim 1, wherein a single crystal silicon substrate is used as the semiconductor substrate, a silicon oxide film is used as the insulating layer, and polycrystalline silicon or amorphous silicon is used as the semiconductor thin film. Method of manufacturing a crystal layer.
を介して前記半導体基板と一部接触していることを特徴
とする特許請求の範囲第１項又は第２項記載の半導体薄
膜結晶層の製造方法。(3) The semiconductor thin film according to claim 1 or 2, wherein the semiconductor thin film is partially in contact with the semiconductor substrate through an opening provided in the insulating layer. Method of manufacturing a crystal layer.
、前記第２のレーザビームとしてＣＷ−ＣＯ＿２レーザ
を用いることを特徴とする特許請求の範囲第１項又は第
２項記載の半導体薄膜結晶層の製造方法。(4) A semiconductor thin film crystal layer according to claim 1 or 2, characterized in that a CW-Ar laser is used as the first laser beam, and a CW-CO_2 laser is used as the second laser beam. manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16490784A JPS6143409A (en) | 1984-08-08 | 1984-08-08 | Manufacture of semiconductor thin film crystal layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16490784A JPS6143409A (en) | 1984-08-08 | 1984-08-08 | Manufacture of semiconductor thin film crystal layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6143409A true JPS6143409A (en) | 1986-03-03 |
Family
ID=15802127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16490784A Pending JPS6143409A (en) | 1984-08-08 | 1984-08-08 | Manufacture of semiconductor thin film crystal layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6143409A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56142630A (en) * | 1980-04-09 | 1981-11-07 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1984
- 1984-08-08 JP JP16490784A patent/JPS6143409A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56142630A (en) * | 1980-04-09 | 1981-11-07 | Fujitsu Ltd | Manufacture of semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4375993A (en) | Method of producing a semiconductor device by simultaneous multiple laser annealing | |
| JPS60245174A (en) | Manufacture of insulated gate type semiconductor device | |
| US4659422A (en) | Process for producing monocrystalline layer on insulator | |
| JPS62181419A (en) | Recrystallization method of polycrystalline silicon | |
| JPH0410216B2 (en) | ||
| JPH09260676A (en) | Method for manufacturing thin film transistor | |
| JPS61116820A (en) | Annealing method for semiconductor | |
| JPS6143409A (en) | Manufacture of semiconductor thin film crystal layer | |
| JPH06132306A (en) | Method for manufacturing semiconductor device | |
| JPS58192381A (en) | Manufacture of mos field effect transistor | |
| JPH0556314B2 (en) | ||
| JPS5814525A (en) | Manufacturing semiconductor device | |
| JP3210313B2 (en) | Method for improving characteristics of polycrystalline silicon thin film | |
| JPH0454964B2 (en) | ||
| JPS6380521A (en) | Manufacture of semiconductor thin film crystal layer | |
| JPS61226916A (en) | Inversion of polycrystal semiconductor material to monocrystal semiconductor material | |
| JPS5928328A (en) | Preparation of semiconductor device | |
| JPS60161396A (en) | Manufacture of silicon thin film | |
| JPS61102723A (en) | Manufacture of semiconductor device | |
| JPS5837919A (en) | Manufacture of semiconductor device | |
| JPH0235710A (en) | Forming method for thin film semiconductor layer | |
| JPS5825220A (en) | Manufacture of semiconductor substrate | |
| JPH0236051B2 (en) | ||
| JPS62216368A (en) | Manufacture of semiconductor device | |
| JPH0472615A (en) | Manufacture of semiconductor device |