JPS6143444A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To produce a semiconductor while preventing any crystal defect in Si substrate from happening by a method wherein an SiO2 film pad regions are preliminarily formed on the ends of shading Si3N4 film while LOCOS oxide films are formed to reduce the contact space between the Si3N4 film and the Si substrate. CONSTITUTION:An SiO2 film 12 is thermo-formed on a substrate 11 while an Si3N4 film 13, an SiO2 film 14 and another Si3N4 thin film 15 are deposited to form a three layered film. An SiN4 film 16 and another SiO2 film 17 are deposited on the three layered film pattern to form a sidewall film and then the surface of substrate 11 is thermo-oxidized to form oxide film 18 to be implanted with boron B. Then the sidewall SiN4 film 19 and SiO2 film 20 are respectively formed on the surface of oxide films 18. At this time, the relation between the distance (l) from one end of lug region 19' to the other end coming into contact with the substrate 11 and the other distance L as the base of film 20 shall be L>l. Next the films 18 excluding the regions of film 20 and the distance L are removed by etching process to form an insulating structure provided with SiO2 pads 18' outside the ends of regions 19' of films 19. When the insulating structure is LOCOS oxidized to form SiO2 oxide films 21, boron may be diffused therein to form P<+> layers 22.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention C relates to a method for manufacturing a semiconductor device, in which 9S, especially 1e! Si local acid 1a 1,0CO8 (Local
This is related to the Oxidrcjionof5llicon) method.

[Background of the invention]

In a semiconductor device such as an MO8 type VLSI, it is necessary to form the dimensions of an insulating region between each element with submicro/order accuracy. In the so-called LOCO8 method, which has been commonly used, Si3N4 is used as a mask during absolute R oxidation.
An unnecessary 5ins region of about 1 to 2 μm called a bird's beak is formed because oxygen 02 enters due to the edge force of the film, and the insulating region is 2X (1 to 2
μm), and therefore a wasted space is created by that amount.

This bird's beak region is formed because a SiO2 thin film exists under the 5isN4 film as a mask to alleviate stress. Therefore, a number of methods have been proposed for alleviating the influence of this SiOx thin film, and a typical example is SWAMI (Side Wall
A masked l5olation) method has been proposed. This method is THE SWAMI-A.
Defect free and near zero
Bird'5Beak 1ocnl oxidat(
on process and 1tsapplica
tion in VLSI technology,
IEDM-82#9.3, PP224. In order to completely prevent lateral oxidation in the active region, the Si3N film is characterized by providing walls of 81 i N4 not only on the top surface of the active region but also on the side surfaces thereof, as described in .

That is, as shown in FIG. 1, after forming the entire two-layer film pattern 4 of the stress-relieving SiO2 film 2 and the first 5iIN film 3 on the 5iOc board 1, the stress-relaxing 5iOc film 2 is formed. The side wall 5 of the 5i5N4 film is formed on the side surface 2, and the ear-shaped region 6t of the Si3N4 film in direct contact with the Si substrate IK is connected to the wall 5 of the 5i5N4 film 2 to prevent oxidation. It completely prevents it from entering.

However, according to this method, as shown in the enlarged cross-sectional view of the main part in FIG.
is N4 M 3 + 5 and not satisfied 81
The oxidation of the Si region on the surface of the substrate 11 is shown in FIG.
b).

As the process proceeds in the order of (c), the 7'cSiOz region 7 formed in this Si region pushes up the ear-shaped region 6 of the Si3N4 film, and as a reaction, the SI substrate 11 at the bottom surface 0 point of the wall 5 of the Si3N4 film pushes up. It will cause stress to you. As a result, S is N4.
This results in the generation of all crystal defects. In this case, Si!
The length AOt of the N4 ear-like region 6 - the moment of pushing up is expressed as the product (Fxg) of the force F required to push up the A side gold of the ear-like region 6 and the distance to the 0 point + 1ffl t. Since the force F is almost constant, the smaller the distance t, the larger the force F becomes, and this becomes a reaction, and the force required to push down the 0 point all the way becomes stronger.As a result, crystal defects are generated in the St substrate 11 at the 0 point. , the characteristics as a VLSI will deteriorate.

[Purpose of the invention]

Therefore, the present invention has been made in view of the above-mentioned problems, and its purpose is to increase the distance t of the ear-like regions of the 81sN4 film, reduce the force Ft required for pushing up, and reduce crystal defects in the St substrate. An object of the present invention is to provide a method for manufacturing a semiconductor device that completely prevents the occurrence of .

[Summary of the invention]

In order to achieve such an object, the present invention provides 5isN+
Stress can be alleviated by increasing the distance of the ear-shaped region of the membrane. However, since the auricular region is S
Since it is welded to the i-substrate [4], increasing the distance t2 increases the stress with the Si-substrate. For this reason, 5i
5isN
It is necessary to reduce the direct contact area between the four ear-shaped areas and the Si substrate to reduce the stress between them.

[Embodiments of the invention]

Next, the implementation of the present invention will be explained in detail using the drawings.

FIGS. 3(a) to 3(9) are cross-sectional process diagrams of essential parts for explaining an example of a method for manufacturing a semiconductor device according to the method of &i. In the same figure, first, as shown in FIG. 3(a) K, a 5i02 film 12 for stress relaxation is thermally formed on a P-type Si substrate 11 to a thickness of about 20 OA, and then a first film 12 as a mask is formed.
ShN4) Odor 13 and the first 5to2 film 14 and the second
5isN4 film 15 and about 70OA each.

A three-layer film is formed by depositing on a float of about 1.0 μm and about 200 A by the LPCVD method, and the gold is further anisotropically etched to form a 3N film pattern having predetermined dimensions. Next, on this 37ii film pattern, a third 5isN4 film 16 and a second S i Ox
Film 17 and all f1200-300X, 0.2-0.
After depositing the film to a thickness of 3 μm using the LPG'VD method, anisotropic etching was performed to form a sidewall Si3Ng film 16' as shown in FIG.

S10! A film 17'ffi is formed, and then boron Bt-
Approximately 1014 ions/cm2 of ion implantation is performed. In this case, the width t of the bottom of the sidewall 5isNn film 16'
0 is selected to be a size in the range of 0.1 to 0.5 μm as necessary. Next, after removing the sidewall SiO2 film 17''z by etching, as shown in FIG. In this case, the thickness of the thermal oxide film 18 is selected to be in the range of 200 to 100 OA as necessary.
The Ni film 16' was removed by p-etching with gold phosphoric acid, and the same figure ((
Boron B as a channel stopper as shown in 1)
After implanting approximately 1014 pieces/crn2, a fourth Si3N4 film is deposited on the top surface at approximately 400 A and a third S l0
zi f: L to a thickness of 0.3 to 0.5 μm, respectively
The sidewall 5i3N was deposited by PC'VD and anisotropically etched as shown in the same figure (e).
4Jli19 and side wall SiOzg￥20
form each. In this case, sidewall 5is
The contact distance t between the ear-shaped region 19' of the N4 film 19 and the Si substrate 11, and the sidewall Si3N4B! Dimension t E+! so that the length L of the hem of X has a relationship of LEt! I
Arrange. Next, the first 5loz film 14. side wall 5
102 film 20 and the thermal oxide film 1 other than the area at the distance
When 810□ is removed by etching, an insulating film structure having 810□ pad portions 18' is formed at the ends of the ear-like regions 19' of the Tidwall 5isN4 film 19, as shown in FIG. 5F. When LOCO8 oxidation is performed on such a shape so as to stop at the zero point, an insulating LOCO8510z oxide film 21' is formed as shown in FIG.

In this case, the boron B ion-implanted into the 81 substrate 11 is diffused inside, and the P+ layer 22 is formed at the same time. Next, the first Si3N4 film 13 and the sidewall 5isN+ film 19 are removed using phosphor.

〔Effect of the invention〕

According to the present invention as explained above and 1c, S10! In a semiconductor device having a shielding Si s Na film in contact with an Sl substrate on the side surface of a LOGO3Si oxidation mask consisting of a film and a 5isN← film, a 5in2 band region is formed in advance at the tip of the shielding 5isNs film. By forming 5isNi for shielding, the contact area between the film and the Si substrate is made smaller, and by forming LOGO8 oxide at after the shielding, the stress between the two is alleviated.
Occurrence of crystal defects in the substrate? It has extremely excellent effects in that it can reliably prevent the problem and provide a high-quality, highly reliable cow conductor device.

[Brief explanation of the drawing]

FIGS. 1 and 2 are cross-sectional views of essential parts for fully explaining an example of a conventional semiconductor device manufacturing method, and FIGS. 3(a) to 3(w)
1 is an enlarged cross-sectional process diagram of a main part for fully illustrating an example of a method for manufacturing a semiconductor device according to the present invention. 11: Fist: ΦP type St substrate, 12: Stress relaxation layer Sigh film, 13: First S i s N4 trace, 14: Fist: First 5t02 film, 15: Meeting Q Second 5isN4 membrane, 16 fist...Third 5isN4 membrane, 16
'... Sidewall 5isN4 membrane, 1T...
・Second Si (h film, 17' curvature/Φ/sidewall 5ift film, 18...thermal oxidation film, 19...
・Side wall Si3N4 film, 19' ... Ear-shaped area, 20 ... Side wall /'5102 film, 21
...5iO2rR film, 22-----P”Ff4゜Figure 1. (C1 Figure 3 Figure 30 Procedural amendment (Representation of method case 1982 Patent Application No. 16491, Title of invention Semiconductor device Relationship with the person who amends the manufacturing method of the patent applicant Name +51+1i1:l Formula
Company Hitachi Manufacturing Office Fee
Subject of the administrator's amendment Contents of the amendment in the detailed description of the invention in Specification 111 1. rTHE on page 2, line 17 to page 3, line 1 of the specification
SWAMI-ΔD effect free
d near zero Bird's Be
ak 1localoxidation proc
ess and its applica
tionin VLSI technology,
IEDM-82#9.3. PP 224. J as “IEDM”82 9.3
The article written on pages 224 to 227 titled "Selective oxidation process SWAMI with no defect generation and bird's beak close to atmosphere and its application to VLSI technology (THE SWAM)"
I-A DEFECT FREE AND N
EAR-ZEROBIRD'5-BEAK LOCA
LOXIDATION PROCESS ANDI
TS APPLICATION IN V
LSITECHNOLOGY)J and correct it. that's all

Claims (1)

[Claims] LOC consisting of SiO_2 film and Si_3N_4 film
Si in contact with the Si substrate on the side of the OSSi oxidation mask
A method for manufacturing a semiconductor device in which a LOCOS oxide film is formed by forming a _3N_4 film and performing LOCOS oxidation, characterized in that an SiO_2 pad region is formed in advance at the tip of the Si_3N_4 film in contact with the Si substrate. Method of manufacturing the device.