JPS6147020B2 - - Google Patents
Info
- Publication number
- JPS6147020B2 JPS6147020B2 JP7007378A JP7007378A JPS6147020B2 JP S6147020 B2 JPS6147020 B2 JP S6147020B2 JP 7007378 A JP7007378 A JP 7007378A JP 7007378 A JP7007378 A JP 7007378A JP S6147020 B2 JPS6147020 B2 JP S6147020B2
- Authority
- JP
- Japan
- Prior art keywords
- channel
- register
- assignment
- dsi
- pcm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000015654 memory Effects 0.000 claims description 97
- 238000012545 processing Methods 0.000 claims description 46
- 238000003780 insertion Methods 0.000 claims 8
- 230000037431 insertion Effects 0.000 claims 8
- 238000001514 detection method Methods 0.000 description 16
- 230000006870 function Effects 0.000 description 15
- 230000005540 biological transmission Effects 0.000 description 11
- 230000008859 change Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 9
- 238000000034 method Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 4
- 238000003745 diagnosis Methods 0.000 description 3
- 230000007257 malfunction Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 1
- 238000013481 data capture Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 238000004092 self-diagnosis Methods 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/17—Time-division multiplex systems in which the transmission channel allotted to a first user may be taken away and re-allotted to a second user if the first user becomes inactive, e.g. TASI
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7007378A JPS54161217A (en) | 1978-06-09 | 1978-06-09 | Processor for digital sound insertion |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7007378A JPS54161217A (en) | 1978-06-09 | 1978-06-09 | Processor for digital sound insertion |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54161217A JPS54161217A (en) | 1979-12-20 |
| JPS6147020B2 true JPS6147020B2 (de) | 1986-10-17 |
Family
ID=13420993
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7007378A Granted JPS54161217A (en) | 1978-06-09 | 1978-06-09 | Processor for digital sound insertion |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54161217A (de) |
-
1978
- 1978-06-09 JP JP7007378A patent/JPS54161217A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54161217A (en) | 1979-12-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5596540A (en) | Serial to parallel and parallel to serial architecture for a RAM based FIFO memory | |
| US4056851A (en) | Elastic buffer for serial data | |
| US6345334B1 (en) | High speed semiconductor memory device capable of changing data sequence for burst transmission | |
| US5956349A (en) | Semiconductor memory device for high speed data communication capable of accurate testing of pass/fail and memory system employing the same | |
| EP0330475A2 (de) | Konfigurationssteuerungssystem | |
| CN111400205A (zh) | 一种先进先出地址轮询缓存读写方法、系统及装置 | |
| US4345325A (en) | Message-interchange circuitry for microprocessors linked by synchronous communication network | |
| JP2596208B2 (ja) | メモリ装置 | |
| US20030167368A1 (en) | Transmission control circuit, reception control circuit, communications control circuit, and communications control unit | |
| US5835742A (en) | System and method for executing indivisible memory operations in multiple processor computer systems with multiple busses | |
| US6327667B1 (en) | Apparatus and method for operating clock sensitive devices in multiple timing domains | |
| JPS6147020B2 (de) | ||
| KR0182342B1 (ko) | 동기식 메모리를 갖는 정보처리장치 및 동기식 메모리 | |
| US7577894B2 (en) | Apparatus and method for judging the legitimacy of transfer data | |
| US5691977A (en) | Virtual channel converter and VCC table access method | |
| JPH0217821B2 (de) | ||
| JPS6148301B2 (de) | ||
| JPS58130651A (ja) | デ−タ受信方式 | |
| US6535935B1 (en) | Method of sending data streams using a refetchable first-in-first-out memory which is read in a sequence that backs-up | |
| JPH0115900B2 (de) | ||
| JP2953362B2 (ja) | Lanのスイッチング装置 | |
| JPH0637852A (ja) | 通信制御装置 | |
| JPH0486032A (ja) | 音声コーデック | |
| JPS6153738B2 (de) | ||
| JPS632386B2 (de) |