JPS614977A - Characteristic measuring device for semiconductor element - Google Patents

Characteristic measuring device for semiconductor element

Info

Publication number
JPS614977A
JPS614977A JP12610584A JP12610584A JPS614977A JP S614977 A JPS614977 A JP S614977A JP 12610584 A JP12610584 A JP 12610584A JP 12610584 A JP12610584 A JP 12610584A JP S614977 A JPS614977 A JP S614977A
Authority
JP
Japan
Prior art keywords
measured
signal
semiconductor element
gain
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12610584A
Other languages
Japanese (ja)
Inventor
Junichi Shimoda
下田 準一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12610584A priority Critical patent/JPS614977A/en
Publication of JPS614977A publication Critical patent/JPS614977A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PURPOSE:To detect accurately a gain variation point in a linear operation range by adding a low-frequency, low-level signal to a high-frequency signal supplied to a semiconductor element to be measured, and measuring the variation of an output signal caused by the variation of an input signal to the semiconductor element to be measured. CONSTITUTION:The measuring device consists of a signal generator 1, directional coupler 2, semiconductor element 3 to be measured, wattmeters 4 and 5, and control part 6. Amplitude modulation is imposed upon the output signal of the signal generator 1 and the modulated signal is applied to the semiconductor element 3 to be measured through the directional coupler 2. Then, the applied electric power and the output electric power of the semiconductor element 3 to be measured are measured by the wattmeters 4 and 5, whose measured values are inputted to the control part 6. Further, the control part 6 measures the difference between the measured values to calculate the gain variation point in the linear operation range accurately.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は半導体素子の特性装置に関し、特にその電力利
得測定装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device characteristic device, and more particularly to a power gain measuring device thereof.

(従来技術) 例えば、トランジスタの印加電力とその出力電力の関係
においては、印加電力の増加に対応して、出力電力が一
定の増幅率で増加する直線増幅領域と、印加電力の増加
に対応して、出力電力の増幅率がしだいに下がりながら
増加する非直線増幅領域がある。
(Prior art) For example, in the relationship between the applied power of a transistor and its output power, there is a linear amplification region where the output power increases with a constant amplification factor as the applied power increases, and a linear amplification region where the output power increases with a constant amplification factor as the applied power increases. Therefore, there is a non-linear amplification region where the amplification factor of the output power gradually decreases and increases.

例えば上記で示した直線増幅領域において、一定利得を
示さないトランジスタを用いた多段増幅器を構成した場
合、増幅器性能を著しく損なう原因となる為、直線領域
におけるわずかなトランジスタの利得の変化について正
確に測定する装置が必要となる。
For example, in the linear amplification region shown above, if a multi-stage amplifier is configured using transistors that do not exhibit a constant gain, it will cause a significant loss of amplifier performance, so it is necessary to accurately measure slight changes in transistor gain in the linear region. A device is required to do this.

直線領域における利得変化の測定方法として従来は出力
信号レベル及び周波数の安定した信号発生器を用い、ト
ランジスタが充分に直線増幅領域で動作するレベルまで
、大刀信号を下げ、大刀信号をしだいに増加させて非直
線増幅領域に至るまで測定を進め、その直線領域の利得
変化、つまり傾きの変化を測定する方法が一般に考えら
れる。
The conventional method for measuring gain changes in the linear region is to use a signal generator with stable output signal level and frequency, lower the long signal to a level at which the transistor sufficiently operates in the linear amplification region, and then gradually increase the large sword signal. Generally, a method is considered in which the measurement is continued until the nonlinear amplification region is reached, and the change in gain, that is, the change in slope, in the linear region is measured.

第3図は、従来のトランジスタ人力拳出力信号特性測定
装置のシステムブロック図を示すもので、信号発生装置
1から方向性結合器2を介して被測定トランジスタ3へ
入力信号が印加され、電力計4で入力信号レベルを測定
するとともに、被測定トランジスタ3からの出力電力は
電力計5で測定される。
FIG. 3 shows a system block diagram of a conventional transistor output signal characteristic measuring device, in which an input signal is applied from a signal generator 1 to a transistor to be measured 3 via a directional coupler 2, and a power meter The input signal level is measured at 4, and the output power from the transistor to be measured 3 is measured at wattmeter 5.

(発明が解決しようとする問題点) この場合、直線動作領域の利得変化を求める場合、直接
求められない為、直線利得を正確に求めわずかな利得変
化を検出する際、繰シ返し測定を行う必要があると共に
、電力利得の変換を測定毎に行なわなければならないな
ど、長い測定時間を必要とすること、又、利得のわずか
な変化を見い出す為の測定精度を有しない欠点がある。
(Problem to be solved by the invention) In this case, when determining the gain change in the linear operating region, it cannot be determined directly, so repeated measurements are required to accurately determine the linear gain and detect slight gain changes. In addition, it requires a long measurement time, such as converting the power gain for each measurement, and has the disadvantage that it does not have the measurement accuracy to detect slight changes in gain.

本発明の目的は、直線動作領域における利得変化点を正
確に求めることを可能にした測定装置を提供することに
ある。
An object of the present invention is to provide a measuring device that makes it possible to accurately determine a gain change point in a linear operating region.

(問題点を解決するだめの手段) 本発明によれば、被測定半導体素子へ印加する高周波信
号に低周波数低信号レベルの信号を付加した信号を用い
、被測定半導体素子への印加電力を検出する第1の検出
部と、被測定半導体素子からの出力電力を検出する第2
の検出部と、第1及び第2の検出部の検出値に基いて所
定の処理を行う制御部を含み、制御部にお2いて、第1
及び第2の検出部からの信号レベル差を求め、被測定半
導体素子の増幅特性における、電力利得一定領域におけ
る不具合部を検出する半導体素子の特性測定装置を得る
(Means for solving the problem) According to the present invention, the power applied to the semiconductor device under test is detected using a signal obtained by adding a low frequency, low signal level signal to the high frequency signal applied to the semiconductor device under test. a first detection section that detects the output power from the semiconductor device under test;
a detection unit, and a control unit that performs predetermined processing based on the detection values of the first and second detection units;
and a signal level difference from the second detection section to obtain a semiconductor device characteristic measuring device that detects a defective portion in a constant power gain region in the amplification characteristic of the semiconductor device under test.

(実施例) 以下、図面を用いて本発明の一実施例を説明する。(Example) An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例による特性測定装置のブロッ
ク図で、信号発生器lの出方信号に振幅変調を施し、方
向性結合器2を介して、被測定トランジスタ3へ印加さ
れる。被測定トランジスタ3への印加電力は、電力計4
で正確に測定され、又、被測定トランジスタ3の出力電
力は電力計5で正確に測定される。電力計4及び電力計
5の各測定値は、制御部6へ入力され、その差を測定す
る。
FIG. 1 is a block diagram of a characteristic measuring device according to an embodiment of the present invention, in which an output signal from a signal generator 1 is amplitude-modulated and applied to a transistor under test 3 via a directional coupler 2. . The power applied to the transistor under test 3 is determined by the wattmeter 4.
The output power of the transistor to be measured 3 is accurately measured by the wattmeter 5. The measured values of the wattmeter 4 and the wattmeter 5 are input to the control unit 6, and the difference between them is measured.

本測定装置では被測定トランジスタの入力・出力電力特
性の直線増幅領域の非直線部を求める為、規定の高周波
信号に低周波・低レベルの信号を付加し、被測定トラン
ジスタの入力信号の変化に対する出力信号の変化を測定
する。つまり利得の増減に伴い、出力信号の変化は、明
確に増加及び減少状態を示す。以下第2図にトランジス
タの入力・出力電力特性を示し説明を進める。
In this measurement device, in order to find the non-linear part of the linear amplification region of the input/output power characteristics of the transistor under test, a low frequency/low level signal is added to a specified high frequency signal. Measure changes in the output signal. In other words, as the gain increases or decreases, the output signal clearly shows increases and decreases. The explanation will be continued below by showing the input/output power characteristics of the transistor in FIG.

正常なトランジスタの入力・出力電力特性は、特性10
を示すが、入出力特性に利得変化を有するトランジスタ
は特性11に示す様な直線増幅領域において利得の変化
部が生じる。つまシ、制御部6の出力信号と、各特性線
図について示すと、正常なトランジスタについては、制
御部6の出力信号は直線増幅領域では傾き零の直線とな
シ、非直線増幅領域(飽和領域)内において電力利得が
しだいに下がるに従い、前記出力信号レベルも下がって
くる特性12となる。
The input/output power characteristics of a normal transistor are characteristic 10.
However, in a transistor having a gain change in its input/output characteristics, a change in gain occurs in the linear amplification region as shown in characteristic 11. Regarding the output signal of the control unit 6 and each characteristic diagram, for a normal transistor, the output signal of the control unit 6 is a straight line with zero slope in the linear amplification region, and in the non-linear amplification region (saturated As the power gain gradually decreases within the region), the output signal level also decreases (characteristic 12).

しかし、直線増加領域において一定の電力利得を有しな
いトランジスタの制御部6の出方信号は、電力利得一定
領域の傾き零の直線に対し、利得変化が生じた場合、前
記直線の上・下に変化を有する特性線図13の様な信号
となる。
However, when a gain change occurs, the output signal from the control unit 6 of a transistor that does not have a constant power gain in the linear increasing region is above or below the straight line with zero slope in the constant power gain region. This results in a signal with changes as shown in characteristic diagram 13.

(発明の効果) このように、トランジスタの入力信号の一定な変化に対
し、出力信号がわずかであるが急峻な変化を示す場合、
従来の測定では、利得変化部の検出が困難であったが1
本測定装置を用いることKよシ、利得変化部の存在を明
確に検出することが可能である。又、電力用トランジス
タの測定においては、測定時間が長°くなることにより
、トランジスタの熱的変動が大きくなシ、信号の微少変
化及び再現性を測定する場合、正確性が欠如する為、極
力測定時間の減少を計る必要かあ#)、その面からも本
測定装置は作業時間の減少と合わせ、トランジスタの正
確な特性を測定する為に極めて有効である。
(Effect of the invention) In this way, when the output signal shows a slight but steep change in response to a constant change in the input signal of the transistor,
In conventional measurements, it was difficult to detect the gain changing part, but 1
By using this measuring device, it is possible to clearly detect the presence of the gain changing section. In addition, when measuring power transistors, the measurement time is long, which causes large thermal fluctuations in the transistor, and when measuring minute changes in signals and reproducibility, there is a lack of accuracy. Is it necessary to measure the reduction in measurement time? From this point of view as well, this measuring device is extremely effective in reducing the working time and measuring accurate characteristics of transistors.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の一実施例による入力書出力特性測定
装置のシステムブロック図、第2図(a)。 (b)は本実施例による入力・出力電力特性図および入
力・利得特性図である。 第3図は従来の入力・出力特性測定装置のシステムブロ
ック図でめる。 1・・・・・・信号発生器、2・・・・・・方向性結合
器、3・・・・・・被測定半導体素子、4,5・・・・
・・電力計、6・・・・・・制御部、10・・・・・・
正常なトランジスタの入力・出力電力特性図、11・・
・・・・直線増幅領域に利得変化を有するトランジスタ
の入力・出力電力特性図、12・・・・・・特性図10
に対する制御部6の出力信号、13・・・・・・特性図
tiに対する制御部6の出力信号。 竿 / 圏 芋 2 図
FIG. 1 is a system block diagram of an input/output characteristic measuring device according to an embodiment of the present invention, and FIG. 2(a) is a block diagram of the system. (b) is an input/output power characteristic diagram and an input/gain characteristic diagram according to the present embodiment. FIG. 3 is a system block diagram of a conventional input/output characteristic measuring device. 1... Signal generator, 2... Directional coupler, 3... Semiconductor element under test, 4, 5...
...Power meter, 6...Control unit, 10...
Input/output power characteristic diagram of a normal transistor, 11...
...Input/output power characteristic diagram of a transistor with gain change in the linear amplification region, 12...Characteristic diagram 10
13... Output signal of the control unit 6 for the characteristic diagram ti. Rod / Circle Potato 2 Diagram

Claims (1)

【特許請求の範囲】[Claims] 被測定半導体素子へ印加する高周波信号に低周波数低信
号レベルの信号を付加した信号を用い、被測定半導体素
子への印加電力を検出する第1の検出部と、前記被測定
半導体素子からの出力電力を検出する第2の検出部と、
前記第1及び第2の検出部の検出値に基づいて所定の処
理を行う制御部とを含み、前記制御部において、前記第
1及び第2の検出部からの信号レベル差を求め、前記被
測定半導体素子の増幅特性における、電力利得一定領域
における不具合部を検出することを特徴とする半導体素
子の特性測定装置。
a first detection unit that detects power applied to the semiconductor device under test using a signal obtained by adding a low frequency, low signal level signal to a high frequency signal applied to the semiconductor device under test; and an output from the semiconductor device under test. a second detection unit that detects electric power;
a control section that performs a predetermined process based on the detection values of the first and second detection sections, in the control section, a signal level difference from the first and second detection sections is determined, A characteristic measuring device for a semiconductor device, characterized in that it detects a defective part in a constant power gain region in the amplification characteristic of the semiconductor device to be measured.
JP12610584A 1984-06-19 1984-06-19 Characteristic measuring device for semiconductor element Pending JPS614977A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12610584A JPS614977A (en) 1984-06-19 1984-06-19 Characteristic measuring device for semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12610584A JPS614977A (en) 1984-06-19 1984-06-19 Characteristic measuring device for semiconductor element

Publications (1)

Publication Number Publication Date
JPS614977A true JPS614977A (en) 1986-01-10

Family

ID=14926739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12610584A Pending JPS614977A (en) 1984-06-19 1984-06-19 Characteristic measuring device for semiconductor element

Country Status (1)

Country Link
JP (1) JPS614977A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6417637A (en) * 1987-07-14 1989-01-20 Masahiko Hoshino Fiber treatment instrument

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379468A (en) * 1976-12-24 1978-07-13 Nec Corp Measurement method for element characteristics
JPS58179364A (en) * 1982-04-14 1983-10-20 Nec Corp Characteristic measuring device of semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5379468A (en) * 1976-12-24 1978-07-13 Nec Corp Measurement method for element characteristics
JPS58179364A (en) * 1982-04-14 1983-10-20 Nec Corp Characteristic measuring device of semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6417637A (en) * 1987-07-14 1989-01-20 Masahiko Hoshino Fiber treatment instrument

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