JPS6150352A - Semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) This invention relates to a semiconductor device mounted in a hollow plastic type package.

(Prior art) The hollow plastic type package, which is a conventionally well-known packaging method, uses molding to form a hollow part in which a semiconductor element is mounted, a so-called cavity part, and a thin metal wire connection part for leading to the outside. It is a resin-sealed package.

An EPROM device (ultraviolet erasable programmable read only memory) using these conventional hollow plastic type packages will be explained with reference to FIG. In Fig. 2, the lead frame 1 used in the hollow plastic type package is spot-plated with gold, silver, etc. in a generally known shape, and these are used to form the hollow plastic type package.・
When manufacturing a package, the part that forms the hollow part 2 is
Since the lead frame 1 is compressed and held by the molding die and the molding resin is not press-fitted, a hollow portion 2 is formed.

In this manner, the semiconductor chip 4 is mounted on the hollow plastic type package 3 which has been compression molded into a hollow structure using hg paste or resin paste. Since this hollow glass type package 3 is made of resin, the semiconductor chip cannot be bonded at high temperatures, for example, by eutectic bonding.0 Surface external connection electrodes of the semiconductor chip 4 and external lead leads 5
and are connected and led out by a thin metal wire 6. The semiconductor chip 4 is sealed and protected by a lid member 7 that protects it from the outside.

This cover member 7 is bonded with epoxy resin and is used as a window for erasing ultraviolet rays of the EPROM chip. However, the material of the lid member 7 manufactured by the hollow plastic type package 3 is mainly alumina or quartz glass, but resin or the like may be used as long as it is transparent to ultraviolet rays.

(Problems to be Solved by the Invention) When a reliability test of an EPROM semiconductor device is performed at high temperature and high humidity, moisture infiltrates into s2 from the interface 8 between the external lead 5 and the package resin. Since corrosive (Na+, KO+, ci-) ions also enter together with the infiltrated moisture, there is a drawback that the aluminum wiring of the external connection electrode of the semiconductor chip 4 is corroded and disconnected. Furthermore, there is also the problem that corrosive ions enter through the bonded portion of the lid member 7.

1 On the other hand, as a prior art document,
No. 183086 discloses a technique for molding an EPROM into a Cerdaig type plastic mold. That is, the process of mounting the EPROM chip on the element mounting part of the lead frame, and then
In an E P ROM device that includes the process of connecting the M chip and the terminal portion of the lead frame with a thin metal wire, the EPR
A metal wire M is connected so that the EPROM chip faces the bottom of a bottomed case that has an opening large enough to accommodate the OM chip and is made of a material that transmits ultraviolet rays at least at the bottom. The frame is placed in the opening, and then a resin that transmits ultraviolet light is injected into the bottomed housing, and then a part of the terminal part of the lead frame protrudes into the resin mold, and the bottom outer surface of the bottomed housing is Disclosed is a resin molding mold in which the resin molding mold is arranged so as to be in close contact with the inner wall, and an insulating resin is injected into the remaining part of the resin molding mold.

As another prior art document, Japanese Patent Application No. 1i1358-2
24393, a conductive wiring pattern is formed on the main surface of an insulating substrate, an EPROM chip is placed in the chip mounting area of the insulating substrate with the ultraviolet irradiation surface facing upward, and the electrodes of the EPROM chip are and a conductive wiring pattern are connected with a thin metal wire, and UV-transparent glass-1F
No. c discloses a synthetic resin cap that covers and seals the EPROM chip and the wiring portion made of thin metal wires, and this cap is fixed to an insulating substrate.

(Means for Solving the Problems) This invention differs from the technical ideas disclosed in the above-mentioned prior art documents. The container is filled with resin and sealed with an ultraviolet-transparent lid member.

(Function) According to the present invention, since the semiconductor device is configured as described above, EPR is caused by moisture and corrosive ions that enter from the interface between the lead and resin of the FJPROM semiconductor TEG.
Corrosion breakage of OM semiconductor chip surface wiring metal #! Take care to do what you can to prevent this.

(Embodiments) Hereinafter, embodiments of the semiconductor device of the present invention will be described based on the drawings. FIG. 1 is a sectional view of one embodiment.

In this Figure 1, this hollow glass type
In the EPROM device 20 using the package 1o, two EPROM semiconductor chips are mounted on the island 21 using AI paste, and the external connection aluminum electrode on the surface of the EPROM semiconductor chip 220 is connected to the external lead 2.
Metal wire #3 at the tip! The connection is derived by 24.

The periphery of the EPROM semiconductor tag 22 is filled with silicone resin 25 as a first resin, and external conductive leads 2 are filled.
Water, corrosive ions, etc. that enter through the interface 26 between the EPROM semiconductor chip 220 and the silicone resin 25
Prevents corrosion of externally connected aluminum electrodes on the surface.

The silicone resin 25 as the first resin is not limited to 7 Lico/resin as long as it is a resin with high adhesiveness and reliability.

As described above, the ultraviolet-transmissive cover member 2 of the EPROM semiconductor chip 2 is placed on top of the 7-liquid/tree canal 25 filled.
In the gap between 7 and 7, ultraviolet-transparent resin 2 as a second resin is placed.
If the number of cells is filled with 8, a more reliable EPROM semiconductor device can be obtained.

Further, the ultraviolet-transparent lid member 27Fi is adhesively fixed to the hollow plastic type package 10 with epoxy resin.

The manufacturing method of the embodiment of the semiconductor device of the present invention is to place an EPROM semiconductor chip 22 on an island 21 of a hollow plastic type package 10 using Ap paste, and connect an EPROM semiconductor chip 22 to the tip of an external lead 23 using a thin metal wire 24.
M semiconductor chip 22 is connected.

Thereafter, a silicone resin 2 as a first resin is applied in an amount that does not cover the surface of the EPROM semiconductor chip 220.
5 (for example, East, JCR6110 (product name)
).

However, if an ultraviolet-transparent resin (such as FC, Toshiba, JCR6122) is used as the first resin, it is generally possible to fill the hollow part or the filling amount to completely surround the EPROM semiconductor chip 22. It can be considered.

After filling the silicone resin 25, the gap between the EPROM semiconductor chip 22 and the UV-transparent lid member 27 is filled with UV-transparent resin 24, and then the UV-transparent lid member 27 made of a UV-transparent material is filled with epoxy resin. A semiconductor EPROM device is manufactured by bonding with an adhesive.

Since such epoxy resin adhesives and silicone resins are cured in 1 to 2 hours at 150 to 200°C, the epoxy resins forming the hollow plastic type package are not altered in quality.

Note that although reliability can be improved without filling the ultraviolet-transparent resin 28, it is better to fill it. This filling is done by botting from the top.

(Effects of the Invention) As explained above, the present invention has a structure in which the periphery of the 7ICEFROM semiconductor chip mounted in a hollow glass type package and its mounting portion are filled with a first resin, and the first resin is sealed with an ultraviolet-transparent lid member. Therefore, extremely high reliability can be obtained against intrusion of moisture, corrosive ions, etc. from the outside from the interface between the lead and the resin or from the resin surface.

However, since the entire EPROM semiconductor chip is surrounded by the first resin, it is resistant to mechanical shock and can be easily damaged.
Since the hollow part is filled with these resins when adhering the UV-transparent lid member, the void area becomes small, and the heating of the epoxy resin adhesive (100 to 20
0° C.), it has the advantage of reducing the occurrence of poor adhesion of the lid member, that is, leakage, in which the epoxy resin adhesive is blown out to the outside due to the high pressure in the hollow portion.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an EPROM device using a conventional hollow plastic type cage, and FIG. 2 is a sectional view of an embodiment of the semiconductor device of the present invention. 10... Hollow plastic type・) Kutu cage,
20...EPROMf! Place, 21...Island,
22... EPROM semiconductor chip, 23... External lead-out lead, 24... Metal thin wire, 25... Silicone resin, 26... Interface between external lead-out lead and silicone resin,
27... UV-transparent lid member, 28... UV-transparent resin.

Claims (1)

[Claims] E mounted in a hollow plastic type package
A PROM semiconductor chip, a thin metal wire connecting the EPROM semiconductor chip and an external lead, a first resin filled around the EPROM semiconductor chip including the thin metal wire, and an ultraviolet ray that seals the EPROM semiconductor chip. A semiconductor device comprising a transparent lid member.