JPS6155251B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a method of manufacturing an insulating isolation substrate used in a semiconductor integrated circuit device, and more specifically, to a method of manufacturing an insulating isolation substrate having a dielectric isolation structure made of silicon dioxide SiO ₂ . Dielectric isolation technology is suitable for high-speed integrated circuits because of its small capacitance, is suitable for high-voltage integrated circuits or power ICs because of its high breakdown voltage, and is easy to complement because it does not have latch-up. It has features such as being able to diffuse partial gold and achieving a high degree of integration.
Can be used widely. FIG. 1 shows a conventional method for manufacturing a dielectric isolation substrate. An oxide film 11 is formed on the surface of a single crystal silicon substrate 10, and this oxide film 11 is partially removed to expose the surface of the single crystal silicon substrate 10 (B). The (100) plane is selected as the surface of this substrate 10. When the substrate 10 is etched using the oxide film 11 as a mask, a V-shaped groove is formed due to the anisotropy of the crystal axes (C). Next, the surface of the V-shaped groove is oxidized (D). At this time, although not shown, an oxide film is also formed on the back surface of the substrate. Subsequently, when silicon is deposited on this surface, polycrystalline silicon 12 grows since it is the surface of oxide film 11.
At this time, the same polycrystalline silicon 12 grows on the back surface, although the thickness is smaller than that on the front surface (E). Finally, by polishing the back surface of the substrate 10 to expose the oxide film 11, a plurality of islands 13 of single crystal silicon are obtained. A major problem when manufacturing a dielectric isolation substrate as described above is warpage of the substrate. That is, the substrate warps toward the polycrystalline silicon layer, and the warpage ranges from 30 μm to 80 μm. This warping is a major factor in reducing the yield of dielectric isolation substrates and deteriorating the characteristics of elements formed thereon. These problems include: The stress of warping of the board causes the board to break or crack; the board is prone to cracking or cracking during polishing; distortion caused by warping of the board causes leakage current; It is said that the depth of the crystal islands becomes non-uniform, resulting in differences in the electrical characteristics of the elements formed therein. The present invention aims to solve the above-mentioned problems and obtain a dielectric isolation substrate with less warpage. There are several causes for the warpage of the substrate as described above. First, there is a difference in the coefficient of thermal expansion between the dielectric film of silicon dioxide SiO ₂ and polycrystalline silicon and single crystal silicon when polycrystalline silicon deposited at a high temperature of 600°C to 1200°C cools down to room temperature. It is a point. Normally, since polycrystalline silicon has a large coefficient of thermal expansion, the degree of contraction when cooling is also large. Second, the grain size of polycrystalline silicon is different between the deep part and the surface, and when the temperature drops from the high temperature during deposition to room temperature, the porous polycrystals on the surface increase in density due to the annealing effect. . At this time, warpage occurs. Thirdly, during the deposition of polycrystalline silicon,
Polycrystalline silicon grows parallel to the wafer surface within the V-shaped groove, but as the thickness increases, the growth direction becomes perpendicular, and the gap becomes more porous. The present invention is intended to reduce the warpage of the substrate mainly by eliminating the first cause mentioned above. That is, the above object is achieved by appropriately selecting the coefficient of thermal expansion of the layers formed on both the front and back surfaces of the substrate. The (linear) thermal expansion coefficients of various membranes used in carrying out the present invention are set out in the following table.

[Table] Examples of the present invention will be described below with reference to the above table and drawings. FIG. 2 is a front sectional view showing a method of manufacturing an insulating isolation substrate according to the present invention. A single crystal silicon substrate 20 is polished so that the surface becomes a (100) plane (A). An oxide film 21a is formed on the surface of the substrate 20, and a portion where a V-shaped groove is to be formed is etched to expose the surface of the substrate 20. At this time, an oxide film 21b is also formed on the back surface of the substrate,
Similarly, the portion where the V-shaped groove is to be formed is etched to expose the back surface of the substrate 20 (B). The part where the oxide film on the back side is removed, that is, the part where the V-shaped groove will be formed later, does not have to match the position of the V-shaped groove on the front side, but should be made so that the density of the grooves is the same. You should do it. When the single crystal silicon substrate 20 is etched using the oxide film 21 as a mask, a V-shaped groove 22 is formed in the exposed position of the substrate 20 by anisotropic etching (C). The V-shaped grooves 22 are formed so that they are distributed in the same proportion on the front and back surfaces, but the width and depth of the grooves are determined by the pattern of the mask.
When forming the pattern of the oxide film 21, it is sufficient to expose the same area of the substrate. next,
The exposed portion of the single crystal silicon substrate 20 in the V-shaped groove 22 is oxidized so that the entire substrate surface including the V-shaped groove is covered with the oxide film 21 (D).
This oxide film 21 is used to insulate the monocrystalline silicon islands, but is also necessary for the subsequent growth of the polycrystalline silicon layer. Single crystal silicon substrate 20 covered with oxide film 21
When silicon is grown on the surface, polycrystalline silicon 23a is deposited and grown on the surface (E). This polycrystalline silicon 23a is ultimately formed to have a thickness of about 400 μm. At this time, polycrystalline silicon 23b is also deposited and grown on the back surface, and the final thickness is about 80 μm. In the process of growing polycrystalline silicon mentioned above,
The present invention is characterized in that a film of another substance is temporarily grown. The growth of polycrystalline silicon 23a, 23b is stopped at a certain point, and the polycrystalline silicon 2 on the surface side is
A silicon oxide film 24 is formed on the surface of the polycrystalline silicon 23b on the back side, and a film 25 of a material having a larger coefficient of thermal expansion than the silicon oxide film is formed on the surface of the polycrystalline silicon 23b (F). The thickness of these films may be appropriately selected depending on the difference in thermal expansion coefficient between the silicon oxide film and the film of the material. After forming the film in this manner, polycrystalline silicon 23a' and 23b' are further formed to a predetermined thickness (G). A multilayer structure may be formed in which film formation and polycrystalline silicon formation are alternately repeated. After depositing polycrystalline silicon of a predetermined thickness,
Polishing is performed from the back side of the silicon substrate 20, that is, from the thin polycrystalline silicon side, so that the oxide film 21 is exposed (H). As a result, polycrystalline silicon 23
A single-crystal silicon island 20' supported by the oxide film 20 and isolated by the oxide film 21 is formed. As mentioned above, after depositing polycrystalline silicon at a high temperature, the polycrystalline silicon shrinks when the temperature is lowered to room temperature, causing the substrate to warp. However, a silicon oxide film (SiO ₂ ) is formed on the surface. This has the effect of suppressing polycrystalline silicon shrinkage. On the other hand, since a film of a substance with a large coefficient of thermal expansion is formed on the back surface, the shrinkage ratios of the front and back surfaces can be made the same, thereby preventing the substrate from warping. As mentioned above, the coefficient of thermal expansion of silicon oxide film (SiO ₂ ) is as small as 0.35×10 ⁻⁶ /° C., which is about one order of magnitude smaller than that of polycrystalline silicon. Therefore, as the thickness of the silicon oxide film increases, shrinkage of polycrystalline silicon can be prevented. There are various materials with higher coefficients of thermal expansion than silicon oxide films, but the higher the coefficient of thermal expansion, the thinner the film can be, so aluminum oxide (AlO ₃ ), titanium (Ti), titanium oxide (TiO ₂ ), and molybdenum (Mo ), tungsten (W), etc. are suitable. As described above, the shrinkage of the surface is kept small,
The substance acts to increase the shrinkage of the back surface, thereby preventing the substrate from warping. According to the present invention, when lowering the temperature after depositing polycrystalline silicon, it is possible to prevent the wafer from breaking or cracking due to stress caused by warpage of the wafer. Furthermore, the occurrence of cracks and cracks during polishing can be significantly reduced. As described above, not only is the manufacturing yield improved, but there are also the following advantages in terms of device characteristics. First, leakage current caused by distortion due to wafer warping is reduced, and noise is reduced. Next, the depth of each single-crystal silicon island is uniform, and the characteristics of the elements formed there are also uniform.

[Brief explanation of the drawing]

FIG. 1 is a front sectional view showing a conventional method for manufacturing an insulating isolation substrate, and FIG. 2 is a front sectional view showing a method for manufacturing an insulating isolation substrate according to the present invention. 10, 20... Single crystal silicon substrate, 11, 2
1... Oxide film, 12, 23... Polycrystalline silicon,
24... silicon oxide film, 25... film.

Claims (1)

[Claims] 1 Form a V-shaped groove on the surface of a single-crystal silicon substrate, form an oxide film on the surface of the single-crystal silicon substrate including the V-shaped groove, form a polycrystalline silicon layer on the oxide film, and In a method for manufacturing an insulating isolation substrate in which a plurality of single-crystal silicon islands are formed by polishing a single-crystal silicon substrate, a V-shaped groove is also formed opposite to the back surface of the single-crystal silicon substrate forming the V-shaped groove. However, a polycrystalline silicon layer is also formed on the back surface, and in the step of forming the polycrystalline silicon layer, a silicon oxide film is formed in the polycrystalline silicon layer on the front surface side, and a silicon oxide film is formed on the back surface side. A method for manufacturing an insulating isolation substrate, characterized in that each film is formed of a material having a large coefficient of thermal expansion.