JPS6162437U - - Google Patents

Info

Publication number
JPS6162437U
JPS6162437U JP14819384U JP14819384U JPS6162437U JP S6162437 U JPS6162437 U JP S6162437U JP 14819384 U JP14819384 U JP 14819384U JP 14819384 U JP14819384 U JP 14819384U JP S6162437 U JPS6162437 U JP S6162437U
Authority
JP
Japan
Prior art keywords
comparison circuit
comparison
differential pair
reference input
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14819384U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14819384U priority Critical patent/JPS6162437U/ja
Publication of JPS6162437U publication Critical patent/JPS6162437U/ja
Pending legal-status Critical Current

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Landscapes

  • Television Signal Processing For Recording (AREA)
  • Manipulation Of Pulses (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この考案の比較器の一実施例を示す
回路図、第2,3図は、それぞれ従来の比較器の
一例を示す回路図及び回路各部の信号波形図であ
る。 11…比較器、12…第1の比較回路、13…
第2の比較回路、Q1…基準入力用のトランジス
タ、Q2…比較入力用のトランジスタ、Q10…
ヒステリシス形成用のトランジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the comparator of this invention, and FIGS. 2 and 3 are a circuit diagram and signal waveform diagrams of various parts of the circuit, respectively, showing an example of a conventional comparator. 11... Comparator, 12... First comparison circuit, 13...
Second comparison circuit, Q1 ...transistor for reference input, Q2 ...transistor for comparison input, Q10 ...
Transistor for forming hysteresis.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基準入力用と比較入力用の一対のトランジスタ
が差動対を形成する第1の比較回路と、この第1
の比較回路の差動対出力をそれぞれ入力する一対
のトランジスタが差動対を形成する第2の比較回
路とからなり、前記第2の比較回路の出力を前記
第1の比較回路の側に帰還し、前記第1の比較回
路の基準入力の電位を2値的に可変する構成とし
てなる比較器。
a first comparison circuit in which a pair of transistors for reference input and comparison input form a differential pair;
and a second comparison circuit, each of which receives the differential pair outputs of the comparison circuits forming a differential pair, and the output of the second comparison circuit is fed back to the first comparison circuit. and a comparator configured to vary the potential of the reference input of the first comparison circuit in a binary manner.
JP14819384U 1984-09-29 1984-09-29 Pending JPS6162437U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14819384U JPS6162437U (en) 1984-09-29 1984-09-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14819384U JPS6162437U (en) 1984-09-29 1984-09-29

Publications (1)

Publication Number Publication Date
JPS6162437U true JPS6162437U (en) 1986-04-26

Family

ID=30706415

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14819384U Pending JPS6162437U (en) 1984-09-29 1984-09-29

Country Status (1)

Country Link
JP (1) JPS6162437U (en)

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