JPS61806A - Control computer - Google Patents

Abstract

PURPOSE:To detect easily a fault of a data line by latching ''H'' when both the data line and a strobe line are shifted at a time and then latching ''L'' when the data and strobe lines are shifted at different time points respectively. CONSTITUTION:A computer 1 delivers both the data and strobe. In a figure A the strobe is changed to ''H'' from ''L'' while the data is kept in the ''L'' period and therefore ''L'' emerges at the output Q of a D-FF2. While in a figure B the strobe has shifts at different time point from those when the data is shifted to ''H'', ''L'' and ''H''. In other words, ''H'' emerges at the output Q of the D-FF2 since the strobe is changed to ''H'' from ''L'' while the data is kept at ''H''. Thus the signal level repeats the temporary shifts on the data line for each output of data. Thus it is possible to detect a fault where the data line is fixed at ''H'' or ''L'' by monitoring the shift of the signal level.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a computer for controlling industrial processes. It is a block diagram showing the output method of a conventional control computer described in "Input/Output Control and System Configuration J" of Japan), and Fig. 2 is an operation timing diagram thereof. is a computer, and (2) is a D clip flop.The computer (1) issues a control command I based on the calculation result.
The computer (1) outputs H' or 'Ll. The computer (1) outputs data corresponding to the control command to the data input terminal of the D flip-flop (2). Next, a strobe pulse having the waveform shown in FIG. 2 is output to the clock C of the D free lag flock. D flip frog (2)
operates to cause the immediately preceding data input signal to appear on the output Q when the clock input C transitions from ILI to IHI. Therefore, the data output by the computer (1) is output as a control command. Figure 2 is a timing diagram showing the operation of the conventional control computer output method, where A is when outputting ILI, and B is when outputting IH'. This is the case when outputting. In either case, when the strobe pulse transitions from 'Ll to 'HI, the immediately preceding data is valid.0 Note that the shaded area indicates that it can take any value.

In other words, data valid as an output is supplied to the data input of the D flip-flop (2) for a limited time before and after the time when the stave transitions from ILI to l'HI, but at other times than the above-mentioned time. is supplied with arbitrary data.

Since the output method of the conventional control computer is configured as described above, the data line of the computer (1) is IHl or IH.
If a failure occurs that causes the device to become stuck, an incorrect control command will be output. Furthermore, even if noise is mixed into the strobe line, there is a risk that arbitrary data will be latched and a control command that has been latched will be output if the data is not available at a valid timing.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and the computer (1) is configured to temporarily transition the logic level of the data line and stroke each time an output is made. By latching IHI when data line and strobe line transitions occur at the same time, and by latching ILI when they occur at different times, data line failures can be easily discovered69 and noise resistance is improved. The present invention provides a control computer with an excellent output method.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, a computer (1) outputs data and a strobe at the timing shown in FIG. 3.

FIG. 3A shows the timing when outputting lHl. Since the strobe changes from 1L' to 'Hl while the data is ILI, the output Q K ILI of the D clip flop (2) appears.

FIG. 3B shows the timing when IHl is output, and the time when the data transitions from 'H# IILI to IHI is different from the time when the strobe transitions.

That is, during the period when the data is lHl, the strobe changes from lLl to IHI, so lHI appears at the output Q of the D flip-flop (2).

〔Effect of the invention〕

As described above, according to the present invention, the computer (1) is configured to identify the value of the data to be output according to the time at which the logic levels of the data line and the strobe line transition.
Since the signal level on the data line repeats temporary transitions every time data is output, by monitoring the transition of this signal level (the monitoring device is not shown), the data line can be
It is possible to detect a fault that is fixed to H' or ILI.0Also, for example, it is often output as independent data from the computer, such as the closing and tripping commands of a quick breaker, but it is useful for such applications. By using an output that is latched when the data line and strobe line transitions occur at the same time, it is possible to avoid accidentally turning on the fast breaker or tripping ft, D even if noise enters the strobe line. It will be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the output method of a conventional control computer, FIG. 2- is an operation timing diagram thereof, and FIG. (1) Calculator (2) Latch

Claims (1)

[Claims] (1) In a configuration where the computer outputs binary control commands to the process via a latch based on the calculation results, when data and strobe are output from the computer, if data and strobe transitions occur at the same time, When the first value data, data and strobe transition occur at different times, it is latched as second data, and the value of the output data is identified by the time at which the data and strobe transition. A control computer.