JPS6180836A - Semiconductor device having multilayer interconnection - Google Patents

Abstract

PURPOSE:To improve the working accuracy on the wiring of a bonding pad part by a method wherein, among three layers of aluminum wirings, at least a layer is not used as a bonding pad. CONSTITUTION:A contact photoetching is performed on a part of an oxide film 2, and the first layer of aluminum wiring 3 is formed by performing an evaporation of aluminum and a photoetching. Varnish of high purity by performing a baking, and a through hole is provided by performing a hydrazine etching. The second layer of aluminum wiring 5 is formed by performing the method same as above. The part overlapping with the first layer of aluminum wiring 3 is turned to a bonding pad 4 by the through hole. The second layer of interlayer insulating film 10, consisting of polyimide resin and having a through hole, is obtained and the third layer of aluminum wiring 11, which comes in contact with the second layer of aluminum wiring 5, is formed. A final protective film 6 is formed by boring a through hole on the wiring 11 and the second interlayer film of the bonding pad part is formed at the same time. The third layer of aluminum wiring 11 is the part which has nothing to do with the bonding pad part and it is used as a wiring.

Description

[Detailed description of the invention] The present invention relates to multilayer wiring technology in semiconductor devices.

〔Technical field〕

With the increase in the density of semiconductor devices, the conventional single-layer aluminum wiring structure has been replaced with a multilayer wiring structure, that is, two or three layers.

In multilayer wiring structures, 5iOz (silicon oxide), which is conventionally used as an insulating film between aluminum wiring layers.
The surface of the inorganic insulating film has larger steps toward the top, making it difficult to flatten the surface.

For this reason, in a two-layer or three-layer wiring structure, a highly heat-resistant organic resin, such as a polyimide resin, which does not allow surface flattening, is used. For this polyimide resin.

High purity polyimide resin PIQ (Hitachi Chemical's high quality product name) and photosensitive polyimide are known.

(Industrial Research Entire Publication, Electronic Materials, July 1983, p. 30 In a semiconductor device having a two-layer wiring structure, when a part of the wiring is used to form an external lead-out pad, a so-called bonding pad, as shown in Fig. 8), semiconductor substrate 1
On the surface oxide film 2 of
A structure in which a polyimide resin film 6 for Hoto is further formed on the surface is used.

As shown in the figure, the bonding pad part 7 is a part where two layers of aluminum wiring 03 and 5 directly overlap, and a through hole in the interlayer film 4 made smaller than the Nd aluminum wiring 3 is formed on the bonding pad part 7. The second layer aluminum wiring 5 is laid with a larger dimension than the first layer wiring 3 so that the width of the second layer aluminum wiring 8 is larger than that of the first layer wiring 3. The upper protective polyimide resin film 6 has a through hole 9 for external extraction with a size smaller than that of the second layer.

If the above structure is further used to form a three-layer interlayer structure, the bonding pad portion will have a structure similar to that shown in FIG.

In the figure, 10 is a second layer insulating film made of polyimide resin;
11 is a third layer of aluminum wiring.

In such a structure, the polyimide film stacked in three layers around the periphery becomes thicker, so the bonding pad portion 7
The height difference between the uppermost third layer aluminum wiring 11 and the surrounding area has become large, and the photoresist used to obtain this lead-out wiring is likely to break due to the large level difference in the periphery, causing the photoresist to break. A disconnection portion 12 of the third layer aluminum wiring is generated at the portion where the third layer aluminum wiring is broken.

Particularly in the vicinity of the bonding pad, the wiring is less likely to be damaged during bonding.

To make the wiring less likely to break, use a thick photoresist mask (
If this happens, the resolution during photo processing will deteriorate, resulting in a decrease in processing accuracy. This makes it impossible to miniaturize the wiring,
This became an obstacle to increasing the density of semiconductor devices.

[Purpose of the invention]

An object of the present invention is to provide a structure that improves the processing accuracy of wiring in a bonding pad portion in a semiconductor device having a multilayer wiring structure in which an organic resin such as a polyimide resin is used as a wiring interlayer film and a protective film. .

1 shot 'A'' overview]
1. Among the inventions disclosed in this application, a brief outline of the substitute clothing is as follows. That is, in a semiconductor prefectural expense in which at least three layers of aluminum wiring 9 are formed on a semiconductor device using polyimide resin as an interlayer film, and a part of the aluminum wiring is formed as a bonding pad portion, the bonding The pad is not used by at least 1/iΩ of the above-mentioned at least three layers of aluminum wiring, and preferably is not used as much as the top layer of aluminum wiring, thereby reducing wiring breakage due to steps around the bonding panode. However, it is possible to prevent a single line due to wiring damage at the time of bonding pads, thereby achieving the fifth object of the invention.

〔Example〕

FIGS. 1 to 7 show an embodiment of the present invention, and are cross-sectional views of a process for forming a half-centered device using three-layer aluminum wiring.

Each process will be explained below.

+11 Elements such as transistors are formed on the surface of the silicon semiconductor substrate 1 by a known selective expansion technique.

2 is an oxide (S) thermally generated on the substrate surface during this diffusion.
iO2)t[. (Figure 1) +21 Contact photoetch a part of the oxide film 2, deposit aluminum,
First layer aluminum wiring 3 is formed by photoetching. (Fig. 2) (31) Apply a high purity polyimide resin, such as polyimide-windorokinazolinedione phenol, and bake to form the first interlayer film 4. Using a photoresist mask, etching the film through with ehydrazine. Hole 8 is opened. (Figure 3) Instead of the above polyimide resin, photosensitive polyimide, such as phenol made by imparting photosensitivity to the precursor of fully aromatic polyimide, is coated, and after prebaking, the resin itself is It may also be partially exposed to light to obtain a clear hole pattern.

+41 The second layer aluminum wiring 5 is formed by the same method as step 21 (FIG. 4) The portion of the through hole 8 overlapping with the first layer aluminum wiring 3 becomes a bonding pad.

(51 Using the same method as step (3), obtain a second interlayer insulating film 10 made of polyimide resin or photosensitive polyimide and having through holes. (Fig. 5) (6) In the part that will not become a bonding pad, Layer aluminum wiring 5
A third layer aluminum wiring 11 is formed in contact with. (Fig. 6) (7) Using polyimide resin or photosensitive polyimide, make a through hole at the same time as the second layer insulating film in the bonding pad area.
protection) 6. (FIG. 7) FIG. 13 shows the bonded wire.

In the semiconductor device having the three-layer aluminum wiring structure formed by the above process, the bonding pad portion includes the first/fii and second layer aluminum wiring 3,
5, and the third aluminum wire is used as wiring in a portion not related to the bonding pad portion.

〔Effect of the invention〕

In this way, by not using the third-layer aluminum wiring as a bonding pad, the third-layer aluminum wiring is not formed through a steep step in the through-hole portion of the pad, so the wiring can be broken due to this step. There was nothing left to do.

Further, since there is no third layer aluminum wiring that passes through the step of the through hole portion, damage to the third layer aluminum wiring during wire bonding is also eliminated. As a result, there is no need for an unreasonable layout of the third layer aluminum wiring, and the degree of freedom in layout is increased. Furthermore, the processing yield of the third layer aluminum wiring can be improved.

[Other modified embodiments]

FIG. 10 shows an example in which only the first layer aluminum wiring 3 is left as a bonding pad in a semiconductor device having a three-layer aluminum layout ffJ configuration.

Similarly, FIG. 11 shows an example in which only the second layer aluminum wiring 5 is left as a bonding pad.

Figure 12 also shows the third layer aluminum wiring 11.
An example will be shown in which only 1 is left as a bonding pad.

Figure 13 also shows the aluminum wiring 8 of the second and third layers.
An example in which only 15.11 is left as a bonding pad is shown.

FIG. 14 shows a semiconductor device having a four-layer aluminum wiring structure, in which first and second layer aluminum wiring 3,
An example in which only 5 is left as a bonding pad is shown. In the figure, 14 is a third interlayer insulating film made of polyimide resin.

〔Effect of the invention〕

In the other modified embodiments described above, in a semiconductor device (IC) having a three-layer or four-layer aluminum wiring structure,
Of the at least three layers of aluminum wiring, a small number (IN) is not used as a bonding pad, so
It is possible to avoid disconnection caused by the unused wiring crossing a steep stepped portion formed by a through hole in the bonding pad portion, thereby improving the reliability of the semiconductor device.

[Application field]

The present invention can be applied to multilayer wiring structures in ICs and LSIs in general.

The present invention is particularly effective when applied to high-density bipolar ICs.

[Brief explanation of drawings]

FIGS. 1 to 7 show one embodiment of the present invention, and are cross-sectional views of wiring forming steps in an IC process having a three-layer aluminum wiring structure. FIG. 8 is a cross-sectional view showing an example of a semiconductor device having a two-layer wiring structure. FIG. 9 is a cross-sectional view showing an example of a semiconductor device having a three-layer wiring structure. FIG. 10 shows an embodiment of the present invention, and is a sectional view of a bonding pad portion of a semiconductor device having a three-layer wiring structure. FIG. 14 is a sectional view of a bonding pad portion of a semiconductor device having a four-layer wiring structure. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Surface oxide film, 3... First layer aluminum wiring, 4... First interlayer insulating film, 5...
...Second layer aluminum wiring, 6...Pulorous insulation film, 7
...Bonde ink bad area, 8...Through hole, 10...2nd R5 interval (Eiji film, 11...3rd
Layer aluminum wiring, 12... cut υ part. Figure 1 Figure 3 Figure 4 Figure 6 Figure 11 Figure 8 Figure 12

Claims (1)

[Claims] 1. At least three layers of aluminum wiring are formed on a semiconductor substrate using polyimide resin as an interlayer insulating film, and a part of the aluminum wiring is formed as a contact portion (bonding pad) for external extraction. 1. A semiconductor device characterized in that the external drawer abutting portion does not use at least one layer of the at least three layers of aluminum wiring. 2. The semiconductor device according to claim 1, wherein the topmost aluminum wiring of the at least three layers of aluminum wiring is not used in the external drawer pad.