JPS6180865A - Semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a semiconductor device having a refractory metal gate structure having a direct contact between a refractory metal film and a semiconductor substrate exhibiting good ohmic characteristics.

<Technical Background of the Invention and its Problems> Conventionally, polycrystalline silicon has often been used as a gate electrode in semiconductor devices having an MO5 structure. However, gate electrodes using polycrystalline silicon have high resistivity, which is a major limiting factor in increasing the capacity of LSIs.

In order to solve this problem, refractory metal gate technology has recently been developed. This high melting point metal has a resistivity about two orders of magnitude lower than conventional polycrystalline silicon (and is suitable for increasing the speed and capacity of LSIs, but on the other hand, good direct contact cannot be obtained with this high melting point metal gate) There was a problem.

<Object of the invention> The purpose of the present invention is to solve the above-mentioned conventional problems,
The present invention provides a semiconductor device having a high melting point metal gate structure including a direct contact having good ohmic characteristics.

<Structure of the Invention> In order to achieve the above object, a semiconductor device of the present invention includes a refractory metal multilayer structure in which a refractory silicide film is inserted between a refractory metal film and a polycrystalline silicon film, and The structure is such that a part of the polycrystalline silicon film is in contact with the semiconductor substrate, and according to embodiments of the present invention described later, the polycrystalline silicon film contains phosphorus, and The above high melting point silicide film is 50A to 300A
The film thickness is as follows.

<Embodiment of the Invention> A semiconductor device as an embodiment of the present invention has a multilayer structure in which a high melting point silicide film is inserted between a high melting point metal film and a polycrystalline silicon film. It is characterized in that a part of the lower layer is in contact with the semiconductor substrate (hereinafter referred to as a direct contact).Hereinafter, one embodiment of the present invention will be described in detail with reference to drawings showing the manufacturing process of this direct contact structure. Explain.

FIG. 1 (al to (Cl) are diagrams showing an example of the manufacturing process of a direct contact structure according to the present invention.

First, an element isolation region 2 and a gate oxide film 3 are formed on the surface of a P-type (100) silicon (Si) substrate 10, as shown in FIG. A polycrystalline silicon film 5 with a thickness of 200 to 300 nm is deposited thereon. Next PoCJ? 3. Dope the polycrystalline silicon film 5 with phosphorus from a source at a temperature of 900° C., and diffuse phosphorus in the semiconductor substrate through the direct contact opening 4 to form an N-type diffusion layer 6.

Next, as shown in FIG. 1 (bl), a molybdenum silicide (MoSix: x=2.4 to 2.7) film 7 is formed by sputtering on the phosphorus-diffused polycrystalline silicon film 5.
was deposited to a thickness of 10 nm to 20 nm, followed by molybdenum (M
o) Deposit 200 nm of film 8. Next, using photoetching technology, M o /M O silicide/polycrystalline S
A gate electrode structure of i is formed. Next, after forming the gate electrode, arsenic (As+) ions are implanted using the gate electrode and the element isolation region as a mask.

Next, as shown in Figure 1), after depositing an interlayer insulating film 9, heat treatment is performed at 1000°C in a nitrogen (N2) atmosphere to form an As
+ Form an N-type impurity diffusion layer IO by ion implantation.

Through the above steps, a direct contact portion between the high melting point multilayer gate and the semiconductor substrate is completed.

Here, as shown in FIG. 1 tc+, an opening ll is provided in the interlayer insulating film 9 and the gate oxide film 3, an AJ/Si electrode 12 (Z) is formed thereon, and electrodes X and Y are formed in the same manner. Then, the IV characteristics between X-Y (between the MO surface and the semiconductor substrate) and between X-2 (between the diffusion regions) were measured.

The results are shown in FIG.

As a result of this IV characteristic measurement, the above figure 1
The Mo/Mo S i x /polycrystalline Si structure created in the process shown in FIG.
Semiconductor substrate doped with type impurities and aluminum CAN
), the structure of the ohmic contact part is obtained, which is suitable for use in gate electrodes and wiring means, and can be applied to LSI.
Low resistance wiring in I etc. is now possible.

Next, an example of the manufacturing process of a semiconductor device having a multilayer gate MOS structure having a direct contact portion according to the present invention will be explained according to FIGS.

First, a gate oxide film 22 is formed on the surface of a P-type (100) silicon substrate 21, as shown in FIG. The membrane 24 is 200 to 800
nm deposited. Next, PoC(l 900 from the source
Phosphorus (P) is diffused into the polycrystalline silicon film 24 at a temperature of .degree. C., and phosphorus (P) is diffused into the semiconductor substrate 21 through the direct contact opening 23 to form an N-type diffusion layer 25.

Next, molybdenum silicide (MoS i x:
x=2.4-2.7) The film 26 has a thickness of 5 nm to 30 nm.

More preferably, the film is deposited to a thickness of 10 nm to 20 nm, and then a molybdenum (MO) film 27 is deposited to a thickness of 200 nm.

Next, in FIG. 3 (as shown in BL, the gate electrode 30 of Mo/Mo silicide/polycrystalline Si and the long part of the gate electrode C'A of the same structure of the adjacent transistor) 31 are formed using photo-etching technology. Form. Next, using the gate electrodes 30 and 31 as a mask, arsenic (As+) ions are implanted into the portions that are to become sources and drains.

Next, as shown in FIG. 3, after depositing the interlayer insulating film 28, heat treatment is performed at 1000° C. in a nitrogen (N2) atmosphere, and the source (drain) region 29, which is an N-type impurity diffusion layer, is formed by A5+ ion implantation. Drain (source) region 2
form 9'.

Through the above steps, a semiconductor device having a direct contact portion between the drain (source) region 29' and the gate electrode of the M o Al o silicide/polycrystalline Si structure of the adjacent transistor is manufactured.

As described above, this direct contact portion exhibits a low resistance value with good ohmic characteristics suitable for LSI, and a good semiconductor device can be obtained.

In the above explanation, an example was explained in which molybdenum (Mo) and its silicide were used as the material constituting the electrode, but the present invention is not limited to this. Combinations of other high melting point metals and their silicides may also be used, and similar effects can be obtained by using combinations of different metals and metal silicides.

<Effects of the Invention> As described above, according to the present invention, a high melting point metal gate semiconductor device including a low resistance direct contact having good ohmic characteristics can be obtained, and is suitable for use in MO5LSI.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of the manufacturing process of a direct contact structure according to the present invention, FIG. 2 is a diagram showing IV characteristics of a direct contact part, and FIG. 3 is a diagram showing an example of a semiconductor device as an embodiment of the present invention. It is a figure showing an example of a manufacturing process.
11... P-type (+00) silicon substrate, 3... Gate oxide film, 4...
... Direct contact opening, 5... Polycrystalline silicon film, 6... N-type diffusion layer, 7... Molybdenum silicide film, 8... Molybdenum film, 10... N-type impurity diffusion layer. Agent Patent attorney Aihiko Fuku (2 others) Figure 1 Figure 2 Figure 3

Claims (1)

[Scope of Claims] 1. It has a high melting point metal multilayer structure in which a high melting point silicide film is inserted between a high melting point metal film and a polycrystalline silicon film, and a part of the polycrystalline silicon film is in contact with a semiconductor substrate. A semiconductor device characterized by having a structure comprising: 2. The semiconductor device according to claim 1, wherein the polycrystalline silicon film contains phosphorus. 3. The semiconductor device according to claim 1, wherein the high melting point silicide film has a thickness of 50 Å to 300 Å.