JPS6182207A - Sequence circuit designing device - Google Patents

Abstract

PURPOSE:To obtain a circuit diagram having a meaning at every drawing, even if a design is executed without taking the drawing into consideration, and also to change easily the circuit by providing the circuit information to every minimum unit circuit of a sequence circuit. CONSTITUTION:Designed sequence circuit information is inputted to a circuit information input means M1 first, and subsequently, sent to a circuit information driving means M2 in order to assign a drawing. The dividing means M2 consists of a means M4 for analyzing the sequence circuit information and providing circuit dividing information, a means M5 for changing its dividing information, and a means M6 for dividing the sequence circuit information based on said dividing information and assigning it to plural drawings. In this way, the divided sequence circuit information is sent to a drawing means M3, and a drawing corresponding to a circuit diagram having a meaning is outputted.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a sequence circuit design device for designing and drawing a sequence circuit, and in detail, when a sequence circuit designed in tit is printed on multiple drawings, This is a sequence circuit film that automatically inserts a sequence circuit into a drawing.

[Prior Art] With the rapid development of computer technology in recent years, automatic design devices that automatically perform design and drafting in various design fields are being developed. There is also a sequence circuit design device for drafting.

By the way, as a sequence circuit (usually it is a long circuit diagram that is continuous according to its control operation),
It is not possible to draw a sequence circuit as it is as a single drawing, but a single sequence circuit is constructed using multiple drawings. Therefore, when designing and drawing a sequence circuit using an I device for this sequence circuit design, the circuit diagram drawn in each drawing is a circuit that represents a meaningful circuit for each block that constitutes the sequence circuit. It is desirable to make it into a diagram.

[Solved by the invention] (J: Drowsing problem) However, with conventional sequence circuit design devices, when drawing one sequence circuit by dividing it into multiple drawings, the circuit is simply divided into predetermined amounts. The method used is to design a circuit by taking into account that the designer will divide the stages into drawings at one point in time, and then draw a diagram for each designated circuit, making it very easy to read. The circuit diagram may be difficult,
Problems arise in that the designer's work becomes complicated and work efficiency decreases. In other words, in the former case, one sequence circuit is simply divided mechanically,
Since the drawings are made for each circuit, the circuit shown in the diagram is the same as the meaning of the circuit, and when comparing each drawing, there is a problem of not being able to understand the meaning of the diagram. J-j! 2
In the case of 1J, it is necessary to perform 8 times of construction while taking into account that the construction stone is divided into drawings, which takes time and reduces work efficiency.1. -'c し、１- If there are any problems or additions or changes to the circuit, it may not fit in the original drawing.1. : Or, the blank drawing appears -() and the appearance of the drawing is not correct. ``B) Problems such as ``lack'' will arise.

Therefore, the present invention provides circuit information for each minimum unit circuit of a sequence circuit, so that drawings are not considered in the first part of circuit installation. The purpose of this design was to provide a circuit diagram with a similar structure, and to facilitate circuit changes.

The configuration of the present invention as a means for achieving objective 1 and solving the above problems is designed as shown in the block diagram of FIG. 1. a circuit information inputting means M1 for inputting the sequence circuit obtained as sequence circuit information; a circuit information dividing means M2 for dividing the sequence circuit information in order to divide the sequence circuit into a plurality of drawings; A sequence circuit 8Ω meter device comprising: a drafting means M3 for creating a drawing based on the sequence circuit information obtained, and wherein the circuit information dividing means M2 analyzes the sequence circuit information and constructs the sequence circuit information. circuit division information adding means M4 for adding circuit division information used in dividing the circuit to each minimum medium circuit information; circuit division information changing means M5 for arbitrarily changing the circuit division information; The circuit installation section 1 includes a means M6 for dividing the sequence circuit information based on the circuit division information and allocating it to a plurality of drawings.
This article focuses on one device.

1 Embodiment] Book 5F describes the embodiment of the present invention with drawings and explanations.

FIG. 2 shows the configuration of the sequence circuit design apparatus of this embodiment in functional block II! There is a schematic configuration diagram C showing the flow of data.

In the figure, 1 represents the processing control section, 2 represents the circuit installation section 1, 3 represents the circuit information processing section, /l IU designation indicates the processing section, 5 represents the drawing list 1 to output section, and 6 represents the drafting section. ing.

Here, the processing control unit 1 has the #A function that collectively controls each unit of the above 2h to 6, and when the processing control unit 1 specifies each of the above units, the operation J: is executed. be done. Further, the circuit design part 1 2 executes the process of creating a sequence circuit by the operation of design i1, and the sequence circuit designed in this circuit design part 1 part 2 is as shown in FIG. Circuit diagram data 9 in which circuits are arranged in order on a paper roll is given a circuit name (=1 j) and stored in a circuit diagram data file 10. Furthermore, the circuit information creation unit 3 generates the circuit diagram data file 1 designed by the circuit design unit 2.
The layerer 1~state of the circuit diagram data 9 stored in 0 is
It is converted into circuit group data 11 consisting of the circuit configuration data of the minimum unit circuit and circuit division information, and is stored in the circuit stage data file 12 along with the circuit name with -. ff It has a function that can be changed at will, and includes the circuit division information adding means M4 and the circuit division information changing stage M5. In addition, for drawing layout, the processing unit 6 divides the sequence circuit into drawings based on the circuit group data 11, creates layout list data 13 and drawing data 14, and divides each data into the circuit stage data file 12 and the drawing. The drawing layout includes means M6. The drawing list output section 5 outputs the layout list data 13 stored in the circuit design data file 12 using a printer or the like, and the drafting section 6 outputs the layout list data 13 stored in the circuit design data file 12 based on the drawing data 14 stored in the drawing data file 15. 4
In the figure = 7 − shown? Jri II <+"i Draw a sequence circuit diagram divided into 1 plane using an X-Y plotter, etc. The small unit circuits are, for example, A, C, C in Figure 3.・
It is one circuit that makes up 414 J sequence circuits shown in . The circuit information consists of the circuit division information to be used, the circuit number of A, and the next circuit number.

Next, FIG. 6 is a 70-chart for explaining one operation of the circuit information processing lqi section 3.

As shown in the figure, in the circuit information button 3, when the designer first specifies a desired circuit name in step 101, processing is started, and in step 102, the circuit diagram of the specified circuit name] It is determined whether or not the circuit diagram data 9 with that circuit name is stored in the circuit diagram data file 10.
1i-! Since this circuit has not yet been leveled, it is determined that the input of one installer is -8 = a mistake, and the process moves to step 107, which will be described later.

On the other hand, if there is circuit diagram data 9 with the specified circuit name, the process advances to step 103, where the circuit diagram data 9 with this circuit name is called from the circuit diagram file 10, and a group of circuits with the same circuit name is called. If the data 11 is stored in the circuit design data noisle 12, the circuit group data 11 is also called.

Then, the process moves to step 104, and it is determined whether or not there is circuit group data 11 having the same circuit configuration data for each minimum unit circuit that constitutes the circuit diagram data 9.

Here, the processing in step 104 is performed when the circuit diagram data 9 with the specified circuit name has already been converted to circuit group data 11, and the circuit diagram data 9 on the page is changed by the designer in the circuit design department 2. , or circuit group data 11 on A
When changing the circuit division information, the circuit diagram data 9 and the circuit group data 11 have the same minimum and medium circuit configuration, so in that case, the circuit information creation/writing process is performed in the next step 105. This is to avoid executing step 105 because it is determined that it is not necessary to execute it, and in step 104, the circuit configuration data that is the same as the minimum medium circuit of circuit diagram i2-i9 is set as the circuit group data. 11, the process moves to step 106; otherwise, the process moves to the next step 105.

In step 105, circuit information is created and
Write processing is executed, but this processing is based on circuit diagram data 9.
As shown in FIG. 5, circuit configuration data and circuit division information are created for each minimum unit circuit of
This is to convert the data into circuit group data 11 at step .

Specifically, electronic components such as coils and capacitors constituting the minimum medium-level circuit are created as circuit configuration data consisting of predetermined symbols or numbers, and circuit diagram data as shown in Figure 7 is created. 9 to create circuit division information 20 and create circuit group data 11 as circuit film hI data file 1.
2. In addition, in the circuit division information 20 and 1), as shown in FIG.
The first circuit flag 22 indicates whether or not the first circuit will be used when drawing this circuit, the blank page information 23 indicates how many blank drawings are to be created after the drawing for this circuit, and the blank page information 23 indicates the number of blank drawings to be created after the drawing for this circuit. The empty space information 24 indicating how much empty space S is present between the minimum 111 circuits and the next circuit as shown in Figure 8 (B). It shows how many empty cards C of the input/output card as shown should be taken, and how many empty lines L as shown in Figure 8 (a) are between the empty card 25 information and the next circuit. This step 10 includes empty line information 26 representing the
In 5, each information 21, 24, 25 and 26 of the circuit type, empty space, empty card and empty line is created based on the circuit diagram data 9, and the information 22 and 23 of the first circuit flag and empty page is set to O. Set.

Next, in step 106, the process of Step 10/1 is executed for all the minimum unit circuits of the circuit diagram data 9, and it is determined whether or not they are ICs. Step 710/ for the next circuit.
The process moves to step 104 to execute I.

Meanwhile, in step 106 above, -(, all 1μ small 11i
<(Execute the process of step 104 for the circuit (]I
Judging by this, Sfutz 71 (') 71 moves on, and this time, among the circuit group data 11 stored in the circuit installation 1 river data file 12, the circuit group data 1, which has a history of epidemics.
Determine whether or not there is 1, IC7: End this circuit information processing with Mrepoi. Furthermore, this suit 107
This process is executed according to the instructions of the person who created the h1.

Which circuit do you want to change next in step 10.7? I\y'
- If it is determined that there is data 11, proceed to step 108, enter the circuit name of the circuit r!Y data 110 that you want to change, and call the circuit group data 11 of Then move to step 11 (1).

In step 11.0, the circuit P and V data 11 with the circuit name specified in the subsection 10fl are stored in the circuit design data aisle 12, and in step 109, the circuit group data 11 is stored. In step 109, it is determined whether or not it has been called. If the specified circuit group data 11 does not exist in the circuit t9 data file 12 and cannot be called in step 109, the process moves to step 111 and the designer It is asked whether or not to call the circuit group data 11 having the circuit name. If it is to be repeated, the process returns to step 108, and if not, the circuit information processing is directly terminated.

Next, in step 110, the circuit design data file 12 is
If it is determined that the specified circuit group data exists in the specified circuit group data, the process moves to step 112, where the designer is asked to input the circuit division information of the circuit group data 11 that he or she wants to change, and the process proceeds to step 112.
3, the circuit division information of the Iζ circuit data 11 stored in the circuit design data file 12 is changed, and the process moves to step 111. Note that the circuit division information that can be changed in step 112 is the circuit division information 20 shown in FIG.
Among all the information other than the circuit type 21, if there is a minimum 4i1 circuit that you want to make the top of the drawing, you can set the top circuit flag 22 to 1. If you want to provide a page number, you can enter the number of pages in the empty page information 23.

In this way, in the circuit information processing unit 3, the revised circuit diagram data 9 is recorded in the circuit stage data file 12 with the circuit group data 11 and 1 note, or It is possible to change the circuit group data 11 that has been created, but this time, based on this one piece of circuit group data, the sequence circuit is divided into drawings l), layerer 1 to list 1 to data 13, and drawing data. Drawing layout to create 1/I (
The operation of the J processing section 6 will be explained.

As shown in FIG. 9, the operation of the drawing layout 1-1 processing unit 6 is carried out in step 200 when the operator performs the drawing layout and inputs the circuit name of the circuit group data 11. , in step 201, the specified circuit MY data 11 is called from the circuit stage data file 12.Then, in step 202, the specified circuit MY data 11 is called.
It is determined whether the Y data 11 exists in the circuit design data noisle 12, and -1/I - that is, the circuit 1 specified in step 201! Y'j
' - Determine whether or not data 11 could be called;
If the designated circuit group data 11 does not exist in the circuit design training data file 12, the drawing allocation process ends.

On the other hand, if there is the specified circuit group data 11 in the circuit design h1 data file 12, the process moves to the next step 203.
The installer 81 is asked to input whether or not to execute the drawing layout [-1, and the l1lf confirmation is performed in step 204.

Then, if it is confirmed in step 204 that the process will not be executed, the current drawing division (1 (J) process is completed, and if it is confirmed that the process is to be executed, the process moves to the next step 205.

Then, if there is a minimum unit circuit that must be paired in the drawing in the circuit IIY data 11 called in Step 205 (step 201 described in -1), have the designer input that circuit. At the same time, in step 206, the page of the drawing from which to start drawing this circuit group data, ie, the first page, is input, and drawing allocation is executed in step 207, and the drawing allocation process is completed.

Next, the drawing division (+f I) in step 207 will be explained in detail with reference to FIGS. 10 to 13.

As shown in FIG. 10, this process first calculates the number of empty pages by using the value of the first page input in step 206 in the step 211 as shown in FIG. The process is executed and the process moves to the screen 212.

Then, in step 212, the number of empty pages (after the empty page processing is executed as shown in FIG. 11) is transferred to the next step 213.゛ is the layout l Helis I header 13 which still has drawing data 14 of the 1-1 road group data 11
Is the minimum single 19 at the beginning of C<r? Read the circuit information of the circuit and move to the next subj-tub 21/1. Step 2T5
Step 21G executes the 4-page change process shown in FIG. 12 and the empty information and circuit configuration data process shown in FIG.
to move to. : f, l) In the step 216, the circuit group data 11 judges whether there is any circuit information that has not been processed in step 212 <r or step 21F5, and if so, returns to step 212. transition,
If there is an IJ, the process will end.

Next, the empty page processing executed in step 212 is as follows:
As shown in FIG. 11, first, in step 221, it is determined whether the number of empty pages calculated in step 211 is "0".

When the number of empty pages is "0", that is, when the designer specifies that the sequence circuit is to be drawn from the first page of the drawing in step 206, the empty page processing is immediately terminated; If the number is not "0", the process moves to step 222, and the drawing data 14 and the layout data 13 corresponding to the number of empty pages are created. In addition, the drawing data 14 and Layer 1 to be created here
List data 13 is the number of blank pages 1
The circuit information contained in the circuit group data 11 is not input at all, and only the drawing number, number of pages, or predetermined data used to create the frame of the drawing are created. That will happen.

The layout list 1 head 13 and drawing data 1/l created in this way are the data file 12 for people circuit design hI.
and stored in the drawing data file 15.

Next, in the page change process executed in step 214 of I, as shown in FIG. It is determined whether the flag is set to 1 or not. Use J to set the first circuit flag 1~
If < r l-J, the process moves to the next step 232 (1 step) and the circuit type of the minimum unit circuit read in step 213 during the previous processing and the minimum width (DELTA 7) read this time.
Determine whether the circuit type of the circuit is the same or not,
If they match, the process moves to the next step 233.

In step 233, the circuit configuration data of the minimum unit circuit is checked and the C11 line, that is, the left and right confidence lines in the circuit configuration data shown in FIG. is connected to the circuit, and determines whether or not the mon wire has been shaken.There is no change in the mon wire of the 1st lever, and the minimum width of the previous If so, the process moves to the following step 234, and the minimum qi (0
Add up the number of circuit lines, number of empty spaces, number of empty cards, and number of empty lines in the circuit information of the circuit, and proceed to the next step 2.
At step 35, it is determined whether the value of A is a value that can be drawn on one drawing. Then, if the resulting value is a value that can be drawn, the process is immediately terminated.

On the other hand, if it is determined in step 231 that the first circuit nolag is set, and if it is determined in step 232 that there is a change in the circuit type, step 2
If it is determined that there has been a change in the common line in Step 33, or if it is determined that the number of lines of the circuit information input since the previous page of the drawing was changed in Step 235, the value that can be drawn per drawing is determined. If it is determined that the minimum unit circuit has been exceeded, a new page is created in the drawing data 14 and layerer 1 to list 1 to data 13 in order to create a new page with the minimum unit circuit as the first circuit of the next drawing.

Here, the processing in Step 234 and Step 235 is performed when the total number of lines of the minimum medium circuit read since the previous page of the drawing was changed exceeds the number of lines that can be drawn per drawing. However, in the above explanation, the number of lines in the circuit is one minimum of 11.
It refers to the number of lines in the parallel part of the (b) circuit diagram of the 1st place circuit. For example, as in the circuit configuration data of circuit number J shown in Figure 5, if 1 < 7 circuits, If there are two parallel components, the number of lines is two. So, in this step '234 and step 235, for example, the number of lines of the minimum 111th circuit read this time is 3, and the total number of lines read so far after changing the page of the drawing is 18, and the drawing is added to the drawing. 2 possible lines
If it is 0, even if two more lines can be drawn, those parts will be left blank and the minimum 10 circuits read this time will be processed as the first circuit of the next new drawing. bawl. In other words, this is to prevent the meaning of the circuit from being drawn if one minimum 41'r circuit is drawn on the A and divided into 19 lines by the number r, resulting in a very tedious circuit diagram. .

Next, as shown in FIG. 13, the empty information and circuit configuration data processing executed in step 215 is performed in step 241, where a3 is added to the circuit information of the minimum unit circuit read in step 213. and the number of empty spaces is ``0''.
”. And the number of empty spaces is "0"
'', the process moves to the next step 242, and an empty space is created in the drawing data 14 and layout list data 13 by the amount of this empty space.

Next, if the state 241 determines that the number of empty spaces is not "0", or if the state 242 creates empty spaces in the drawing data 14 and layerer 1 to list data 13, the next step 243 Next, the layout list 1 to data 13 and the drawing data 14 are created based on the circuit configuration data in the circuit information of the minimum medium circuit.The process then moves to step 244.

In step 244, it is determined whether the number of empty cards is rOJ in the circuit information of the minimum unit circuit. If the number of empty cards is not [0], the process moves to step 245 and the number of empty cards is 11 (empty cards are created for 1 drawing data and layout list 1 to data).

If it is determined in step 2/I4 that the number of C empty cards is "0", or if the process of step 245 is executed, the process moves to the following step 246, and this time the circuit of the minimum unit circuit is In the information, the number of empty lines is [0
It is possible to determine whether the value is 1 or not. If the number of empty lines is "0", the main empty information and circuit configuration data processing is finished as is (A), and if the number of -dynamic lines is "0" (-
If it is 1, the process moves to step 247, and empty lines are created in the drawing data 14 and layout list 1 to data 13 for the number of empty lines, and this process is ended.

Here above step 242.2/13.245.247
The drawing data 14 and layerer 1 to list data 13 created in step 1 are inserted into predetermined pages of the drawing data file 15 and the circuit stage file 120, respectively. The created layout list data 13 is, for example, data in which circuit information is sequentially input to each page as shown in FIG. can. Therefore, by looking at this data, the designer can know the layout state of the circuit diagram for each drawing.

As explained above, in the sequence circuit design apparatus of this embodiment, the sequence circuit designed by the circuit design section 2 and stored in the circuit diagram data file 10 is analyzed by the circuit information processing section 3 for each f7 circuit. In addition to creating the circuit group data 11, the circuit division information (a) can be easily changed in the circuit information processing unit 3 even after the circuit film n1.And when allocating sequence circuits to each drawing, Based on the circuit division information and circuit configuration data by the page change process shown in FIG.
In addition to dividing the circuits so that they are not divided, new drawings are created when the type of circuit is different or when the common wire is changed.

1K of circuit drawings can be made into drawings by adding meaningful drawings to each drawing 40.

;l: At the end of the L7 theory, the Ministry of Education and Humanities changed the layout of the drawings to fat L.
: It is necessary to perform the work in consideration of J', r<, 1-,)
The sequence circuit can be created one after the other, and the workability can be improved. In addition, the drawing list output section 5 can output the layout list;~i'- data, and the circuit division information can also be easily changed in the circuit information processing section 13, so the changes In this case, if the person who set up H1 changes the data from Layara 1 to Riss 1 to the child, it will be J,
1i 1. ;Z can be changed without having to make changes after drafting the +FF drawing.

[Effects of the Invention] As shown in (details) 41 above, the sequence circuit film h4 of the present invention
The device analyzes the sequence circuit that has been designed, creates circuit division information in the minimum circuit (f/circuit 40), and also creates circuit division information in the circuit 40, which is configured so that the circuit division information can be easily changed. However, the sequence circuit of A is divided into multiple drawings (when dividing, the sequence circuit is divided 1 based on the circuit division information written in L), and it is configured to be assigned to the drawings. has been done.

Therefore, when dividing a sequence circuit, it is executed for each minimum unit circuit, so it is not divided within the minimum unit circuit, and unlike in the past, the designer takes drawing layout E into consideration when designing. It is possible to create meaningful drawings for each drawing without having to carry out design work, and work efficiency can be improved. Further, since the circuit division information can be easily changed after creating the sequence circuit, the work efficiency can be further improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the present invention, FIGS. 2 to 14 show an embodiment of the present invention, and FIG. 2 is a schematic configuration diagram showing the sequence circuit film n1 equipment of this embodiment. FIG. 3 is an explanatory diagram showing the circuit diagram data 9, FIG. 4 is an explanatory diagram showing a drawing in which a sequence circuit is drawn, FIG. 5 is an explanatory diagram not showing the circuit group data 11, and FIG. 6 is an explanatory diagram showing circuit information A flowchart showing the operation of the processing unit 3, FIG. 7 shows the circuit information creation and writing process of step 105 in FIG.
Explaining the circuit division information creation operation executed in Figure 8 (A), Figure 8 (a) shows the empty lines and empty spaces.
I) is an explanatory diagram explaining an empty card, Figure 9' is a flowchart showing the drawing division (O) of the JI l-J processing unit 4, and Figure 10 is the process of J step 207 shown in Figure 9. Figure 11 represents the empty page processing of Stella f212 shown in Figure 10. Show 1 step 2
70-chi 1 representing 14 page change processing l A? -1~,
FIG. 13 is a flowchart t--1-1 1 representing the blank information and circuit configuration data processing of step 215 shown in FIG.
FIG. 4 is an explanatory diagram showing Layer 1 to Squirrel 1 to Data 13. Ml...Circuit information input means M2...Circuit information division means M3...Drawing means M/! ...Circuit division information providing means M5...Circuit division information Ms.-F stage M6...Drawing allocation means 3...Circuit information processing section 4...Drawing allocation I'J5!11 immediate section 9...Circuit diagram data 11...Circuit group data 13...Layout list data 14...Drawing data

Claims (1)

[Claims] Circuit information input means for importing a designed sequence circuit as sequence circuit information, and for allocating the sequence circuit to a plurality of drawings,
A sequence circuit design device comprising: circuit information dividing means for dividing the sequence circuit information; and drafting means for creating a drawing based on the divided sequence circuit information, wherein the circuit information dividing means comprises: circuit division information providing means for analyzing sequence circuit information and providing circuit division information used in dividing the circuit for each minimum unit circuit information constituting the sequence circuit information; A sequence circuit design device comprising: circuit division information changing means that can be changed; and drawing allocation means that divides the sequence circuit information based on the circuit division information and allocates it to a plurality of drawings.