JPS6182456A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of wirings by forming an insulating film on a semiconductor substrate, forming a contacting hole and a high melting point metal film, then heating the substrate, and melting the insulating film at the peripheral edge of the hole, thereby forming the wirings in a uniform thickness. CONSTITUTION:After a well region 2 is formed on the surface of a substrate 1, an element separating region 3 and gate electrodes 5a, 5b are formed, a source region 6 and a drain region 7 are formed on the surface of the substrate 1, and a source region 8 and a drain region 9 are formed on the surface of the region 2. Further, after a thick SiO2 film 10 and a phosphorus-doped glass film 11 are formed as an interlayer insulating film on the overall surface, the SiO2 film 10 and the glass film 11 are selectively removed, and a contacting hole 12 is formed. Then, a taper 14 is formed at the peripheral edge of the hole 12, an aluminum alloy is deposited as a wiring metal on the entire surface to form wirings 15, thereby manufacturing a CMOS transistor. Thus, when the wirings 15 are formed in the hole 12, the reliability of the wirings 15 formed in the uniform thickness can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which the formation of contact holes is improved.

[Technical background of the invention and its problems]

As is well known, as semiconductor devices become faster and more highly integrated, and as devices become smaller, it is necessary to significantly reduce the size of contact holes for wiring. By the way, when reducing the size of the contact hole, the vertical dimension of the element is not necessarily reduced proportionally. Generally, as elements become finer, the ratio between the thickness of the insulating film in the contact hole portion and the size of the contact hole increases, and it is necessary to form a deep contact window. In this way, when a deep contact hole is formed and a wiring metal is deposited thereon to form a wiring, problems such as the formation of locally thin parts of the wiring within the contact hole occur, which reduces the reliability of the wiring. sex is significantly reduced.

For this reason, it is necessary to place a chi/chip at the top of the contact hole.
4', the following technique has been proposed in order to improve the adhesion characteristics of metal within the contact ball. That is, this is a method in which the surface layer of the insulating film is doped with phosphorus at a high concentration in advance, and a taper is formed by taking advantage of the fact that the insulating film immediately below the renost is etched quickly in the lateral direction during etching ( Special Publication No. 57-51944). However, this method increases the etching speed in the lateral direction by impairing the adhesion between the resist and the insulating film, so the controllability of the contact opening size is poor and it is not suitable for miniaturization. In other words, slight changes in the concentration of phosphorus that is highly doped into the insulating film, changes in the composition of the oxidizing solution, and changes in the temperature of the solution can cause significant changes in the lateral etching speed, making it virtually impossible to control the dimensions. It is difficult to

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can improve the reliability of the wiring by forming wiring in a contact hole with a uniform thickness.

[Summary of the invention]

The present invention aims to improve the formation of contact holes. Specifically, an insulating film is formed on a semiconductor substrate on which a diffusion layer and a dart electrode have been formed, and after forming a contact hole, a high melting point metal film, etc., the substrate is By heating and melting the insulating film at the periphery of the contact hole, tapers are formed, thereby improving the reliability of the wiring formed in the next step.

[Embodiments of the invention]

Hereinafter, a case in which the present invention is applied to manufacturing a complementary type (0) MOS transistor will be described with reference to FIGS. 1 to 5.

[i] First, for example, P-o (100) silicon substrate 1
After forming an N-type well region 2 on the surface of the substrate 1, an element isolation region 3 was formed on the surface of the substrate 1. Next, the Nf! ! r-1 electrode 5a made of polycrystalline silicon doped with l impurity
At the same time, a dart electrode 5b made of the same material as above was formed on the well region 2 on the P channel side with a y-doped oxide film 4b interposed therebetween. Next, after forming an N+ type source region 6 and drain region 7 on the surface of the substrate 1 on the N channel side,
A T-type source region 8 is provided on the surface of the well region 2 on the P channel side.
, a drain region 9 was formed. In the above, well-known techniques are used. Furthermore, a thick 8 r 02 as an interlayer insulating film is formed on the entire surface.
After forming 10 films and 1 film of Lindog glass, 100
The glass film 11 was melted by heating to 0° C. (as shown in FIG. 1).

(ii) Next, the 8i0□ film 10.glass BXll corresponding to the source regions 6, 8, drain regions 7, 9 and dirt electrodes 5a, 5b is selectively removed by photolithography (PEP), Contact holes 12... were formed (as shown in Figure 2).Contact holes for the drain region 9 and f-meter electrodes 5a, 5b are not shown.Subsequently, contact holes were formed using a vapor phase growth method. For example, a tungsten (W) film 13... was selectively formed on the surfaces of the source regions 6, 8, drain/region 7°9, and y-meter electrodes 5a, 5b exposed from 12... (third Next, the entire surface of the substrate is irradiated with an energy beam, such as light, for a short period of time to melt the glass film 11 again, and to form a chip 14 at the periphery of the contact hole 12.
... was formed (as shown in Figure 4). Furthermore, after depositing an At alloy as a wiring metal over the entire surface, patterning was performed to form wirings 15 in the contact holes 12, thereby manufacturing an 0MO8 transistor (as shown in FIG. 5).

According to the present invention, the following effects are achieved.

(2) After sequentially forming a 5i02 pAl 0 and phosphorus-doped glass film 1 on the entire surface of the silicon substrate 1, and further forming a contact hole 12 and a tungsten film 13, in order to melt the glass film 11, the periphery of the contact hole 12 is A teno mother 14 can be formed on the part. Therefore, when forming the wiring 15 in the contact hole 12 in the next step, the thickness can be uniform without creating locally thin parts as in the conventional method.
The reliability of the wiring 15 can be improved.

(2) Since the tungsten film 13 and the thick SiO□ film 10 are formed on the surfaces of the source regions 6 and 8 and the drain regions 7 and 9, it is possible to suppress the temperature rise in these parts. That is, since the tungsten film 13 has a high reflectance, light absorption does not occur and the temperature rise is small. Further, when the temperature is increased for a short time due to the presence of the SiO2 film 10, the influence on the diffusion layers such as the source regions 6 and 8 is reduced. From this, even if the glass film 11 on the surface is melted, S r
Since the thickness of the 02 film 10 is thicker than other regions, it is possible to realize a shallow diffusion layer without increasing the depth of the junction.

(2) Since the tungsten film 10 is formed on the surfaces of the source regions 6 and 8 and the drain regions 7 and 9, it is possible to prevent foreign impurities from entering the regions from the contact hole 12. Further, since the taper 14 can be formed by simply irradiating light for a short time, impurities can be prevented from being released from the contact hole 12 to the outside.

(2) Since the phosphorus-doped glass film 11 is used as a low-temperature melting insulating film, the melting point of the glass film can be lowered. Therefore, after forming the contact hole 12, the taper 14 can be formed in the contact hole 12 at a low temperature.
This method is particularly effective as a method for forming a four-OS transistor having two types of diffusion layers. Note that this is equally effective when a low-temperature melting insulating film containing coloring impurities is used to increase the light absorption efficiency.

In addition, in the above embodiment, the Lindog glass film was used as the low-temperature melting insulating film, but the present invention is not limited thereto.

In the above embodiment, a tungsten film is used, but the present invention is not limited to this, and other high melting point metal films such as platinum film and titanium film, or high melting point metal silicide films such as TsSi2 film may be used. .

Further, in the above embodiments, the Qi/mother was formed by irradiating light, but the taper is not limited to this, and may be formed by, for example, irradiation with an electron beam or heat treatment at about 900°C.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to improve the reliability of the wiring by forming the wiring in the contact hole with a uniform thickness, and also to miniaturize the device by making it possible to form a shallow diffusion layer. It is possible to provide a method for manufacturing a semiconductor device having various effects.

[Brief explanation of drawings]

FIGS. 1 to 5 are cross-sectional views showing a method of manufacturing an 0MO8 transistor according to an embodiment of the present invention in order of steps. 1... Silicon substrate, 2... Well region, 3...
Element isolation region, 5a, 5b... Y-toe electrode, 6, 8...
... Source region, 7, 9... Drain region, 11...
・Phosphorus-doped glass film, 12... contact hole,
13...Tungsten film, 14...Chi/4N
l 5...Wiring.

Claims (4)

[Claims] (1) a step of forming an insulating film on a semiconductor substrate on which a diffusion layer and a gate electrode are respectively formed, and a step of selectively etching away at least the insulating film corresponding to the diffusion layer to form a contact hole; selectively forming a high melting point metal film or a high melting point metal silicide film on at least the surface of the diffusion layer exposed from the contact hole; 1. A method of manufacturing a semiconductor device, comprising the steps of: melting the contact hole to form a taper; and forming a wiring in the contact hole. (2) A method for manufacturing a semiconductor device according to claim 1, characterized in that a film containing a glass film containing phosphorus or a glass film containing phosphorus and boron is used as the insulating film. (3) A method for manufacturing a semiconductor device according to claim 1, characterized in that a film including at least an insulating film containing a coloring impurity is used as the insulating film. (4) The method for manufacturing a semiconductor device according to claim 1, wherein the substrate is heated by irradiation with an energy beam.