JPS6184811A - Ceramic capacitor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a ceramic capacitor, and particularly to a highly reliable ceramic capacitor that prevents deterioration of insulation resistance at high temperatures.

(Prior Art) In recent years, as electronic components have become smaller and lighter, ceramic capacitors have also been pursued to be smaller and lighter. In particular, with regard to ceramic capacitors, in parallel with the progress of miniaturization, consideration is being given to the deterioration of human appearance, and attempts are being made to reduce the thickness of ceramic capacitors as a means of achieving this.

The following improvement methods can be considered as means for reducing the thickness of ceramic capacitors.

■A method of forming a thin dielectric ceramic layer using vacuum thin film forming methods such as sputtering, vacuum thermal deposition, ion blating, and vapor phase sensitization.

■A method of making the dielectric ceramic layer as thin as possible by microcrystallizing the dielectric ceramic material.

■A method to obtain a grain boundary insulated dielectric ceramic layer by forming an insulating layer at the grain boundaries of a thin semiconductor ceramic layer.

(2) Among the methods (2) to (2) above, there is a method in which internal electrodes are formed between a plurality of dielectric ceramic layers to form a laminated ceramic capacitor to further increase the capacitance.

(Problems to be Solved by the Invention) However, when a ceramic capacitor is constructed by thinning the dielectric ceramic layer by the above method and then constructing a ceramic capacitor by taking out the capacitor, various troubles may occur. What appears in the title in particular is the deterioration of insulation resistance when used at high temperatures.

The biggest cause of this trouble is that the dielectric ceramic is made of metal oxide, and the electrodes are made of metal.

That is, according to such a combination, it is considered that the exchange of oxygen inevitably occurs at the interface where the metal oxide constituting the dielectric ceramic and the metal constituting the electrode are in contact with each other.

The initial exchange of oxygen in the mouth is difficult to recognize when J3 is at room temperature, but
As the temperature rises, oxygen is exchanged more and more.

For example, to explain a ceramic capacitor in which the dielectric ceramic is TiO2 and the electrodes are Cu, TiO2 and Cu change as follows at the product temperature, for example, 150°C.

TiO2'L knee Ti 02-x C11-Kiichiten1CsuOx (0(x (2)) When oxygen exchange occurs between the dielectric ceramic and the electrode in this way, the permittivity of the dielectric ceramic <ε ) changes, the insulation resistance (IR) changes significantly, and the Jiff decreases by more than two orders of magnitude.

Such a reduction appears particularly in CI when the dielectric ceramic layer is made thinner, and applies to the ceramic capacitors folded by the above-mentioned improvement measures (1) to (2) for making the ceramic capacitor thinner.

(Objective of the Invention) Therefore, the present invention provides a highly reliable ceramic capacitor that does not cause changes in dielectric constant or deterioration of insulation resistance by using a method that does not reduce the dielectric ceramic when using a high-crystalline crystal. The purpose is to

(Structure of the Invention) That is, the present invention is a ceramic capacitor characterized in that an oxide ore layer is interposed between a dielectric ceramic and an externally placed electrode formed on the surface of the dielectric ceramic.

Here, as the dielectric ceramic, for example, a high permittivity type such as barium titanate type, strontium titanate type, titanium oxide type, magnesium titanate type, magnesia oxide, titanium oxide type, lium oxide type, etc. These include temperature-compensated materials such as strings, and grain-boundary insulated dielectric ceramics in which the grain boundaries of semiconductor ceramics are made into insulators.

In addition, when the thickness of the dielectric ceramic is 50 μm or less, the effect becomes more pronounced when an iron oxide layer is interposed between the dielectric ceramic and the external connection electrode. In other words, if the thickness of the dielectric ceramic exceeds 50μ, even if the dielectric ceramic is reduced by the electrode during high-temperature use, the dielectric ceramic is thick enough to cause changes in the dielectric constant and insulation resistance. No noticeable deterioration occurs.

Therefore, the dielectric ceramic of the present invention having a thickness of 50 μm or less is particularly effective.

However, even if the present invention is applied to a dielectric ceramic having a thickness exceeding 50 μm, there is no problem such as <iTI, and it is optional to interpose an iron oxide layer between the dielectric ceramic and the external connection electrode.

Examples of means for forming the iron oxide layer include sputtering method, ion blasting method, and oxidized vapor deposition (gF) method.
A thin film forming method such as a deposition method is used.

Among these, when forming an iron oxide layer by sputtering method,
For example, this can be carried out by using metallic iron as a target and making the atmosphere during sputtering a mixed gas of argon and oxygen.

Further, when forming an iron oxide layer by a vacuum evaporation method, the iron oxide layer can be formed by, for example, heating metallic iron or metallic iron powder and evaporating it in an oxygen-containing atmosphere. Furthermore, in the case of vapor phase deposition, after forming an iron layer, an iron oxide layer can be formed by thermal oxidation.

The thickness of this iron oxide layer is preferably 2 μm or less. This is E, S, R when it exceeds 2 μm.
This is because it becomes high.

For external connection electrodes, the types of metals in particular are limited to n and Qu.
, 3n, Pb-3n, Mn, Mo, 'W, Ti, Pd,
There are one type or a combination of two or more types such as Affi, and this external connection electrode may have a multilayer structure.
Examples are cr-cu, cr-N i-A Q
and so on. .

Further, examples of purchasing ceramic capacitors according to the present invention include ceramic capacitors made of a single layer dielectric ceramic, multilayer ceramic capacitors, and the like. The present invention is also applicable to the case where the above-mentioned various ceramic capacitors are of grain boundary insulation type.

(Ability: 4-4, 1 series) Hereinafter, this invention will be explained in detail according to examples.

Implementation Pi111°Reramic dielectric material 11 A material having the following composition was prepared as a material.

Nd2Ti207: 63 mol%, 3a Ti
03: 14 mol %, TiO 2: 23 mol % This powder was mixed with polyvinyl alcohol as a binder, a surfactant, a dispersant, and water to prepare a slurry. Next, using this slurry, a ceramic green sheet with a thickness of 35 μm was created by a doctor blade method.

This ceramic green sheet has a length of 7.0 mm,
Cut into pieces with a width of 5.0 mm and place A on this sheet.
gyowt%, pd30vt% Ag-Pd' paste was printed. Eleven ceramic green sheets with internal electrodes formed in this manner were stacked so that the internal electrodes were exposed at the end faces of the laminate. This laminate was fired in air at 1250°C to obtain a sintered unit. (The thickness of each dielectric layer of the laminate was 20 czm.

Next, an iron oxide layer was first formed by sputtering on the end face of this laminated sintered unit where the internal electrodes were exposed.

This iron oxide layer was formed under the following conditions.

Sputtering atmosphere: Argon containing 10% oxygen Pressure: 2x 10-3 Torr Target: 5 inch diameter, 1 mm thick iron plate Voltage: 500 VD, C.

Current: 2. OA sputtering time: 5 minutes Oxide single layer film J'7: 2000A Next, on top of the iron oxide layer, a first layer of external connection mold (Φ) is sputtered to form a Ni layer as a solder heat-resistant layer. It was formed by

This N1 layer was formed under the following conditions.

Sputtering atmosphere: Argon Pressure: 2x10-3 Torr Target: 5 inch diameter, 2 mm thick nickel plate Voltage: 480 VD, C.

Current: 2. OA time: 15 minutes Film thickness: 5000A Furthermore, A was added as a second layer external connection electrode on the Ni layer.
g) t5 was formed by sputtering method.

This Aq layer serves as a layer that can be soldered.

The formation of 8(lli'y'i) was carried out under the following conditions.

Sputtering atmosphere; Argon pressure: 2xlO-3 Torr Target: Aa plate with a diameter of 5 inches and a thickness of 5 mm Voltage: 2 540 VD, C:.

Current: 2.0 A Vf = 6 minutes Membrane eave thickness: 1 μm The multilayer capacitor obtained through the above process was subjected to a high temperature accelerated load life test under the following conditions.

In other words, this capacitor was installed in a temperature atmosphere of 150°C, a voltage of 300V, which is 6 times the rated voltage (50V), was applied, and the insulation resistance (IR) after 100 hours was measured and was 1011 Ω. . Incidentally, the initial value of the insulation resistance (IR) of this multilayer capacitor was 101 TΩ. In addition, when installed in an atmosphere with a temperature of 45°C and a relative temperature of 95%, a rated voltage of 50V was applied, and the insulation resistance (IR) was measured after 500 hours, it was 1011Ω, and no change was observed compared to the initial value. Ta.

Comparative Example 1 Iron oxide 114 was added to the laminated sintered unit with 1 keratin in Example 1.
Under the same conditions as in Example 1, an N1 layer, which is necessary for the 114 electrodes on the outer 1 second layer of the first layer, and an Ag layer, which is connected to the external connection type t of the second layer, are formed without forming a multilayer capacitor. Created.

When this multilayer capacitor was tested in the same manner as in Example 1, the insulation resistance ([R) was 109Ω after 10 hours.
25 hours later, it deteriorated to 106Ω.

Example 2 S "' I O3: 99.3 mol%, J>'2
03: 0.3mo JL/%, S: 02:
Each component was weighed so as to have a composition of 0.2 mo Az%, AQ203: 0.2 mole %, several binders were added to the weighed raw materials at a concentration of 10 M%, and the mixture was milled using a ball mill.
The mixture was rotated for 6 hours for thorough mixing and pulverization. After granulating this, it was molded at a pressure of 100 OK CI/cm2 to form a disc-shaped molded product. This molded body is 1350'C1
It was fired for 2 hours. P on the surface of the obtained VTI device
b, Bi and other metal oxides are applied to give a 1000 to 12
A heat treatment was performed at a temperature of 00°C to convert the grain boundaries of the VD vessel into an insulator, thereby producing a grain boundary insulated semiconductor ceramic body.

Aζ Using this semiconductor ceramic layer, an iron oxide layer, a first dark external connection electrode, and a second layer external connection electrode were formed on the surface by the same method as in Example 1, and a grain boundary insulated semiconductor 1
I made a single capacitor.

This capacitor was subjected to the high temperature accelerated load life test described in Example 1. As a result, the initial value of insulation resistance (
While the IR) was 1Q1f)·Ω, it was 1010Ω after 100 hours, confirming that there was no deterioration in the insulation resistance (IR).

Comparative Example 2゜Using the grain boundary insulated semiconductor porcelain body obtained in Example 2,
Example 1 without forming an iron oxide layer on the surface of this porcelain body
Under the same conditions as above, the N1 layer, which is the first layer for external connection, and the A() layer, which is the second layer for external connection, were formed to produce a grain boundary insulated semiconductor ceramic capacitor.

When this capacitor was tested in the same manner as in Example 1, the insulation resistance (IR) decreased to 107Ω after 10 hours, and deteriorated to 105Ω after 25 hours.

Example 1s (On a 13° alumina base plate, an ACI layer and an N1 layer as a lower electrode were formed in sequence in the same manner as in Example 1, and an iron oxide layer was also formed in the same manner as in Example 1.

Next, SiO, which is a dielectric ceramic, is deposited on the iron oxide layer.
Two films were formed to a thickness of 5000A by high frequency sputtering.

The conditions for forming the SiO2 film by high frequency sputtering are as follows.

Sputtering atmosphere = Argon containing 5% oxygen Pressure: 5xlO-3 Torr Target: 5 inch diameter, 5 mm thick quartz plate Power: soow Time: 100 minutes 5i02 Thickness: 5000 A After that, oxidize on the 5102 film An iron layer was formed in the same manner as in Example 1, and an N1 layer and an ACI layer were sequentially formed thereon in the same manner as in Example 1, to produce a thin film capacitor of 5102.

The high temperature accelerated load life test described in Example 1 was conducted on this capacitor. As a result, the initial value of insulation resistance (I
R) was 10130, while the 100 hour rise was 1013 Ω.

Comparative Example 3 In producing the thin film capacitor according to Example 3, a thin film capacitor was produced by carrying out the method described in Example 3 without forming an iron oxide layer.

When this capacitor was tested in the same manner as in Example 14, the insulation resistance was reduced to 108Ω.

<Effects> As described above, according to the present invention, by interposing the iron oxide layer between the dielectric ceramic and the external connection electrode, the reduction of the dielectric ceramic due to the As a result, it is possible to prevent deterioration of electrical characteristics, particularly deterioration of insulation resistance.

Patent applicant Murata Manufacturing Co., Ltd.

Claims (6)

[Claims] (1) In a ceramic capacitor including a dielectric ceramic and an external connection electrode formed on the surface of the dielectric ceramic, an iron oxide layer is formed between the dielectric ceramic and the external connection electrode. A ceramic capacitor characterized by: (2) A first external connection electrode is formed on the substrate, a dielectric ceramic is formed on the first external connection electrode, and a second external connection electrode is formed on the dielectric ceramic. In the ceramic capacitor formed, an iron oxide layer is formed between the dielectric ceramic and the first external connection electrode and the second external connection electrode, as described in claim (1). ceramic capacitor. (3) A laminated dielectric ceramic element body consisting of multiple layers of dielectric ceramic and multiple layers of internal electrodes that are stacked on top of each other via the dielectric ceramic to form capacitance. In the laminated ceramic capacitor in which a pair of external connection electrodes for taking out capacitance are connected to predetermined ones of the internal electrodes, the dielectric ceramic body and the external connection electrodes are formed. The ceramic capacitor according to claim 1, wherein an iron oxide layer is formed between the ceramic capacitor and the ceramic capacitor. (4) The ceramic capacitor according to claims (1) to (3), wherein the dielectric ceramic has a thickness of 50 μm or less. (5) The ceramic capacitor according to claims (1) to (3), wherein the iron oxide layer has a thickness of 2 μm or less. (6) The external connection electrode is formed by any one of a sputtering method, a vacuum evaporation method, an ion plating method, a vapor phase evaporation method, or an electroless plating method. The ceramic capacitor described in item (3).