JPS6184871U - - Google Patents

Description

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing an embodiment of the impedance testing device according to the present invention, Figure 2 is a diagram showing each signal for operating the circuit shown in Figure 1, and Figure 3 is the impedance value of the object to be measured. FIG. 4 is a signal waveform diagram of each part when the impedance value of the object to be measured is good. 1... Oscillator, 2... Buffer amplifier, 3... Resistor (resistance value r), 4... DUT (impedance value Z),
5...Voltage amplifier, 6...Comparison amplifier, 7...Test reference power supply, 8...Waveform shaping circuit, 9...2-input AND gate, 10...Counter circuit, 11...RS flip-flop circuit (FF), 12...3-input AND gate, 13...N input OR gate, 14...preset counter circuit, 15...digital standard value circuit, 16...memory display circuit, 17...scanning signal, 18...inspection timing signal, 19...reset signal, 20...memory timing signal , e...(oscillator 1
) output voltage, e ₀ ... (voltage drop of the object to be measured 4), E ... (the output voltage of the voltage amplifier 5), Vref ... (the reference voltage of the inspection reference power supply 7).

Claims (1)

[Claims for Utility Model Registration] An oscillator that generates an alternating current signal for testing, and an oscillator that transmits the alternating current signal to each of N devices under test through a resistor having a value much larger than the impedance value of the device under test. an amplifying section that amplifies a voltage drop that occurs in each of the devices under test when voltage is applied and outputs the amplified voltage as a detection voltage; and a reference power source section that generates a DC reference voltage corresponding to the impedance standard value of the device under test. , a comparison unit that compares the reference voltage with the N detected voltages from the amplification unit and outputs a comparison signal; and a comparison unit that shapes the AC signal from the oscillator into a rectangular wave signal, and a counter section that maintains an output state at a predetermined level while counting the same kind of level change point n times, and a scanning signal that is sequentially switched N times for each of the N comparison signals from the comparison section. a scanning signal generating section for sending out a scanning signal; and a gate section for inputting the scanning signal and sequentially passing the N comparison signals from the comparing section while the counter section maintains an output state at a predetermined level. , for each of the N comparison signals sent from the comparison section sequentially through the gate section, count the number of times the comparison signal indicates that the detected voltage is greater than the reference voltage, and this number of times a preset counter section that outputs a first level signal when the preset value is greater than or equal to a preset value set smaller than the value of n; An impedance testing device comprising: a display section that respectively displays "good" in the case of a second level.