JPS62103308U - - Google Patents

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Publication number
JPS62103308U
JPS62103308U JP19509685U JP19509685U JPS62103308U JP S62103308 U JPS62103308 U JP S62103308U JP 19509685 U JP19509685 U JP 19509685U JP 19509685 U JP19509685 U JP 19509685U JP S62103308 U JPS62103308 U JP S62103308U
Authority
JP
Japan
Prior art keywords
transistor
collector
resistor
emitter
whose
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19509685U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP19509685U priority Critical patent/JPS62103308U/ja
Publication of JPS62103308U publication Critical patent/JPS62103308U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示す回路図、第2図
は従来の局部帰還型増幅回路、第3図は従来の全
体帰還型増幅回路を示す。 TR1,TR2:トランジスタ、A:オペアン
プ、C1:コンデンサ、L1:インダクタンス。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a conventional local feedback amplifier circuit, and FIG. 3 is a conventional global feedback amplifier circuit. TR1, TR2: transistor, A: operational amplifier, C 1 : capacitor, L 1 : inductance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ベースを入力端子とし、エミツタを抵抗を介し
接地した第1のトランジスタと、前記トランジス
タのコレクタにベースを接続し、エミツタを接地
した第2のトランジスタと、第2のトランジスタ
のコレクタと第1のトランジスタのエミツタの間
に直列に接続したインダクタと抵抗を設け第1の
帰還路とし、第2のトランジスタのベースとコレ
クタの間に直列に接続したコンデンサと抵抗を設
け第2の帰還路を設けたことを特徴とする負帰還
増幅回路。
a first transistor whose base is an input terminal and whose emitter is grounded through a resistor; a second transistor whose base is connected to the collector of the transistor and whose emitter is grounded; and the collector of the second transistor and the first transistor. An inductor and a resistor connected in series between the emitter of the transistor are provided as a first feedback path, and a capacitor and a resistor are connected in series between the base and collector of the second transistor to provide a second feedback path. A negative feedback amplifier circuit featuring:
JP19509685U 1985-12-20 1985-12-20 Pending JPS62103308U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19509685U JPS62103308U (en) 1985-12-20 1985-12-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19509685U JPS62103308U (en) 1985-12-20 1985-12-20

Publications (1)

Publication Number Publication Date
JPS62103308U true JPS62103308U (en) 1987-07-01

Family

ID=31152671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19509685U Pending JPS62103308U (en) 1985-12-20 1985-12-20

Country Status (1)

Country Link
JP (1) JPS62103308U (en)

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