JPS62152246A - Communicating control system - Google Patents

Abstract

PURPOSE:To execute data processing in accordance with the significance degree of data by classifying the transmitting receiving data to the level of plural grades and stopping the transmission from an opponent for the data except the data of the top priority level when a memory comes to be full. CONSTITUTION:At both of main control devices 11, 12... of communicating devices 51, 52... and communicating control parts 31, 32..., receiving buffer memo ries 111, 112..., 311, 322... are provided, the transmitting receiving data are classi fied to the level of plural grades and the data of the level excluding the top priority level are accumulated to the block in the memory corresponding for respective levels. When the block of a certain level of the memories 111, 112... comes to be full, the receiving data are accumulated to the block of the same level of the memories 311, 312..., and the block of a certain level interrupts the transmission to the opponent side when the memories 311, 312... come to be full. The receiving data of the top priority level execute the top priority processing without holding the transmission.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a communication control system in which a main control unit having a judgment processing function transmits and receives data to and from a counterpart party.

[Conventional technology]

In building management control equipment, process control equipment, etc., each piece of equipment installed in a distributed manner is connected via a transmission path, and each piece of equipment performs predetermined control while transmitting and receiving data to and from each other. In order to make local control decisions and control data transmission and reception, each device is equipped with a main control section that has a decision processing function. This is performed under the control of the main control unit via a communication interface provided between the two and not equipped with a judgment processing function.

[Problem that the invention seeks to solve]

However, when the main control device is configured with a processor such as a microprocessor, the main control device performs communication control such as data transmission and reception, and therefore requires a program that includes communication procedures such as calling the other party and confirming the response. In addition to increasing the operating load, when the received data is difficult to process, a large-capacity buffer memory must be provided separately due to the processing speed of the processor, which makes the configuration complicated and expensive. It is occurring.

Also, if the content of the received data covers various ranges,
These data must be handled according to their importance, urgency, etc., and the processing order must be determined according to the content of the received data.
When received data includes time data, alarm signals, emergency commands, etc., a problem arises in which it is necessary to quickly respond to these data.

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention is constructed by the following means.

That is, it includes a communication control unit connected to the transmission path, and a control unit that sends and receives data classified into multiple levels including priority levels with the other party via this communication control unit. a first reception buffer memory for storing received data for each level in the communication control section; a second reception buffer memory for storing received data for each level in the communication control section; and a main control section and a communication control section. A shared memory is provided, and when the blocks allocated to any level other than the priority level of the first reception buffer memory become full, the main controller sets a reception pending flag for that level in the shared memory, and this reception In response to the hold flag, the communication control unit stores the received data in a block appropriate to the level of the second reception buffer memory, and when this block is also full, the communication control unit causes the other party to stop transmission. While the signal is transmitted, the received data at the priority level is processed with the highest priority without using the reception suspension flag and the transmission suspension signal.

[Effect]

Therefore, a communication control section provided in addition to the main control section performs various communication controls, and backup memories for reception are distributed to both control sections, making it unnecessary to provide a separate backup memory. If both the first and second reception buffer memory blocks other than those assigned to the middle priority level become full, a transmission hold signal is sent to the other party, which causes the other party to interrupt transmission. Received data no longer arrives.

In addition, since the above operations are performed for each level, excluding the priority level of the received data, processing according to the contents of the received data is performed smoothly, and the received data at the priority level is processed from the above operations. Since it is excluded and processed preferentially, the response to this is quick.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to figures showing examples.

FIG. 1 is a block diagram showing the configuration. The main control unit (hereinafter referred to as MCT) 1s consists of a processor such as a microprocessor (hereinafter referred to as CPU) and memory, etc. A reception pack memory (hereinafter referred to as RBM) 11 + is provided, and a communication control unit (hereinafter referred to as 0
CT) 31 is provided with a 20th RBM 31 and a transmission buffer memory (hereinafter referred to as SBM) 321, each using a specific area in the memory.

Also, MCT1. and the shared memory with CCT31 (hereinafter referred to as
CMM) 4 l is provided, for which MCT
1+ and CCT3! It is possible to set and reset flags from both sides, and these constitute a communication device (hereinafter referred to as CE) 5+.

On the other hand, CE5□ also has MCTl 2 and CCT32
,0MM4□, and MCT12 has RBM.
I 12 , CCT3□ has RBM31□ and CBM
322 are respectively provided in the same manner as described above, and MCT11 +
1z each transmits and receives data to and from the other party via the CCT 31+32, transmits input data from various sensors or switches, etc. not shown in the diagram, and makes control decisions based on the input data and received data. It is used to send output data to the control target equipment omitted above.

In addition, a larger number of CG5s are connected to the transmission path 2 depending on the situation, and each one communicates with each other as necessary, or one of them transmits the same content to all the others. Overall disciplined control is carried out.

Moreover, MCT 1, +12 is CCT3. ．． The received data given from 3□ is temporarily stored in RBMllt, 112, and the contents are sequentially decoded and used by the CPU, and the transmitted data is sent to CCT3! , 32, and the CCT 3, + 32 sends it to the SBM 321.
Once the data is accumulated in 322 and then transmitted to transmission path 2, if RBM112 becomes full with received data, CCT 3+ + 32 becomes RBM3.
11.312, while CBM
32 and 322 is full, MCT 1+, 12
These MCT 17.12 and CCT3 + command to suspend transmission operations.

The exchange of information with the MM4 + + 42 is carried out using flags set in the 0MM4 + + 42. However, the transmitted and received data is classified into multiple levels including priority levels according to these contents. , the above operations are performed for each level except for the highest priority level, and according to this, RBMll, 112
, 31t, 312, SBM32+.

322 is divided into blocks, each address corresponding to each level, as shown in FIG. 2, for example.

The figure shows RBM11, (B) RBM31, (Q indicates the contents of CBM32, RBMll,31 is the priority level block RBL corresponding to the highest priority level,
It is divided into the first rubel blocks RBL and ~RBL3 corresponding to the subsequent first to third levels, and the number of addresses for these is determined according to the amount of received data for each level. Each capacity is set.

Similarly, 81M32 in (C) is divided into 3 priority level blocks SBL to 3rd level block sni, and the capacity of each is determined according to the amount of data to be transmitted for each level.

Note that the flag setting for 0MM41 + 42 is also performed for each level, and each CMMjl + 42 has a capacity of the corresponding number of bits.

FIG. 3 is a comprehensive flowchart of the control situation by CPU K of MCT1.
100L r second level? J 1002, "Second level? J 1003, "Fourth level? J 1004 are sequentially determined, and if step 1001 is y (yEs), immediately perform the priority level block "RBL, check j 1011" of RBMl 1, If the result is Y, the received data at this level is time data, alarm signals, emergency commands, etc., and there is a limit to skipping meals, so it may be full. In contrast, the abnormality processing J 1013 displays an alarm, sends an abnormality signal, etc., but step 1012
In this case, the received data is stored in the priority level block RBL of RBM11, and steps 1001 and subsequent steps are repeated through other routines such as decoding and control operations.

Also, step 1001 is N and step 1002 is Y
If so, the first rubel block RBL of RBMll.

1021 is performed for the ``th rubel memory check process'', step 1002 is also N, and step 1003
is Y, the second level block RBL of RBMll
"Second level memory check processing J 10
31, step 1003 is also N and step 10
If 04 is Y, the third level block R of RBMll
[Third level memory check processing J for BL3
Perform 1041.

Note that the details of steps 1021, 1031, and 1041 will be described later.

FIG. 4 is a comprehensive flowchart of the control status by the CPU of CCT 3, in which "priority level?J 2001" to "third level ?J 20
04 are sequentially determined, and if step 2001 is Y, "
Transmission data Ah, 9? Check J2011, Y of this
81M32 priority level block SBL immediately
s [Storage data to SBL s] 201
After performing step 2, check "Received data?" 2021, and if this is also Y, immediately proceed to the priority level block r RBL of RBM31! Send received data from l
2022) and forwards the received data to CCT 1.

On the other hand, step 2001 is N and step 2002 is Y
If so, perform the "th level ψ memory check process J 2031 for each second level block RBL and SBL of RBM31 and S8M32, and if step 2002 is also N and step 2003 is Y, 8
1M31, SBM32 second level block RB
If "second level memory check processing J 2041 is performed for L2, 5BL2, and step 2003 is also N and step 2004 is Y, 81M31, S
Each third level block RBL3, 5BLs of BM32
“Third level memory check processing j 205 for K”
1 and repeats steps 2001 and subsequent steps via other routines such as transmission/reception control.

Therefore, the transmitted and received data is operated according to each level in steps 1021, 1031, 1041 and 20.
31.2041.2051, respectively, but if it is a priority level, steps 1011 to 1 are performed immediately.
Since operations 013 and 2011 to 2022 are performed and processed with priority, the transmission and reception of these and the response of CCT 1 are quick.

Note that the details of steps 2031, 2041, and 2051 will be described later.

FIG. 5 shows steps 1021 and 1031 in FIG.

In the flowchart showing the details of 1041, Rashi, “RBM
"Check" 101 checks the reception data accumulation status of the block appropriated to the level, and displays "RUM full?"
J102 is determined, and if it is Y, the flag at the relevant level sets [reception pending flag to CMM JIQ3].
When step 102 is N, the corresponding level of CMM4 [reception pending flag set? j Check 111, and if it is Y, set "
After resetting the CMM reception pending flag J112, "send interrupt signal to OCT" 1 corresponding to the relevant level.
13, interrupt manual input provided for each level of CCT3
Sends an interrupt signal of the relevant level to T.

Next, "CMM transmission pending flag check" 12 is performed for the flag at the relevant level, which is set according to the conditions described below.
Execute 1 and [transmission pending flag/cera)? J122 is judged, and if it is Y, "Cancel transmission" 123 is sent to C
In contrast to temporarily stopping the transmission of data to CT3, when step 122 is N, "transmission permission" 124 is selected.
The transmission data of the relevant level is sent to the CCT 3 as necessary.

Figure 6 shows step 2031.2041°20 in Figure 4.
51 is a flowchart showing the details of ``Transmission data Ap?J201'' from MCT1, and if this is Y, ``Transmission data is SBM
"Accumulate to SB" 202 for this block.
M full? Check J203, and if it becomes Y, "Set send pending flag to 0" 21 corresponding to the level.
Step 1 is performed corresponding to step 121 in FIG.

Next, the data from transmission path 2 addressed to itself [Received data ah! 0? J
221, and depending on Y of this, the content of the received data is at the relevant level "Transmission hold command?J222" is determined.
When this is Y, the corresponding level's "transmission pending flag Φ set" J223 is executed to the memory in CCT S.
In response to step 222 ON, the "transmission permission command? J231" of the relevant level is similarly determined, and if this is Y, the "transmission pending flag reset" J232 of the relevant level corresponding to step 223 is performed.

Thus, while step 223 causes CCT 3 to stop transmitting, step 232 allows CCT 3 to resume transmitting.

Further, when step 231 is also N, corresponding to step 103 in FIG. 5, performs [cMM reception pending flag check] 241, determines the "reception pending flag 7)?J242" of the level concerned, If this is Y, the block allocated to the level of RBMl 1 of MCT1 is full, so "Storage received data to RBM" 251 is executed! 7
．． Accumulate in the block allocated to the relevant level of 81M31, and this is r RBM full? If it is Y in J252, perform the "transmission hold command/send" 253 of the corresponding level corresponding to step 222 to the other party, and send the "send hold command/send flag set" of the corresponding level to the memory in the CCT3. Do 254.

On the other hand, in response to step 242 ON, the received data is transferred from the block at the level to the MCT 1 by the ``send received data from l'-RBM'' 261, and in response to step 254, the received data is transferred from the block at the level to the MCT 1. Check the sent flag set? J262, and if it is Y, perform the "transmission permission command/send" 263 of the level corresponding to step 231 to the other party, and step 2
Corresponding to 54, "transmission hold command/transmitted flag reset" 264 of the relevant level is performed.

FIG. 7 shows the 0CT30 corresponding to step 113 in FIG.
In the flowchart of the interrupt operation by CPH, the RB is sent to MCT 1 by 311 "If the interrupt signal is not set? j 301 is Y, send received data from J RBM."
M31(7) Transfer the received data from the block at the corresponding level.

Therefore, if the block allocated to the relevant level in RBMl 1 of MCT 1 is no longer full, R of CCT 3
The same level received data is transferred from BM31,
The CPU of the MCT 1 processes the received data continuously, and responds to the received data smoothly and quickly.

In addition, when the block allocated to the level in RBM11 of MCT 1 is full, the reception pending flag is set according to the level of 0MM4, and CCT 3
Since the received data is stored in the block appropriate to the level of A corresponding transmission hold command is sent, and the other party interrupts transmission in response, thereby preventing invalid transmission.

On the other hand, if the blocks allocated to the corresponding level in the CBM32 of CCT 3 are full, the transmission suspension flag is set according to the level in 0MM4, and MCT1 has to stop sending out the transmission data. Sending of invalid transmission data is prevented.

Figure 8 shows that three or more CF2s are connected to the transmission path 2, the transmission path 2 is used in common, and only one of them that has acquired the trust transmits, and communication with a specific partner is performed according to this. CP of CCT 3, when the CF2 sequentially performs the following steps: 1. Starts the communication, transmits a transmission right takeover signal in response to the end of the communication, and other CF2s that receive this acquire the transmission right.
In the flowchart of transmission right acquisition control by U, ``Transmission right handover signal/reception?If J401 is Y, SBM3
For each block in 2, check ``Transmission data present?J402'', and if this is Y in any block, check ``Transmission pending flag ?J411'' at the corresponding level in step 223 of FIG. In addition, in response to Y' of this or N of step 402, the receiving state is maintained by ``not acquiring transmission right'' 412.

On the other hand, if step 411 or N is determined, "acquire transmission right" 421 is performed as described above, then "data transmission" 422 is performed, and for each block "SBM full?" is executed.
423, and if it is N, "CMM transmission pending flag reset" 424 is performed for each level in the same way as step 212 in FIG. Repeat.

Therefore, unless a transmission permission command is received in step 231 of FIG. 6, the reception state is maintained without acquiring the transmission right, so communication is performed by other CFs 2 during this time, improving the operational efficiency of the transmission path 2. .

FIG. 9 is a flowchart showing another embodiment similar to FIG. 6, but in which the transmission and reception of the transmission permission command is omitted and the transmission suspension command is ensured.
? J501 to “Set transmission pending flag to CMM” 5
11, and [Received data? J521, [Transmission hold command? j522'l is the same as in FIG. 6, whereas if step 522 is Y, the "transmission pending timer preset" 5 for each level configured in the CPU of CCT3 is
23 to start this, then step 22
Same as 3, "Send pending flag set" 5 of the relevant level
Do 24.

Further, in response to N in step 522, step 241
, 242, "CMM Reception Pending Flag Check" 531 and "Reception Pending Flag Sera)?J532" corresponding to the level are determined, and if step 532 is Y, the same as in steps 251 and 252, the flag is allocated to the corresponding level. "Accumulate received data to RBM" by block
541 and “RBM full?J542 is judged,
If this is Y, same as step 262, the corresponding level [Transmission hold command/sent flag set? J543 is checked, and in accordance with the N of this, the retransmission timer by the CPU is started by J551 of the relevant level (retransmission timer precer) in the same way as in step 523,
"Transmission hold command/send" 552 and "transmission hold command/sent completed flag set" 553 of the level concerned are performed in the same manner as steps 253 and 254.

Note that when step 532 is N, the same as step 261 (send received data from rRBM) 561 is performed.

Next, the "Transmission pending timer timeout? J571" of the level is checked, and if it is Y, the "Transmission pending flag reset" 572 of the corresponding level is performed in correspondence with step 524, and the "Retransmission timer timeout? J571" is checked. J581 is checked, and when this becomes Y, "RBM full?j582" is sent to the block at the relevant level.
Depending on the Y of this, the retransmission timer
Preset" 591 in the same manner as step 551,
Same as step 552, “Transmission hold command/send” 592
On the other hand, when step 582 is N, "transmission hold command/transmitted flag reset" 593 is performed corresponding to step 553.

Therefore, the transmission suspension state is automatically canceled in accordance with the timeout of the transmission suspension timer, so it is possible to omit the transmission and reception of the transmission permission signal, and it is also possible to determine whether the block of the fi RBM 31 is full or not depending on the timeout of the retransmission timer. As a result, if it is still full, the transmission suspension command is repeatedly transmitted, so that the transmission suspension command is guaranteed.

Also, RBMl 1, 31 is MCT 1 and CCT
Since the CCT 3 is provided separately for each CCT 3, it is not necessary to provide a separate buffer memory, and since the CCT 3 is used exclusively for communication, it is possible to allocate a considerable range of the memory capacity to the RBM 31.

Note that if the block allocated to any level other than the priority level in the RBMl 1 of the MCT 1 is no longer full, the received data of that level is immediately transferred from the RBM 31 of the CCT 3 in response to the transmission of an interrupt signal. M.C.T.
Processing of received data by CPU 1 is not interrupted, MCT 1 responds quickly to received data, and
CT1 does not need to control communication, the operating load is reduced, and control conditions can be made faster and over a wider range.

In addition, the transmitted and received data is classified into each level including the priority level, and the above operations are performed for each level except the priority level, and the above operations are excluded for the priority level, and the top priority is given. Since the data is processed, processing according to the contents of each data can be performed rationally, and in particular, response to priority level data can be sped up.

However, CMM 4 uses the memory of MCT 1 or CCT 3, and uses DMA (Direct Memory
Access,) may be shared, and RBM
Registers, etc. may be used as 11, 31, SBM32, and CMM4, and the number of level classifications of each data may be determined according to the conditions, and the number and capacity of each block in Fig. 2 should be set accordingly. Bye.

Furthermore, in Figures 3 to 9, various modifications can be made, such as replacing the steps or replacing them with other equivalent ones, or omitting unnecessary ones, depending on the conditions. be.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, MC
In addition to reducing the operating load of the T, there is no need to separately provide a buffer memory for received data, improving the control function of the MCT and simplifying the overall configuration, and processing of received data can be performed at each level. data is received and processed in a rational order, ensuring that the response is reliable and prompt according to the level.In particular, received data with priority levels are processed preferentially, which speeds up the response and meets the requirements for prompt response. Remarkable effects can be obtained in various data communication controls that handle received data.

[Brief explanation of drawings]

The figures show an embodiment of the present invention, with FIG. 1 being a block diagram showing the configuration, FIG. 2 being a diagram showing the contents of RBM and SBM, and FIG. Figure 4 is a comprehensive flowchart of the control status by the CCT CPU, Figure 5 is a flowchart showing details of Figure 3, Figure 6 is a flowchart showing details of Figure 4, and Figure 7 is a flowchart showing the details of Figure 4. FIG. 8 is a flowchart of transmission right acquisition control by the OCT CPU, and FIG. 9 is a flowchart showing another embodiment corresponding to FIG. 6. f+, 12...MCT (main control section), 2...
・Transmission path, 3+, 32...CCT (communication control unit), 4+, 42...CMM (common memory),
57,5□...CE (communication equipment), 11,111,
11□, 31°31□, 31□...Written RBM (reception buffer memory), 32.32+, 322...
・SBM (transmission buffer memory), INT...interrupt input, RBL, , SBL,...priority level block, RBL, , SBL, ・as second level block, RBL2 + 5BL2...e・2nd level block, RBL3.5BL3... Urn 3rd level block.

Claims (1)

[Claims] It comprises a communication control unit connected to a transmission path, and a main control unit that transmits and receives data classified into multiple levels including priority levels with the other party via the communication control unit,
a first storage unit for storing received data in the main control unit for each level;
a second reception buffer memory for storing the received data for each level in the communication control section; and a shared memory for the main control section and the communication control section; When a block allocated to any level other than the priority level of the reception buffer memory of the block becomes full, the main controller sets a reception suspension flag for the level in the shared memory, and the reception suspension flag of the priority level is set in the shared memory. The communication control unit stores the received data in a block appropriate to the level of the second reception buffer memory, and when the block is also full, the communication control unit sends a transmission hold signal to the other party to stop transmission. On the other hand, the communication control method is characterized in that the received data of the priority level is processed with the highest priority without using the reception suspension flag and the transmission suspension signal.