JPS6216539B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a preprocessing process in semiconductor device manufacturing, that is, a substrate processing process before semiconductor device manufacturing.

In general, when manufacturing semiconductor devices (including integrated circuits such as ICs and LSIs), there are so-called process-induced defects and harmful impurities (defects) that have a large effect on the characteristics of the devices.

These defects and impurities not only reduce the lifetime of the carrier, but also have a serious adverse effect on device characteristics due to spike diffusion and the like in the impurity diffusion process. In order to prevent the occurrence of these defects in the device operating region and to remove harmful impurities, a method of intentionally generating crystal defects inside a silicon wafer and using them as sinks for gettering, so-called intrinsic gettering. A gettering method such as an interinsic gettering method (hereinafter referred to as IG method) is incorporated into the manufacturing process.

In this IG method, defects are generated inside the silicon wafer, and a defect-free region called the Denuded Zone (hereinafter referred to as DZ) is created near the wafer surface related to device operation. That is, D.
This is to clean the DZ related to element operation by gettering harmful impurities mixed in the Z. to internal defects.

For a wafer with IG effect, the DZ width is as narrow as possible to enable effective gettering.
Further, it is preferable that the density of the generated defects is as high as possible (10 ⁵ cm ^-2 ) or more. Furthermore, the above
The DZ width differs depending on the element to be formed. For example, 5 μm for bipolar transistors, 3 μm for MOS transistors
The distance from the substrate surface is related to element operation, and the DZ width is also set to an optimal value as narrow as possible.

An outline of the currently known IG method will be explained below with reference to the drawings.

As shown in FIG. 1a, a silicon wafer is first heat-treated at 1100° C. for about 20 hours in an N ₂ atmosphere.

Silicon wafers manufactured by the normal CZ method (Czochralski method) have a surface area of 0.5 to 2.0×10 ¹⁸ cm inside.
It contains oxygen at a density of about ^-3 , and although the mechanism itself is still unknown, it is known that this oxygen concentration is an important factor in the formation of crystal defects.

In addition, all oxygen concentration indications in this specification are
ASTM (American Semiconductor Testing and
This is based on the standards of Materials.

Here, by performing heat treatment at 1000° C. or higher, oxygen near the surface is out-diffused to the outside as schematically shown by arrows. At the same time, inside the wafer, the wafer formation state (as
The defective nuclei that existed in the grown state) disappear or dissolve into solid solution. In addition, in the usual IG method, a protective film such as SiO ₂ is coated in advance to prevent the wafer surface from becoming rough due to long-term high-temperature processing.

Next, as shown in FIG. 1b, heat treatment is performed at a temperature of 700 to 800° C. for about 40 hours in the same N ₂ atmosphere. This is a process of forming high-density defect nuclei by so-called low-temperature annealing.

In the process a, oxygen near the wafer surface is out-diffused to the outside, but the oxygen concentration inside the wafer is still high. By applying heat treatment at 700 to 800°C, the oxygen is concentrated to form defect nuclei.

That is, in this process, a high density of defect nuclei is increased to some extent inside the wafer. However, in the vicinity of the wafer surface, the oxygen concentration is sufficiently lowered by the high-temperature annealing in step a above, and the defect nuclei are eliminated or dissolved into solid solution, so that a high density of defect nuclei is not formed.

Then, as shown in Figure 1c, in an _N2 atmosphere.
A DZ is formed by heat treatment at about 1050℃ for about 20 hours.

By performing heat treatment at a relatively high temperature again,
The high-density defect nuclei formed in the process of b.
It grows on crystal defects that can serve as IG sources. Under high-temperature heat treatment, if the defect nucleus has already grown larger than the critical size, it is possible to grow it into a defect, but if not, a
As shown in the process described above, the defect nuclei disappear or dissolve into solid solution.

Furthermore, even if defect nuclei are formed near the wafer surface in the process b, almost all of the defect nuclei disappear or are dissolved in solid solution in the process c, so a clean DZ can be obtained. .

The IG method, which repeats the above high-temperature treatment and low-temperature treatment, has already been described in JP-A-55-38098, 54-157576, and 53-15764, and is used as a pretreatment process in the production of actual semiconductor devices. about to be applied.

However, as mentioned above, each heat treatment requires a long time of 20 to 40 hours, so although its effectiveness has been fully confirmed as a result of academic research, it is difficult to apply it to actual processes. be.

In other words, because the high-temperature heat treatment is performed over a long period of time, the surface of the silicon wafer becomes considerably rough even if a sufficiently thick protective film such as SiO ₂ is formed, so it cannot be sent directly to the semiconductor device fabrication process. I'm not going.

Here, at least one surface treatment such as polishing is required, which increases the number of steps and makes it difficult to accurately control the DZ width.

In addition, heat treatment that actually lasts for more than 60 hours significantly reduces productivity and may also cause warping or distortion of the wafer.

The present invention solves the above-mentioned problems of the conventional IG method, and aims to provide a heat treatment method that is shorter than the conventional method and allows for better growth of crystal defects.

Another object of the present invention is to enable an IG method that does not relatively roughen the wafer surface and does not cause warping or distortion of the wafer itself.

The above object of the present invention can be achieved by slightly different means depending on the oxygen concentration contained in the silicon substrate. In the pretreatment process of semiconductor device manufacturing, the present invention is capable of heating a silicon substrate whose internal oxygen concentration is higher than 1.5×10 ¹⁸ cm ^-3 from a low temperature of 500°C to 900°C to a high temperature of 950°C to 1300°C. 5 to 14℃/
The temperature is raised at a temperature increase rate of 14°C/min., then the temperature is lowered from the high temperature to the low temperature after a prescribed heat treatment, and then from the low temperature to the high temperature at a temperature increase rate of 14°C/min. or less.
1. A method for manufacturing a semiconductor device, comprising the step of repeating heat treatment more than once to form crystal defects inside the substrate. In the pretreatment process of semiconductor device manufacturing, the concentration of oxygen contained inside is 1.5×
500℃ to 10 ¹⁸ cm ^-3 or less silicon substrate
From a low temperature of 900℃ to a high temperature of 950℃ to 1300℃ by 5℃/
The temperature is raised at a temperature increase rate of 14°C/min. or less, and after the specified heat treatment is performed, the temperature is lowered from the high temperature to the low temperature, and then from the low temperature to the high temperature one or more times at a temperature increase rate of 14℃/min. or less. This is achieved by a method for manufacturing a semiconductor device, which comprises the steps of repeating heat treatment to form crystal defects inside the substrate.

That is, for a substrate with an oxygen concentration higher than 1.5×10 ¹⁸ cm ^-3 , heat treatment is performed at a heating rate of 5 to 14°C/min., followed by at least one heat treatment at a heating rate of at least 14°C/min. Repeat the heat treatment. In addition, for those whose oxygen concentration is lower than 1.5 × 10 ¹⁸ cm ^-3 , heat treatment is performed at a temperature increase rate of 5°C/min. or less,
The heat treatment is then repeated one or more times at a temperature increase rate of at least 14°C/min.

In any case, the present invention is different from conventional crystal defect forming methods in which high and low temperatures are repeated at a specific temperature over time, and is characterized in that heat treatment is repeated at a predetermined temperature increase rate. .

The reason why crystal defects are formed by the temperature raising process of the present invention will be explained below with reference to FIG.

FIG. 2a shows an example of a temperature raising process according to the present invention, in which the horizontal axis represents time and the vertical axis represents temperature.
Further, FIGS. 2b to 2g show the state of internal defects at the respective corresponding points in FIG. 2a.

b shows the state of internal defects and defect nuclei before starting heat treatment by temperature elevation.

The horizontal axis indicates the density of defects or defect nuclei, and the vertical axis indicates the size of defects or defect nuclei. In the figure, broken line 1 indicates the critical size that disappears by heat treatment at 750°C, and broken line 2 indicates the critical size due to etching, etc. This is the critical size for defect annihilation at the highest temperature at which the formed defect can be confirmed or used in subsequent wafer processing. The same applies to c to g below.

The low temperature value for starting the temperature increase is preferably as low as possible, for example, 500 to 900°C. That is, since it is thought that the defect density is determined by a mechanism similar to the defect nucleus growth in conventional low-temperature annealing, the lower the setting of this low-temperature value, the higher the defect density can be.

At the end of step b, when the heat treatment by temperature elevation has not yet started, defects and defect nuclei of various sizes exist within the wafer with a certain distribution.

However, in wafers produced by the normal CZ method, all defects are smaller than the size of the broken line 2, and their existence cannot be confirmed even when a cross section of the wafer is formed by means such as etching.

c shows the state of internal defects and defect nuclei at the initial stage of heat treatment due to temperature elevation.

Most of the defective nuclei grow and their distribution begins to move upward in the diagram. Further, although some defect nuclei smaller than the critical size 1 disappear or dissolve into solid solution, new defect nuclei are formed inside. The formation of new defect nuclei is carried out by the same mechanism as the low-temperature annealing shown in FIG. 1b.

d shows the state of internal defects and defect nuclei during the middle stage of heat treatment due to temperature rise.

Defect nuclei grow depending on the heating rate and temperature.
Oxygen near the surface is out-diffused and most of the defect nuclei near the surface begin to disappear.

e shows the state of internal defects and defect nuclei in the latter stage of heat treatment due to temperature rise.

As for setting the maximum temperature value, the higher the temperature, the more defects will grow, but if it is too high, the defects may disappear or become solid solution beyond the predetermined DZ width, similar to the high temperature annealing shown in FIG. 1a. Therefore, 950℃~
It is preferable to set the temperature to about 1300°C.

Further, during heat treatment by increasing temperature and heat treatment at high temperature, growth of internal defects progresses, and some of them exceed the critical size indicated by broken line 2.

Defect nuclei near the surface completely disappear at high temperatures, forming a DZ.

f indicates the state of internal defects and defect nuclei during heat treatment due to temperature reduction.

Immediately, defect nuclei that exceed the critical size indicated by broken line 1 during the heating process continue to grow even during the cooling process. However, since the same effect as low temperature annealing is exhibited again, new defect nuclei are formed. However, its size is negligible in normal device operation, and it can be completely eliminated by further increasing the temperature. In addition, since the oxygen concentration is low near the surface at that point, no defect nuclei are formed.

g indicates the state of internal defects obtained by repeating the heat treatment by increasing and decreasing the temperature several times.

Ultimately, it is preferable that all the defects formed exceed the critical size shown by broken line 2, and that the defects and defect nuclei near the surface are completely eliminated, but the setting of the defect size that causes them to grow is mainly It depends on the degree of IG effect required.

The growth of defects and defect nuclei in the heat treatment process by temperature elevation according to the present invention has been explained above, but as is clear from the steps b to f above, in the present invention, the growth of defects and defect nuclei is achieved without changing the density of internal defects. This is to grow the defect size.

That is, the critical size indicated by the broken line 1 in the above figure is determined by setting the minimum temperature value, and defects and defect nuclei smaller than the critical value will eventually disappear, and defects larger than the critical value will eventually disappear. and the defective nucleus is
It gradually grows and becomes a crystal defect with an IG effect.

In the present invention, as described above, setting the lowest temperature value and the highest temperature value is an important factor in determining the defect density and the DZ width. However, in applying the present invention, the most important considerations are the temperature increase rate and the oxygen concentration of the substrate.

The DZ width can be controlled by setting the temperature increase rate, but as mentioned earlier, the temperature increase rate must be changed depending on the oxygen concentration of the substrate.

In silicon wafers produced by the normal CZ method, there are large variations in the concentration of oxygen contained depending on the formation conditions, so it is difficult to set the oxygen concentration. Therefore, it is necessary to change the temperature increase rate to achieve optimal defect growth, especially when the oxygen concentration is high or low.

The relationship between the oxygen concentration of the substrate and the temperature increase rate will be explained below.

Figure 3 shows the temperature increase rate (℃/min.) and DZ width (μm) for a substrate with an oxygen concentration [Oi] higher than 1.5×10 ¹⁸ cm ^-3 , for example, 1.8×10 ¹⁸ cm ^-3 . Show relationships.

Here, the minimum temperature value is 750℃ and the maximum temperature value is 1100℃
These are the experimental results of 30 minutes of heat treatment at the lowest temperature value. Furthermore, it was shown that the internal defect density tended to be higher when the temperature increase rate was lower.

As is clear from the figure, the DZ width becomes narrower as the temperature increase rate is lowered. From this, it appears that by performing heat treatment at a seemingly low temperature increase, the DZ width becomes narrower and an excellent IG effect is obtained.

However, in the plots based on the experimental results, the DZ width is measured at the midpoint between the region where lattice defects have grown sufficiently and the region where defects are completely eliminated. Therefore, from the DZ width indicated by each plot, approximately 10~
15 μm is a region where some defects exist.

That is, in FIG. 3, in the DZ formed at 1 to 5 DEG C./min., internal defects appear even near the substrate surface, making it impossible to form a semiconductor device on the substrate.

Therefore, in the present invention, the oxygen concentration is 1.5×
5-14℃/ for substrates larger than 10 ¹⁸ cm ^-3
At least the first heat treatment must be performed at a heating rate of min. Furthermore, if the temperature increase rate is 14°C/min. or more, the temperature change per hour dT/dt is too large and stable heat treatment cannot be applied to the substrate, making it difficult to apply the present invention. .

Next, for substrates with an oxygen concentration lower than 1.5×10 ¹⁸ cm ^-3 , defects as explained in FIG. 3 above do not occur.

This is thought to be because in the case of a substrate with a low oxygen concentration, internal defects are less likely to form because the concentration of oxygen, which is a factor in defect nucleation, is low, but this is simply because the defects are not observed due to etching. IG effect can be obtained. Here, even larger
In order to have an IG effect, the temperature must be 5 to 10℃/min, similar to the above-mentioned substrate with an oxygen concentration higher than 1.5×10 ¹⁸ cm ^-3 .
When performing heat treatment at a temperature increase rate of , it is not practical because after a long period of annealing at the lowest temperature value, the temperature must be raised and lowered many times.

By the way, when the oxygen concentration is relatively high, defects appear even on the substrate surface, making it impossible to apply a heating rate of 1 to 5°C/min. It has been confirmed through experiments that its application is effective against.

That is, when the oxygen concentration is lower than 1.5×10 ¹⁸ cm ^-3 , defects are difficult to form and at the same time, defects are not formed near the substrate surface.

Therefore, it is recommended to perform at least the first heat treatment at a temperature increase rate of 1 to 5℃/min.1.5×10 ¹⁸ cm ^-3
Necessary for substrates with lower oxygen concentrations.

As described above, in the heat treatment by increasing the temperature of the present invention, by performing the temperature increasing step about three times, although there may be slight variations depending on each substrate, it is possible to form a good DZ and grow defects that become IG sources.

In other words, for example, the minimum temperature value is 650℃ and the maximum temperature value is 1100℃.
If heat treatment is performed by repeatedly increasing and decreasing the temperature at 2°C/min and holding the maximum temperature for 40 minutes, it will take approximately 24.5 hours, but the conventional heat treatment as explained in Figure 1 will take a total of 60 hours. It is possible to obtain defect sizes comparable to those obtained by applying it for a long time.

The fact that the defects during heat treatment can be greatly reduced by the present invention is based mainly on experimental results, and there is no clear theoretical support. However, considering the current general theory of the process related to defect formation, the following reasons are inferred.

What is required in the IG method is firstly the growth of crystal defects inside the wafer and secondly the formation of a DZ, that is, the out-diffusion of oxygen near the wafer surface and the disappearance and solid solution of defect nuclei.

In the present invention, these steps are performed at once during the temperature raising step. That is, in the heating process, the density of defect nuclei is increased at a relatively low temperature, and then,
At a relatively high temperature, the defect nucleus grows to form a defect that causes IG to occur.

On the other hand, in conventional heat treatment methods, there are two steps: out-diffusion of oxygen at high temperatures, annihilation of defect nuclei, and growth of solid solution or high-density defect nuclei into defects having an IG effect; At the time, the densification of defect nuclei was carried out in separate processes.

In this process of out-diffusing and adding oxygen near the surface of the substrate through high-temperature heating to eliminate or dissolve defect nuclei only near the surface, many internal defect nuclei are also eliminated or dissolved. Conceivable. Therefore, when forming defect nuclei at a high density by subsequent low-temperature annealing, an unnecessary long process is required.

The same can be said of the case where high-temperature heating is performed after low-temperature annealing to form high-density defect nuclei. In other words, when defect nuclei are formed in all regions inside the substrate, eliminating or dissolving the newly formed defect nuclei near the surface will unnecessarily prolong the time of the subsequent high-temperature treatment. There is.

The present invention efficiently performs the conventional heat treatment described above in a temperature raising process.

Further, the present invention is characterized in that the temperature raising process is repeated, that is, defect nuclei existing in a specific size distribution as described above are made to grow sequentially.

As is clear from the explanation of FIG. 2, in the present invention, the defect nuclei to grow are almost determined in the first temperature raising step. In the second and subsequent heating steps, the defect nuclei that have already grown to some extent are expanded to a size exceeding a specific critical size.

Therefore, from the viewpoint of shortening the heat treatment time, only the first temperature raising step is performed at a temperature raising rate according to the oxygen concentration of the substrate specified in the present invention, and from the second time onwards, the temperature is increased at an applicable 14°C/ It is preferable to carry out the heating at a relatively fast temperature increase rate of min. or less. However, if the rate of temperature increase from the second time onward is significantly slower than that of the previous temperature increase step, the number of new defect nuclei formed by the heat treatment increases, making it difficult to control the DZ width.

As explained with reference to FIG. 2(f), defect nuclei also grow during the temperature cooling process. The effect is smaller than that of heat treatment by raising the temperature. However, considering that the temperature raising process is usually repeated in a single furnace, it is easy to carry out the temperature raising and lowering as shown in FIG. 4, and there is no loss from the overall process.

In Figure 4, a is the first heating time, b is 1
The time for cooling down the temperature for the second time, c is the time for raising the temperature for the second time, and d is 2
The temperature decreasing time for the third time, e, indicates the temperature increasing time for the third time, and as described above, it is preferable that the setting of each heat treatment time satisfies a≧c≧e≧b, d.

Further, in the present invention, it is effective not only to repeatedly raise and lower the temperature, but also to set the maximum temperature value and the minimum temperature value for 0.5 to 10 hours.

In other words, DZ
When forming or growing high-density defect nuclei in an intensive manner, it is possible to carry out the process effectively because a temperature raising step or a temperature lowering step has been performed in advance. However, in the present invention, when the maximum temperature value is sufficiently high or the minimum temperature value is sufficiently low, it is not necessarily necessary to perform such constant temperature treatment, and in particular, only when the temperature difference between the maximum temperature and the minimum temperature is small, the constant temperature heat treatment is necessary and effective.

In addition, it has been conventionally known that the heat treatment is preferably performed in a non-oxidizing atmosphere such as N ₂ . Although it is possible to form sufficiently good defects in an oxidizing atmosphere such as O ₂ , when other conditions are the same, the growth rate and size of defects are lower in a non-oxidizing atmosphere. Excellent in terms of

By the way, when heat treating a silicon substrate,
A method is known in which a SiO ₂ film is formed as a surface protection film.

From the above two points, in the present invention, it is effective to perform the first heat treatment by raising the temperature in an atmosphere containing an oxidizing substance, and to perform the subsequent heat treatment in a non-oxidizing atmosphere.

In addition, since the SiO ₂ film used as the surface protective film can be peeled off and the surface cleaned at the same time, direct oxidation is better for CVD (Chemical
This method is more preferable than the method using Vapor Deposition method.

As described above, the IG method according to the present invention, that is, the formation of internal crystal defects and DZ near the surface, can significantly shorten the process compared to the conventional method and can reduce damage to the substrate surface.

[Brief explanation of the drawing]

Figure 1 shows the crystal defect growth process in the substrate by conventional heat treatment, Figure 2a shows the temperature changes in the temperature raising and cooling steps of the heat treatment according to the present invention, and Figures 2b to g show each of the steps in Figure 2a. Figure 3 shows the relationship between internal defect size and density corresponding to the temperature range for a substrate with a high oxygen concentration.
FIG. 4 shows the relationship between the DZ width and the temperature increase rate, and shows an example of the temperature transition in the heat treatment by temperature increase and temperature decrease according to the present invention. In FIG. 4, a to e are respective required times.

Claims (1)

[Claims] 1. In the pre-treatment process of semiconductor device manufacturing, a silicon substrate with an internal oxygen concentration higher than 1.5×10 ¹⁸ cm ^-3 is subjected to heating from a low temperature of 500°C to 900°C to 950°C.
After heat treatment is performed to raise the temperature from 5 to 14 degrees Celsius/min to a high temperature of 1300 degrees Celsius, the temperature is lowered from the higher temperature to the lower temperature, and then from the lower temperature to the higher temperature at 14 degrees C/min.
1. A method of manufacturing a semiconductor device, comprising the step of repeating heat treatment one or more times at a temperature increase rate of min or less to form crystal defects inside the substrate. 2. In the pretreatment process of semiconductor device manufacturing, silicon substrates with an internal oxygen concentration of 1.5 × 10 ¹⁸ cm ^-3 or less are heated from a low temperature of 500°C to 900°C to 950°C.
Heat treatment is performed to raise the temperature at a rate of 5°C/min or less to a high temperature of 1300°C, then lower the temperature from the high temperature to the low temperature, and then further increase the temperature from the low temperature to the high temperature at 14°C/min.
Repeat the heat treatment one or more times at the following temperature increase rate,
A method for manufacturing a semiconductor device, comprising a step of forming crystal defects inside the substrate.