JPS6217860B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor integrated circuit device, and more particularly to a method of manufacturing a bipolar semiconductor device having a buried silicon film layer.

Conventionally, in a bipolar semiconductor device having a buried silicon film layer, after a base region is formed, the junction depth of the base region becomes equal to the junction depth of other base regions in the interface region of the buried silicon film layer at the periphery of the base region. If the emitter region is formed using the self-alignment method with the buried silicon film as the termination, an electrical short between the emitter and the collector will occur in the base region where the junction depth of the buried silicon film layer is shallow. occurs earlier, and the characteristics of the transistor are limited in this region. To avoid this, it is necessary to separate the end of the buried silicon film from the emitter region, but this causes the problem of lowering the degree of integration.

The present invention eliminates the above problems and has a high degree of integration.
A method for manufacturing a semiconductor integrated circuit device is provided.

The present invention is characterized by a step of selectively forming an oxidation-resistant film on the main surface of a semiconductor substrate of the first conductivity type, and a portion of the semiconductor substrate immediately below the oxidation-resistant film and adjacent to a portion of the semiconductor substrate directly below the oxidation-resistant film. An impurity of a second conductivity type is introduced into a peripheral semiconductor substrate portion to form a first region of a second conductivity type in a semiconductor substrate portion immediately below the impurity, and a first region of a second conductivity type is introduced into a peripheral semiconductor substrate portion. forming a second region of a second conductivity type adjacent to the region and having a deeper junction than the first region; and then forming a buried silicon oxide film using the oxidation-resistant film as a mask. A method of manufacturing a semiconductor integrated circuit device including:

According to the present invention, since the junction depth of the base region is shallower than the other base regions at the interface of the buried silicon oxide film surrounding the base region according to the prior art, an emitter region is formed with the buried silicon oxide film as the termination. In this case, it is possible to prevent an electrical short circuit between the emitter and the collector from occurring quickly in this area, deteriorating the transistor characteristics and reducing the yield. Since it can be formed by a self-alignment method, it is possible to reduce the size of the emitter region and, by extension, the element size of the transistor, making it possible to create a high-density semiconductor integrated circuit device.

In order to better understand the present invention, the present invention will be explained using examples. FIG. 1 shows the prior art, and FIG. 2 shows an embodiment of the present invention. These figures are cross-sectional views of the main steps up to the formation of the base region in a bipolar transistor.

First, a conventional method will be explained using FIG. 1. As shown in figure a, a silicon dioxide film 2 with a thickness of about 500 Å is formed at 900°C on a collector region 1 formed in a silicon substrate, and a silicon nitride film 3 is selectively formed on top of it. do. Subsequently, as shown in figure b, it was oxidized at 1000℃ for 6 hours to form a 10000Å
A buried silicon oxide film 4 is formed to a thickness of . Next, as shown in figure c, ion implantation is performed using the selectively opened photoresist film 5 as a mask.
B ⁺ ions of 2×10 ¹⁴ /cm ² were implanted at 100kev,
A base region 6 is formed. FIG. d shows an enlarged view of the vicinity of the buried silicon oxide film interface region of the base region formed as described above. As is clear from this figure, the junction depth of the base region is shallower in the interface region of the buried silicon oxide film than in the other base regions. This is because the ions were implanted after forming the buried silicon oxide film.
This occurs because the silicon oxide film is thicker in the interface region of the buried silicon oxide film than in other regions.

An embodiment of the method of forming the base region according to the present invention that avoids this problem will be described with reference to FIG. Similar to FIG. 1A, FIG. 1A' shows that silicon dioxide 12 is formed on the collector region 11, and a silicon nitride film 13 is selectively formed thereon. Next, as shown in figure b', ions are implanted using the selectively opened photoresist film 14 as a mask.
This is the place where the base region 15 was formed by implanting B ⁺ of 100keV and 2×10 ¹⁴ /cm ² . Thereafter, as shown in Figure c', oxidation is performed at 1000° C. for 6 hours to form a buried silicon film 16. An enlarged view of the vicinity of the interface region of the buried silicon oxide film in the cross section of the base region formed as described above is shown in Figure d'. The base region created in this way has a higher area than other base regions in the interface region of the buried silicon oxide film.
The joining depth becomes deeper. This is because the junction of the base region in the interface region of the buried silicon oxide film is already deeper than other regions immediately after ion implantation, and while the buried silicon oxide film is being formed. This is because the B ⁺ injection layer in the interface region was gradually buried.

By implementing the present invention in this way, it is possible to obtain a transistor in which the junction depth of the base region in the interface region of the buried silicon oxide film is deeper than the junction depths of other base regions.

[Brief explanation of the drawing]

FIG. 1 and FIG. 2 are cross-sectional views showing the main manufacturing steps of the prior art and the embodiment of the present invention, respectively. In the figure, 1, 11...collector area,
2, 12... Silicon oxide film, 3, 13... Silicon nitride film, 4, 16... Buried silicon oxide film,
5, 14... Photoresist film, 6, 15... Base region.

Claims (1)

[Claims] 1. A step of selectively forming an oxidation-resistant film on the main surface of a semiconductor substrate of a first conductivity type, and a semiconductor substrate portion immediately below the oxidation-resistant film and a peripheral semiconductor substrate adjacent to the semiconductor substrate portion directly below the oxidation-resistant film. an impurity of a second conductivity type is introduced into a portion of the semiconductor substrate, thereby forming a first region of a second conductivity type in a portion of the semiconductor substrate immediately below the portion of the semiconductor substrate, and a first region of a second conductivity type is introduced into a portion of the semiconductor substrate adjacent to the semiconductor substrate portion adjacent to the first region. The method includes the steps of forming a second region of a second conductivity type having a deeper junction than the first region, and then forming a buried silicon oxide film using the oxidation-resistant film as a mask. A method for manufacturing a semiconductor integrated circuit device.