JPS6218052B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for displaying a status lamp.

One of the peripheral devices used in computer systems is a status lamp display panel. This generally consists of a number of lamps. however,
A lamp, for example, in the case of a numeric display, consists of so-called 7-segment pieces, and if you include the dots attached to each segment, it consists of a group of small lamps (light-emitting diodes) with a total of 8 segments.

Conventionally, status information stored in a status information register within a computer system is once input to an external lamp driver, which is then connected to each lamp via a two-core cable. Therefore, if there were 200 lamps, a total of 400 cables would have to be routed to the status lamp display panel. It is clear that handling such a huge number of cables is a major obstacle to miniaturizing, improving reliability, and reducing costs of devices.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to propose a method for displaying status lamps that can eliminate the above-mentioned obstacles.

In accordance with the above object, the present invention provides DMA (Direct
The present invention is characterized in that the status information is sequentially read out under Memory Access control and used as the X-side input of the status lamp matrix, and the Y-side input thereof is dynamically driven.

The present invention will be explained below with reference to the drawings.

The accompanying figure is a block diagram illustrating one example system for implementing the method of the present invention. In this figure, numeral 16 at the bottom right is a status lamp display panel.
Hundreds of lamps are arranged on this panel. So-called status lamp display information indicating which of these lamps should be turned on and which should be turned off is stored in the status information register 14 while being updated successively. Conventionally, the contents of the register 14 were directly input to an external lamp driver stage 17, from which driving power was supplied via a cable bundle 18 to each lamp to be lit. However, with this method, the cable bundle 18 became enormous and caused the problems mentioned above.

Therefore, the present invention completely eliminates the driver stage 17 and cable bundle 18, and reduces the number of signal lines to be used to about ten. For this purpose, first, a new panel control card 15 is installed. A DMA control circuit 20, which is the most characteristic circuit of the present invention, is installed in this panel control card 15. However, the DMA control circuit itself is nothing new. In this way, the status lamp display panel 16 and the status information register 14 can be connected through the existing common bus 12, so there is no need to run a large number of cables. However, for this purpose, a dynamic drive described later must be used in combination. Note that the existing central processing unit (CPU) 11, main memory (MM) 13, etc. are also connected to the common bus 12.

The dynamic drive is a method of lighting several lamps at high speed and in a cyclical manner, and this idea itself is well known. However, the present invention makes effective use of this idea in conjunction with DMA. Therefore, the status lamp display panel 16
The lamps (represented by light-emitting diodes) in the table constitute a so-called status lamp matrix, whose X side is connected to the card 15 via, for example, 16 column lines 19-X, and whose Y side is connected to the card 15 via, for example, 16 column lines 19-X.
Also card 15 via book row line 19-Y
Connect to. Therefore, the conventional several hundred signal lines
The number drastically decreases to 32 (16+16) books.

The operation is as follows. First update counter 3
1 is being driven, the counter output on the one hand increments the register address sending section 32 and sets the address RA of the registers R1, R2, . . . in the status information register 14.
1, RA2, etc. are transmitted sequentially. The sequentially output register addresses are temporarily stored in the address register (AR) 23. The contents of this address register 23 are the contents of the status information register 14.
The common bus 12 is entered in order to access the common bus 12, but since DMA control is performed here, under the normal bus control and management of the sequence control section 21 and the DMA activation and sequence control section 22, It occupies the common bus 12 and executes the access.

This is the same when fetching status information from the status information register 14.
The status information is sent to the buffer register (BFR) 2 via the common bus 12 under predetermined DMA control.
4, and further stored in random access memory (RAM) 33. The memory 33 converts the status information into lamp information. That is, by directly inputting, for example, a 16-bit output from the memory 33 to the column line 19-X via the buffer 34, a desired lamp can be lit. However, the lamp matrix 16 is also appropriately arranged in advance in accordance with this.

The lamp information thus obtained works together with the output of the lamp driver 35, which is obtained in synchronization with the counter output from the update counter 31, to light the corresponding lamps line by line. That is, the lamp driver 35 sequentially drives the row lines 19-Y one by one from the top, and does this cyclically.

Assume that the lamp driver 35 is driving, for example, the topmost row line in the figure. This driving time is
It is about 150μS. At the same time as this 150μS time,
The memory 33 stores lamp information to be supplied to the next row line in the buffer 34. If the update counter 31 gives the lamp driver 35 the timing to drive the next row line, at the same time, the lamp information of the column line related to the next row line is updated.
The buffer 34 outputs the signal. Similar operations are repeated for the next row and column lines.

Since the method of the present invention utilizes DMA control, if occupancy of the common bus 12 is not recognized, lighting of the status lamp has no meaning at all. However, such concerns are actually unnecessary. This is because, even if the common bus 12 cannot be occupied, the period of time is normally on the order of several milliseconds, and even if an erroneous lamp display is made during this period, it is hardly noticeable to the human eye.

As explained above, according to the present invention, it is possible to effectively eliminate the above-mentioned obstacles that have been a problem in the past.

[Brief explanation of the drawing]

The attached figure is a block diagram showing an example of a system to which the method of the present invention is applied. In the figure, 12 is a common bus, 14 is a status information register, 15 is a panel control card, 16 is a status lamp display panel, 19-X is a column line group, 19-Y is a row line group, 20 is a DMA control circuit, and 31 is a an update counter, 32 a register address sending unit, 33 a random access memory, 3
5 is a lamp driver.

Claims (1)

[Claims] 1. A status information register, a common bus connected to the status information register, and a status lamp display panel that houses a group of status lamps that are lit according to the status information in the status information register. In the system, the status lamp display panel is constituted by a lamp matrix consisting of a group of row lines and a group of column lines arranged orthogonally, and a group of status lamps connected to the intersections thereof, and the group of row lines is arranged at a predetermined timing. The column lines are sequentially driven one by one cyclically, while the column lines transmit lamp information regarding whether or not the status lamps of each of the row lines are lit via the common bus at the predetermined timing. (Direct
1. A status lamp display method, characterized in that the status lamps corresponding to the driven row line group and the column line group are lit by obtaining the status information from the status information register under Memory Access control.