JPS62190836A - Formation of high melting point metal silicide - Google Patents
Formation of high melting point metal silicideInfo
- Publication number
- JPS62190836A JPS62190836A JP3439686A JP3439686A JPS62190836A JP S62190836 A JPS62190836 A JP S62190836A JP 3439686 A JP3439686 A JP 3439686A JP 3439686 A JP3439686 A JP 3439686A JP S62190836 A JPS62190836 A JP S62190836A
- Authority
- JP
- Japan
- Prior art keywords
- film
- melting point
- point metal
- high melting
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002844 melting Methods 0.000 title claims abstract description 27
- 230000008018 melting Effects 0.000 title claims abstract description 26
- 239000002184 metal Substances 0.000 title claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 24
- 229910021332 silicide Inorganic materials 0.000 title claims abstract description 18
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title claims abstract description 16
- 230000015572 biosynthetic process Effects 0.000 title 1
- 238000000034 method Methods 0.000 claims abstract description 15
- 238000000137 annealing Methods 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000010894 electron beam technology Methods 0.000 claims abstract description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 5
- 238000000151 deposition Methods 0.000 claims abstract description 4
- 239000013078 crystal Substances 0.000 abstract description 5
- 239000007791 liquid phase Substances 0.000 abstract description 3
- 238000004544 sputter deposition Methods 0.000 abstract description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 abstract 1
- 229910008814 WSi2 Inorganic materials 0.000 abstract 1
- 230000001133 acceleration Effects 0.000 abstract 1
- 239000002253 acid Substances 0.000 abstract 1
- 229960002050 hydrofluoric acid Drugs 0.000 abstract 1
- 239000002245 particle Substances 0.000 abstract 1
- 238000001771 vacuum deposition Methods 0.000 abstract 1
- 238000005406 washing Methods 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- -1 5...wSi Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分計〕
本発明は半導体装置の配線や電極として用いる高融点金
属シリサイドの形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to a method for forming a high melting point metal silicide used as wiring or electrodes of a semiconductor device.
ＶＬＳ Ｉ等の半導体装置の配線や電極として用いる高
融点金員シリサイド膜を形成するには従来、高融点金属
とシリコンとを同時に蒸着した佐、高温のアニールを行
ってシリサイド形成を行う方法、又はシリコンの表面に
高融点金属を蒸着した後、アニールを行ってシリサイド
形成を行う方法（熱アニール法）等が行われている。Conventionally, to form a high melting point metal silicide film used as wiring and electrodes of semiconductor devices such as VLSI, there have been two methods: simultaneous vapor deposition of a high melting point metal and silicon, high temperature annealing to form silicide, or A method (thermal annealing method) is used in which a high melting point metal is deposited on the surface of silicon and then annealed to form a silicide.
しかしながら、上記の方法で形成した高融点金属シリサ
イド膜は電気抵抗値がバルクの値に比して高く、表面の
平滑性や膜の均一性が悪い問題点がある。However, the high melting point metal silicide film formed by the above method has a problem in that the electrical resistance value is higher than the bulk value, and the surface smoothness and film uniformity are poor.
本発明の目的は従来法で得られる高融点金属シリサイド
膜の示す高い電気抵抗値を減少せしめ、かつ表面の平滑
性や膜の均一性を改善した新規な高融点金属シリサイド
の形成方法を提供することにある。An object of the present invention is to provide a novel method for forming a high melting point metal silicide, which reduces the high electrical resistance of the high melting point metal silicide film obtained by conventional methods, and improves surface smoothness and film uniformity. There is a particular thing.
本発明は少なくとも表面にＳｉＩ＠を有する基板上に高
融点金１ｌＸｔｌ−堆槓し、さらにその高融点金属膜上
に炭素膜を形成した後、少なくとも前記Ｓｉ層を融解す
る条件の下でレーザー光線又は電子線等によって表面の
Ｓｉ及び高融点金属膜をアニールしてシリサイド化反応
を生じせしめることを特徴と丁る高融点金属シリサイド
の形成方法である。The present invention involves depositing high melting point gold 11 This method of forming high melting point metal silicide is characterized by annealing Si and a high melting point metal film on the surface using an electron beam or the like to cause a silicidation reaction.
高融点金属シリサイド膜の電気抵抗を小さくするために
は、結晶粒径を大きくし、できつれば単結晶として膜形
成することで最も電気抵抗を小さくできると考えられる
。In order to reduce the electrical resistance of a high melting point metal silicide film, it is thought that the electrical resistance can be minimized by increasing the crystal grain size and preferably forming the film as a single crystal.
一般に、結晶粒径を大きくするには固相成長より液相成
長の力が有利である。しかし、ＶＬＳＩ等の半導体装置
の製造過程では下地の基板に微細な構造を有し、長時間
高温にすると微細な構造が破壊される。Generally, liquid phase growth is more advantageous than solid phase growth in increasing crystal grain size. However, in the manufacturing process of semiconductor devices such as VLSI, the underlying substrate has a fine structure, and if the device is exposed to high temperatures for a long period of time, the fine structure will be destroyed.
本発明の方法ではレーザー光線や電子線等によって極め
て短時間の高温処理による結晶粒の液相成長を行うもの
で、下地の＠細な構造への影＃は小さく、かつ電気抵抗
値の小さな高融点金属シリサイド族が形成できる。The method of the present invention uses laser beams, electron beams, etc. to grow crystal grains in a liquid phase through extremely short-time high-temperature treatment, which has a small shadow on the fine structure of the underlying layer and has a high melting point with low electrical resistance. A group of metal silicides can be formed.
また、単に５ｉＩＩｌｉ上へ高融点金属を堆積したのみ
でレーザー光線や電子線によって８１層を融解すれば、
その表面は極めて凹凸の激しいものになってしまう。In addition, if a high melting point metal is simply deposited on 5iIIIi and the 81 layer is melted with a laser beam or an electron beam,
The surface becomes extremely uneven.
本発明では高融点金属膜上に炭素膜を形成し、Ｓｉ／ｉ
ｆ融屏時に薄い高融点金属の炭素化物膜を均一に形成す
るとともに、形成した炭素化物膜によって表面が荒れる
のを防ぐもので、平滑性の良い高融点金属シリサイド膜
が得られる。In the present invention, a carbon film is formed on a high melting point metal film, and Si/i
f A thin high melting point metal carbonide film is uniformly formed during fusing, and the formed carbonide film prevents the surface from becoming rough, resulting in a high melting point metal silicide film with good smoothness.
以下に本発明の実施例を図を用いて説明する。 Embodiments of the present invention will be described below with reference to the drawings.
図は本発明によってＰ型Ｓｉ基板１上にＷＳｉ、膜５を
作成する工程を示す、第１図（α）において、通常の酸
洗浄及び希釈弗酸処理により清浄表面としたＰ型Ｓ五基
板１上に、Ｗｔスパッタして約ｘｏｏｏＡのＷ膜２を堆
積した後、炭素膜３を真空蒸着によって１ｏｏｏ大堆積
した０次に上記Ｓｉ基板ｌをシリサイド化反応開始温度
以下の約６００℃に加熱保持した状態で、ビーム短辺０
．３ｍ＋ビーム長辺５ｍの線状電子線アニール装置を用
いて、ビーム短辺方向の走査速［８０ｃｍ／ｓ 、ビー
ム！１１１１１．８５ｍＡ 、加速電圧１５ＫＶの条件
の下でアニールし、Ｓｉ＆板ｌのＷ膜２と接している界
面から深さ１μｍの５ｉｔ−融解することにより第１図
（ｂ）のように約１００ＯＡの炭素化物膜４及び約１５
００人のＷＳｉ、膜５を形成した。The figure shows the process of creating a WSi film 5 on a P-type Si substrate 1 according to the present invention. In FIG. After depositing a W film 2 of approximately xoooA on the Si substrate 1 by Wt sputtering, a carbon film 3 of 1000% was deposited by vacuum evaporation. While holding the beam, the short side of the beam is 0.
．． Using a linear electron beam annealing device with a length of 3 m + beam long side 5 m, the scanning speed in the beam short side direction was [80 cm/s, beam! By annealing under the conditions of 11111.85 mA and an accelerating voltage of 15 KV, and melting 5 it to a depth of 1 μm from the interface of the Si & plate 1 in contact with the W film 2, a current of about 100 OA is generated as shown in Fig. 1(b). Carbonide film 4 and about 15
00 WSi, film 5 was formed.
上記処理によって形成したｗｓｔｔ膜５は極めて平滑な
表面を有し、かつ２０〜３０μΩ・αの低抵抗な膜であ
った。この電気抵抗値は従来法による場合に比して約１
７２程度である。The wstt film 5 formed by the above treatment had an extremely smooth surface and a low resistance of 20 to 30 μΩ·α. This electrical resistance value is about 1 compared to the conventional method.
It is about 72.
他の高融点金属シリサイドについても本発明の方法によ
って、従来法に比して低抵抗で平滑がり均一な高融点金
属シリサイド膜が形成できた。With respect to other high melting point metal silicides, a smooth and uniform high melting point metal silicide film with lower resistance than the conventional method could be formed using the method of the present invention.
本発明によれば、平滑で低抵抗な高融点金属シリサイド
膜を形成することができる。According to the present invention, a smooth, low-resistance, high-melting point metal silicide film can be formed.
第１図（ａ） 、 （ｂ）は本発明の方法によってＷＳ
ｉ２膜を形成する工程を工程順に示す１ｉｔ１面模式図
である。
１・・・Ｐ型シリコン基板、２・・・Ｗ膜、３・・・炭
素膜、４・・・炭化物質、５・・・ｗＳｉ、膜特許出願
人 日本電気株式会社
（（Ｌ”）
（ｂ）
第１図FIGS. 1(a) and 1(b) show WS obtained by the method of the present invention.
FIG. 1 is a 1it 1-plane schematic diagram illustrating the steps of forming an i2 film in order of process. 1...P-type silicon substrate, 2...W film, 3...carbon film, 4...carbonized substance, 5...wSi, film patent applicant NEC Corporation ((L”) b) Figure 1
Claims (1)
金属を堆積し、さらにその高融点金属膜上に炭素膜を形
成した後、少なくともＳｉ層を融解する条件の下でレー
ザー光線又は電子線等によつて表面のＳｉ及び高融点金
属膜をアニールしてシリサイド化反応を生じせしめるこ
とを特徴とする高融点金属シリサイドの形成方法。(1) After depositing a high melting point metal on a substrate having at least a Si layer on the surface and further forming a carbon film on the high melting point metal film, a laser beam or electron beam, etc., is applied under conditions that melt at least the Si layer. A method for forming a high melting point metal silicide, which comprises annealing Si and a high melting point metal film on the surface to cause a silicidation reaction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3439686A JPS62190836A (en) | 1986-02-18 | 1986-02-18 | Formation of high melting point metal silicide |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3439686A JPS62190836A (en) | 1986-02-18 | 1986-02-18 | Formation of high melting point metal silicide |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62190836A true JPS62190836A (en) | 1987-08-21 |
Family
ID=12413022
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3439686A Pending JPS62190836A (en) | 1986-02-18 | 1986-02-18 | Formation of high melting point metal silicide |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62190836A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007060837A1 (en) * | 2005-11-22 | 2007-05-31 | Success International Corporation | Method of manufacturing semiconductor device |
-
1986
- 1986-02-18 JP JP3439686A patent/JPS62190836A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007060837A1 (en) * | 2005-11-22 | 2007-05-31 | Success International Corporation | Method of manufacturing semiconductor device |
| JPWO2007060837A1 (en) * | 2005-11-22 | 2009-05-07 | サクセスインターナショナル株式会社 | Manufacturing method of semiconductor device |
| US8067296B2 (en) | 2005-11-22 | 2011-11-29 | Success International Corporation | Method of manufacturing semiconductor device |
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