JPS62200577A - Error correcting system - Google Patents

Abstract

PURPOSE:To improve the reliability of error detecting and correcting processings by using both of parity codes which enable detection and correction of errors and CRC codes for cyclic redundancy check, and checking the error correction executed at the time of data-reproduction. CONSTITUTION:Reproducing data read from a recording medium 101 by a recording and reproducing means 102 is demodulated in a modulation and remodulation part 103. And the result is stored in a memory part 104 for operation. And the error detection and correction is executed by an error correction processing part 106 added with the parity codes for error detection and correction at the time of recording. In case the detection and the correction of an error is unable to be achieved at the first step, an error processing is executed. And when the detection and the correction is completed for all strings, the cyclic redundancy check is executed by a CRC arithmetic part 107 against reproduced-data strings. When the result of the CRC is correct, the error correction is decided to be correct, and the reproduction processing is ended. But if the result is not correct, the correction processing is decided to be erroneous, and an error processing is executed.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an error detection and correction method for recorded data. This is an attempt to improve the reliability of the reproduced data by using a check code in combination to determine whether or not error correction has been performed correctly during reproduction of recorded data.

<Technical background of the invention and its problems> In a method of detecting and correcting errors in recorded data using an error detection and correction code recorded together with the data when recording the data, in the conventional method, error correction is not performed during reproduction. However, there was no means to detect this, and the reliability of reproduced data depended on the correction ability of the parity code added for error detection and correction.

For this reason, there is a drawback that erroneous corrections occur during data reproduction.

<Objective of the Invention> An object of the present invention is to provide an error correction method that uses a CRC code to prevent erroneous corrections during reproduction of recorded data and improves the reliability of reproduced data.

<Embodiment of the invention> An example of the functional block configuration for carrying out the invention is shown in the first example.
FIG. 2 shows an example of a conceptual arrangement of recorded data in the memory, and FIG. 3 shows an example of a processing procedure.

In FIG. 1, reference numeral 101 indicates a recording medium on which recording is performed, and reference numeral 102 indicates a recording/reproducing means for recording or reproducing data on the recording medium 101. 103 is a modulation/demodulation unit that modulates data reproduced from the recording medium 101 by the recording/reproducing means 102;
The data to be recorded is modulated. Reference numeral 104 denotes a part of the calculation memory, which stores reproduced data from the modulation/demodulation section 103 and also stores data to be transferred to the modulation/demodulation section 103. An error correction processing section 106 adds a parity code for error detection and correction to the data stored in the calculation memory part 104 during recording, and performs error detection and correction during reproduction.

Reference numeral 105 denotes a part of memory for an interface, which stores data to be recorded transferred from the host device 109 and playback data to be transferred to the host device 109.

A CRC calculation unit 107 performs a CRC calculation when data is transferred from the interface memory part 105 to the calculation memory part 104 during recording, and adds a generated CRC code to the end of the recording data. The CRC calculation unit 107 performs a CRC calculation when data is transferred from the calculation memory part 104 to the interface memory part 105 during playback, and calculates the CRC of the recorded data.
Perform Che'7ri. In addition, CRC (cyclic red
undancycheck) is a cyclic redundancy check, and a CRC operation is an operation according to a polynomial used to generate check information for a data block.

108 is a control unit, which includes a modulation/demodulation unit 103. Part of memory for calculation 104. Interface memory part 105, error correction processing unit 106. Controls the CRC calculation unit 107.

FIG. 2 shows a conceptual arrangement of recorded data in the calculation memory part 104. DI, D2゜---, Dm are m pieces of user data to be actually recorded, po,
PI3. -, PIx, P21. P22゜-, P2x,
-=, Pyl, Py2-Py x represents parity data for error detection and correction of user data during reproduction, and C1+C2, -, Cz represents a CRC code.

When recording data, an error detection and correction code is added by the error correction processing unit 106 to each horizontal row of this arrangement. 1st column DI, 02. −・.

The parities for error detection and correction of n data strings of Dn are plt, PL! ,−,Plx, followed by the second column D
n+1, Dn+2. The parity for error detection and correction of n data strings of .-, D2 n is P21.
P22. ---, P2 x, and the same applies to the subsequent columns. CRC code C1, C2, -1C
For z, values calculated by the CRC calculation unit 107 are added to the user data strings DH, D2, -, Dm in this order during recording.

Processing during data reproduction will be explained using the flowchart shown in FIG. The reproduced data read by the recording/reproducing means 102 is demodulated by the modulation/demodulation unit 103, and then placed in the calculation memory part 104 as shown in FIG. Error detection and correction is performed (S1, S2.S3). If error detection and correction are not possible in step SL, error processing is performed. When error detection and correction is completed for all columns, the reproduced data columns DI, D2 . -・-1Dm,C
The CRC computation for +, C2, -, and Cz is performed by the CRC computation unit 107 (S4), and if the computation result is correct, it is determined that the previously performed error correction process was performed correctly, and the reproduction process is performed. finish. If the CRC calculation result is incorrect, it is determined that an erroneous correction has been made in the error correction process, and error processing is performed (S5).
.

<Effects of the Invention> As explained above, in the present invention, a parity code that can perform error detection and correction and a CRC code that can perform error detection are used together, and error correction is performed during data reproduction. Since the CRC code is used to check whether the error has been performed correctly, the reliability of the error detection and correction processing can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a functional block configuration of an embodiment of the present invention,
FIG. 2 is a diagram conceptually showing the arrangement of data in the memory according to the embodiment of the present invention, and FIG. 3 is a flowchart showing the processing procedure of the embodiment of the present invention. 101-m-recording medium 102--recording/reproducing means 103-modulation/demodulation section 104--part of memory for calculation 105-part of memory for interface 106--error correction processing section 107--CRC calculation section 108---control section 109--- Upper device

Claims (1)

[Claims] In an error correction method that performs error detection and correction of data during reproduction using an error detection and correction code recorded with the data, a parity code and a CRC code generated by CRC calculation are added when recording the data, and when the data is reproduced, Along with the above error detection and correction, C
An error correction method characterized by performing an RC check.