JPS62207902A - Capacitance type displacement detector - Google Patents

Abstract

PURPOSE:To obtain a detector having stable measurement accuracy by evaluat ing the electrostatic capacity ratio of a variable capacitor, by electrostatic capacity of which changes with displacement and a fixed capacitor, the electro static capacity of which is constant as the ratio of time duration. CONSTITUTION:The stroke to connect the variable capacitor CX to an integrator 10 and the stroke to charge the variable capacitor CX are first repeatedly executed during the reference time TS by controlling switches SW1-SW7. The output voltage of the integrator 10 is thereby increased. The stroke to connect the fixed capacitor CR to the integrator 10 and the stroke to charge the fixed capacitor C4 are then repeatedly executed by starting counting of clock pulses from an oscillator 26 by a counter 23 of a displacement detecting circuit 16 and controlling the switches SW1-SW7. The counting with the counter 23 is stopped when a reference voltage Vref is attained on dropping of the output voltage of the integrator 10. As a result, the value of the counter 23 corresponds to the displacement of the spindle of the variable capacitor CX.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a capacitive displacement detection device, which includes a variable capacitor whose capacitance changes in accordance with displacement, a fixed capacitor whose capacitance is constant, and a fixed capacitor whose capacitance is constant. An improved displacement detection device that can digitally detect displacement by performing double integration using a common integrating capacitor and evaluating the capacitance ratio of the variable capacitor and fixed capacitor as the ratio of time length. Regarding.

[Background technology and its problems]

Displacement detection devices are widely used to automatically measure length, weight, pressure, etc. For example, displacement detection devices used to digitally display measured values, such as linear displacement length measuring devices, are based on their principles. There are various types such as photoelectric type and contact type, but the capacitive type is sometimes adopted from the viewpoint of reducing power consumption and ensuring stable operation.

As shown in FIG. 4, the conventional structure of such a capacitive displacement detection device is that element electrodes 102 are similarly arranged at a constant pitch to a fixed electrode 101 in which element electrodes 103 are arranged at a constant pitch. The movable electrodes 100 are placed relative to each other and a high frequency power source (not shown) is applied between the two, and as shown in FIG.
By relatively moving in two directions, a cyclic signal as shown in FIG. 4(B) is generated and the displacement is detected by evaluating this.

However, the conventional displacement detection device described above has the following drawbacks.

■Since multiple element electrodes must be arranged at a constant pitch, there will be irregularities in the electrical characteristics of each element electrode, arrangement pitch, clearance with the opposing electrode, etc., and these will directly affect accuracy, so high There was a problem in that it was difficult to detect changes.

■When miniaturizing, the element electrodes must be processed extremely finely, and since the change in capacitance is small, it is necessary to use high frequency, and this high frequency power supply has a large economic burden, and at the same time It has drawbacks such as being easily affected by fluctuations in power supply voltage and ambient temperature.

(2) Furthermore, since the detected signal is an analog signal, there is a problem in that a special A/D converter must be used if a digital signal is required for later use for display or control.

As described above, although the general principle of the capacitance type, which has a simple structure and relatively high sensitivity, has been known in the past, the major problems described above have prevented its practical application.

[Purpose of the invention]

The present invention has been made to solve the above-mentioned conventional problems, and has a capacitance that can stably maintain measurement accuracy, is compact, and can directly detect the amount of displacement as a digital signal. The purpose of the present invention is to provide a displacement detection device using the following formula.

Means and Effects for Solving Problem C] (Means) The present invention provides a variable capacitor whose capacitance changes with displacement and a fixed capacitor whose capacitance is constant. is a displacement detection device that uses the power supply voltage and the integral capacitor of the integrator in common, performs so-called double integration, evaluates the capacitance ratio between the variable capacitor and the fixed capacitor as a ratio of time length, and can detect displacement digitally. It is composed of

Specifically, a variable capacitor formed to change capacitance in accordance with displacement, a fixed capacitor with a constant capacitance, and an integrator in which the variable capacitor and fixed capacitor are switched and connected. , a sequence circuit for selectively switching the variable capacitor to the integrator before the elapse of a predetermined reference time and the fixed capacitor to the integrator after the elapse of the reference time, and performing a double integration operation in a predetermined procedure; a comparison circuit for comparing the output voltage of the device with a reference voltage to find a cross point where both voltages are equal; and a cross point signal of the comparison circuit for an effective measurement time from the end of the reference time to the time the cross point is reached. and a displacement detection circuit connected to the effective measurement time detection circuit to detect the amount of displacement corresponding to the capacitance of the variable capacitor based on the ratio of the effective measurement time to the reference time. A circuit and a circuit are designed to achieve the above object.

(Function) First, a variable capacitor whose capacitance changes in accordance with displacement is connected to an integrator, and a positive integration operation is performed for a reference time. This increases the charge on the integrating capacitor and gradually increases the output voltage of the integrator.

Next, after a reference time has elapsed, a fixed capacitor is connected to the integrator instead of the variable capacitor, and a negative integration operation is performed. The integrator output voltage gradually drops. As a result, the output voltage and the reference voltage are compared, and a cross point where both voltages become equal is detected in the comparator circuit. Using the detection signal at this crosspoint, that is, the crosspoint signal, the effective measurement time from the end of the reference time to the time when the crosspoint signal is generated (when the crosspoint is reached) is determined. Here, if the variable capacitor is CX, the fixed capacitor is C*, the reference time is T, and the effective measurement time is TX, the formula Tw-CX/ClxTs is established. That is, since the power supply voltage and the integrating capacitor for the variable capacitor and the fixed capacitor are common, the reference time T and the effective measurement time Tll are the ratio of the variable capacitor CX and the fixed capacitor C6. Therefore, by finding the effective measurement time T8 with respect to the preset reference time T, the capacitance of the variable capacitor relative to the fixed capacitance constant capacitance can be found. By the way, since the capacitance of the variable capacitor is proportional to the displacement, the effective measurement time corresponds to the displacement.

Therefore, the amount of displacement can be detected by evaluating this effective measurement time TX. For this evaluation, the amount of displacement can be directly detected as a digital signal by, for example, time-sharing using a displacement detection circuit.

【Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

An embodiment of the present invention is shown in FIGS. 1 and 3, and the variable capacitor CX and fixed capacitor C3 are constructed as shown in FIG. That is, the outer cylinder 4 having the variable other electrode 1 and the fixed other electrode 2, the spindle 6 having the cylindrical part 5 that is displaced in the axial direction with displacement, and the common electrode 3 are arranged concentrically in this order. . and variable capacitor C
× is formed by the space between the variable other electrode 1 of the outer cylinder 4 and the common electrode 3, while the fixed capacitor C11 is similarly formed by the common electrode 3 and the fixed other electrode 2 of the outer cylinder 4. Therefore, if the spindle is moved in the X1 direction in the figure along with the displacement, the common electrode 3 will be transferred to the cylindrical portion 5 of the spindle
As a result, the capacitance of the variable capacitor C8 is configured to change in proportion to the amount of movement of the spindle, that is, the displacement.

Next, the entire capacitive displacement detection device including the variable capacitor CI+ and the fixed capacitor C8 will be explained with reference to FIG.

First, an integrator 10 is formed by an operational amplifier 18 and an integrating capacitor 19. Reference numeral 11 denotes a comparison circuit for determining the cross point signal Ec by comparing the output voltage E of the integrator with a reference voltage V*-t (ground potential, ie, zero in this embodiment). Reference numeral 15 denotes an effective measurement time detection circuit, and the output voltage E of the comparator circuit 11 is connected to the CK terminal of the flip-flop circuit 20 formed from a D-flip-flop 20 and an AND circuit 21.

is connected, and the reference time setting signal φB is connected to the R terminal. Further, a power supply voltage VDD is connected to the D terminal. The terminal Q is at the H level during the integration operation, and is inverted from the H level to the L level when the cross point signal E is input to the C1 terminal with the negative integration time operation. The output of the terminal of the D-flip-flop circuit 20 and the active area time setting signal φG are input to the AND circuit 21. When both of these are at H level, the output voltage becomes H level, which is the effective measurement time TX. The displacement detection circuit 16 is formed of a gate 22, a counter 23, an AND circuit 24, and an oscillator 26, and a measurement time setting signal φA and a high frequency pulse signal from the oscillator 26 are input to the gate 24 via an inverter 25. Here, pulse No. 18 is input to the counter at the gate 22 only during the effective measurement time TX, and the count value counted by the counter 23 is the displacement amount obtained by time-division of the effective measurement time TX.

Therefore, in this capacitive displacement detection device, the resolution can be determined by the effective measurement time T and the pulse frequency from the oscillator 26. The digital display 17 is a means for digitally displaying the amount of displacement counted by the counter 23. Switches SWI to SW6 switch between the variable capacitor CM and the fixed capacitor C to connect the integrator 10.
It is connected to. The switch SW7 discharges the integrating capacitor 19 of the integrator.

Here, switches SW1 to SW4 are positive integration switches and are used to connect the variable capacitor CX to the integrator 10. In addition, switches SWI, SW
2 and switch SW5.3E6 are negative integration switches.

By the way, in this displacement detection device, in order to achieve high resolution and miniaturization, a charging process is performed in which a positive integral operation is performed using the power supply voltage VDD of the variable capacitor C11, and the electric charge of the variable capacitor charged by this charging process is integrated. The transfer step of transferring the charge to the integrating capacitor 19 of the battery IO is sequentially repeated, and the switch SW1 and the switch SW3 are closed during this charging step, and the switch SW2 and the switch SW4 are closed during the transfer step. ing. Similarly, in negative integral operation, the power supply voltage VDD
a discharging step in which the charge of the integral capacitor 19 charged by the positive integral operation is reduced by the charge of the opposite polarity charged to the fixed capacitor CR, and the fixed capacitor C1
In order to perform the grounding step in which the power source 1 is grounded in sequence, the switches SWI and SW6 are closed during the discharging step, and the switches SW2 and SW5 are closed during the grounding step. There is. Note that during the positive integration operation, the switch SW6 is opened to prevent the fixed capacitor C11 from being connected to the integrator IO. Similarly, in negative integral operation, switch S
W4 is opened so that variable capacitor CX is not connected to integrator 10.

Reference numeral 12 denotes a sequence circuit which controls switches SW1 to SW7 to be switched in a predetermined sequence to execute positive integration and negative integration.

Further, it is formed to output a setting signal φA for the measurement time T, a setting signal φC for the effective area time TA, and a setting signal φB for the reference time T at appropriate times. A clock pulse generator 13 supplies the sequence circuit 12 with reference clock pulses for generating signals φ1 to φ6 for controlling switches SW1 to SW6, which are analog switches. Reference numeral 14 is a reference time setter, which is connected to a variable capacitor C8, a fixed capacitor CR1, and a spindle 6 of the displacement detecting device in order to secure the effective measurement time Tx necessary to obtain a predetermined resolution.
This is arbitrarily determined based on the moving speed, etc. Note that the digital display 17 is a counter 23 based on the displacement detection circuit 16.
This is to display the output on a digital display to ensure readability.

Next, the operation of this embodiment will be explained mainly with reference to FIG.

It is now assumed that the spindle 6, which moves in the X1 direction in FIG. 3 based on the displacement, is in a stopped state, and a reference time T is set by the reference time setting device 14. In this embodiment, the sequence circuit 12 automatically determines the measurement time TM, the reset time of the integrator 10, and the effective area time TA by setting the reference time T3. Here, when the measurement time setting signal φA is at L level, the measurement time T, 1
is determined, and the integrator 10 is reset when it is at H level. Further, when the reference time setting signal φB is at the H level, the reference time T is defined, and when the valid area time setting signal φC is also at the H level, the valid area time TA is specified. Closing command signal φ1 (hereinafter simply referred to as signal φl) for closing switch SWI, which is an analog switch.

The same applies to other closing I command signals. ) and the signal φ2 delayed by half a cycle are always generated at a constant cycle while the main power source of this displacement detection device is turned on. Also, within the reference time T, the signal φ
3 is generated in synchronization with signal φ1, and signal φ4 is generated in synchronization with signal φ2. Note that in the initial state, that is, the integrator 10
Even if the variable capacitor CI is in the recent state, the signals φ1 and φ3 may become H level at the same time.
is assumed to be charged by the power supply voltage VDD, and the output voltage of the Q terminal of the flip-flop 20 is set to L level. The positive integration process will be explained under such conditions. The measurement time setting signal φA becomes L level and the reference time setting signal φB becomes 1 level. When signals φ2 and φ4 are generated, switch SW2 and switch SW
4, the variable capacitor Cx is connected to the integrator 10.

Therefore, a negative current flows into the integrator 10 from the variable capacitor CX side based on the charge stored in the variable capacitor C. On the other hand, a positive current flows into the input side of the operational amplifier 18 from the integrating capacitor 19 side. Therefore, the output voltage E0 of the operational amplifier 18 increases. That is, the electric charge charged in the variable capacitor Cx is transferred to the integrating capacitor 19.
It has been transferred to . Next, sequence circuit 1
The switch SW2 and the switch SW4 are opened in accordance with the command from the signal φ2 and the signal φ4.

Thereafter, when switch SW1 and switch SW3 are closed, power supply voltage VDD is applied to variable capacitor CX, and variable capacitor Cx is charged.

After charging of the variable capacitor CX is completed, the switches swt and sw3 are opened again with a half-cycle delay, and when the switches SW2 and SW4 are closed, the charge of the variable capacitor Cx is transferred to the integrating capacitor 19 in the same way as above. Furthermore, the output voltage -Eo of the integrator 10 increases. In this way, the charging process by switches SWI and SW3 and the switch SW2
．． The transfer process by SW4 is repeated until the reference time T,
During this period, the output voltage E0 of the integrator 10 increases as shown by the solid line in the figure. Note that during this reference time T, the fixed capacitor CM is not connected to the operational amplifier of the integrator 10, so the signal φ6 is not output and the switch SW6 is not closed.

Considering the capacitance of the variable capacitor CX, the power supply voltage, etc., which are limited in order to miniaturize the displacement detection device, the integrator 10 is actually arranged in a stepped manner as shown by the two-dot chain line in FIG. The output voltage E, increases at a slope.

Next, the negative integration process will be explained.

When the reference time T ends, the reference time setting signal φB goes to the L level, and the effective area time setting signal φC goes to the (■) level. Therefore, when the reference time setting signal φB goes to the L level, the Q of the flip-flop 20 The terminal voltage is set to H level, and the effective measurement time T, l starts to advance on the condition that the effective area time setting signal φC becomes H level.In other words, the AND circuit 21 of the effective measurement time detection circuit 15 outputs I( Level signals E and t are output.

Now, within the dynamic region time T^, the signal φ4 goes to L level, and the variable capacitor CX is no longer connected to the operational amplifier 18 of the integrator 10 because the switch SW4 is opened. On the other hand, switches SW2. SW5
Since the fixed capacitor C3 was grounded through the circuit 12, the fixed capacitor C11 is connected to the operational amplifier 18 of the integrator 10 through the switches SW1 and SW6, which are closed based on the signals φ1 and φ6 from the sequence circuit 12.

In this case, since the fixed capacitor C1 is connected to the power supply voltage VDD, a positive current flows into the operational amplifier 18 from the power supply voltage VDD. On the other hand, the integrating capacitor 19 side,
That is, a negative current flows from the output side of the operational amplifier 1B into the input side of the operational amplifier 18, thereby acting to cancel the negative current.

Therefore, the electric charge of the integration capacitor 19 charged in the positive integration process gradually decreases, and the output voltage E0 of the integrator 10 drops. Thereafter, the switches SW2 and SW5 and the switches SWI and SW6 are alternately opened and closed with a half-cycle delay, so that the integrator 10 is turned on in a stepwise manner as shown by the two-dot chain line within the effective area time in FIG. The output voltage E0 decreases, and as a result, the output voltage E0 decreases with a constant slope as shown by the solid line.
is considered to be decreasing. In this way, in the negative integration process, the output voltage E of the integrator IO becomes the reference voltage V,
f and is compared in the comparator circuit 11, and when the two are equal, the comparator circuit 11 outputs a cross point signal E. That is, since the reference voltage VR*f is set to a zero value, when the output voltage E0 of the integrator IO becomes a zero value, the cross point signal EC becomes H level and is output. Then, since the CK line terminal cross point signal Ec of the flip-flop 20 of the effective measurement time detection circuit 15 is input, Q
The output voltage of the terminal becomes L level, and as a result, the end points of the effective measurement times T and l are regulated.

By the way, in the displacement detection circuit 16, the effective area time setting signal φC is input from the AND circuit 21 of the effective measurement time detection circuit I5 to one terminal of the gate 22 on the condition that the H level and the effective measurement time T8 are output. Since the clock pulse from the oscillator 26 and the gate circuit 24 through the inverter 14 are input to the other terminal within the measurement time T4, that is, the condition when the integrator IO is not in the reset state, the effective measurement time TxO is input. A clock pulse from the oscillator 26 is input to the counter 23 via the gate 22, and the counter 23 counts this as a displacement amount.

In this way, the integrator IO is used in common and controlled by a signal based on a predetermined procedure based on the sequence circuit 12, and the positive integration process is performed by connecting the variable capacitor Cx, and the negative integration process is performed by connecting the fixed capacitor CR. Since the output voltage E0 of the integrator 10 starts from zero value and is completed at zero value, the ratio of the reference time T for the positive integration step and the effective/ltq constant time TX is determined by the variable capacitor CX and the fixed capacitor C3. is equal to the ratio of

Here, since the capacitance of the variable capacitor CX is controlled by the cylindrical part 5 provided at one end of the spindle 6 and is proportional to the displacement involved via the probe 7, the clock of the oscillator 26 counted by the counter 23 eventually The number of pulses is the amount of displacement.

Therefore, for example, variable capacitor Cx and fixed capacitor C
If I+ are equal, the reference time T and the effective measurement time T1
Since these are equal, if this is designated as the reference state, the increase or decrease in the count value on the counter 23 around this can be determined as the amount of displacement of the spindle 6 with respect to the reference position.

A digital display 17 is connected to the counter 23, and the amount of displacement can be read as a digital amount on the digital display 17.

According to this embodiment, it is possible to form an extremely compact device without the conventional processing problem of arranging a plurality of small element electrodes at a constant pitch. Further, since the amount of displacement can be evaluated as a length of time, a desired resolution can be easily obtained using the frequency of the clock pulse in order to time-divide the amount. In addition, since the amount of displacement can be determined as the ratio of the variable capacitor CX to the fixed capacitor CI, that is, the ratio of the effective measurement time to the reference time, rapid measurement is possible by increasing the frequency of the time-sharing clock pulse. . This also allows the output voltage of the integrator to be suppressed to a low level, so power consumption is reduced and, as a result, the battery capacity can be reduced.

The benefit is that small measuring instruments with built-in power supplies that can be operated with one hand can be operated for long periods of time without changing batteries.

In the above embodiment, the positive integral process and the negative integral process were repeated step by step, but if the measured displacement amount is a small stroke, these steps are not repeated and the same steps are performed as one positive integral process. It is possible to achieve the same objective with a single negative integral operation. Further, although the variable capacitor and the fixed capacitor are configured with electrodes arranged on a reciprocal circle, the present invention is not limited thereto, and can be configured with planar electrodes. Furthermore, the oscillator connected to the counter of the displacement detection circuit can also be configured to automatically adjust the clock pulse frequency to an appropriate frequency in order to obtain the displacement amount with a predetermined resolution based on the reference time or effective area time. It is possible.

Furthermore, although the displacement is assumed to be involved in a straight line via the spindle, it is also applicable to cases where the displacement is involved as a rotation angle, and the measurement object is limited to length, thickness, etc., and pressure weight, etc.

[Brief explanation of drawings]

FIG. 1 is an overall explanatory diagram showing one embodiment of a capacitive displacement detection device according to the present invention, FIG. 2 is an operational explanatory diagram, and FIG.
The figure shows a cross-sectional view for configuring a variable capacitor and a fixed capacitor, FIG. 4 shows a conventional capacitive displacement detection device, FIG. FIG. 4(B) is a diagram showing the output waveform. CX...variable capacitor, CI...fixed capacitor, 10...integrator, 11...comparison circuit, 12...
Sequence circuit, 14...Reference time setting device, 15...
・Effective measurement time detection circuit, 16... Displacement detection circuit, 1
7... Digital display, 18... Operational amplifier, 19
... Integrating capacitor, 23... Counter, 26...
・Oscillator.

Claims (4)

[Claims] (1) A variable capacitor whose capacitance changes in accordance with displacement, a fixed capacitor whose capacitance is constant, an integrator to which the variable capacitor and the fixed capacitor are switchably connected, and a predetermined a sequence circuit for selectively connecting the variable capacitor to the integrator before the reference time elapses and the fixed capacitor to the integrator after the reference time elapses, and performing a double integration operation in a predetermined procedure;
a comparison circuit for comparing the output voltage of the integrator and a reference voltage to find a cross point where both voltages become equal;
an effective measurement time detection circuit that calculates an effective measurement time from the end of the reference time to the arrival of the crosspoint using the crosspoint signal of the comparison circuit; and an effective measurement time detection circuit connected to the effective measurement time detection circuit for effective measurement with respect to the reference time. A capacitive displacement detecting device comprising: a displacement detecting circuit for detecting a displacement corresponding to the capacitance of the variable capacitor based on a time ratio. (2) In claim 1, the sequence circuit includes a positive integration operation performed by connecting the variable capacitor to the integrator, and a charging process in which the variable capacitor is supplied with a power supply voltage. A transfer step of transferring the charge of the variable capacitor charged by the above to the integrating capacitor of the integrator is sequentially repeated, and after the reference time has elapsed, a negative integration operation is performed by connecting the fixed capacitor to the integrator. , a discharging step of reducing the charge of the integral capacitor charged by the positive integral operation by a charge of opposite polarity charged in the fixed capacitor with a power supply voltage, and a grounding step of grounding the fixed capacitor are sequentially repeated. A capacitive displacement detection device characterized by the following configuration. (3) In claim 1, the comparison circuit is formed to generate a clock point signal when the reference voltage becomes zero voltage and the output voltage of the integrator becomes zero value. Capacitive displacement detection device. (4) In claim 1, the variable capacitor and the fixed capacitor both have a common electrode provided on the outer peripheral surface of a round shaft-shaped member as one electrode, and each other electrode is the same as the common electrode. A capacitive displacement detection device characterized by being centrally arranged and formed.