JPS62291981A - Compound semiconductor element and manufacture thereof - Google Patents

Abstract

PURPOSE:To improve the breakdown strength, by forming an InGaAsP layer and an InGaAs layer both of a first conductivity type in a recess formed in an InP substrate of the first conductivity type, forming InP of the first conductivity type on the surface and on the periphery thereof and forming a diffusion layer of a second conductivity type on the surface of the InP. CONSTITUTION:An n<->type InP layer 2 is formed on an n<+>type InP substrate 1. A trapezoidal portion of the layer 2 is etched away so that a recess is formed in the layer 2. An n<->type InGaAsP layer 3 and an n<->type InGaAs layer 4 are formed on the surface of the recess. Using resist formed on the recess as a mask, the structure is etched to be flattened. A P-type impurity is diffused in the surfaces of the layers 4 and 3 to form a p<+>type InGaAs layer 5 and a p<+>type InGaAsP layer 6. A P-type impurity is diffused through the layer 3 into the layer 2 with an insulation film used as a mask, so that a P-type InP layer 7 is formed. Then a Ti-Pt-Au film 8 is vapor deposited and a protection film 10 is formed over the whole surface.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention Field of Industrial Application The present invention relates to a compound semiconductor device such as a PIN photodiode having a semiconductor heterojunction, and a method for manufacturing the same.

Conventional techniques 1.0 to 1.7. For optical fiber communication in the lIm band (long wavelength band), high-purity optical fiber has low dispersion in this wavelength band.

It is attracting attention because it exhibits low loss characteristics. Currently, Ge is used as a light receiving element in this long wavelength band.

PI using materials such as InGaAs and InGaAsP
N photodiodes and avalanche photodiodes are used. Compared to Ge PIN photodiodes and avalanche photodiodes, InGaAg and InGaAsP PIN photodiodes and avalanche photodiodes have a smaller dark current and better temperature characteristics. 2 shows a cross-sectional structure of a /InPi scattered-type Tivard mesa PIN photodiode.

In Fig. 3, 21 is a ♂ type InP substrate, 22 is an n-type I
Carrier density and film thickness are 6× in nP epitaxial layer.
10150-3 and 2) tm. 23 is n-type I
n Ga'Aar - 0.5 in the pitaxial layer
3 0.47 As shown in Figure 3, it is formed into a trapezoidal shape, and the carrier density and film thickness are 5 x 10"'cm-' and 2μ
It is m. 24 is a trapezoidal n″′ type I nGaAs layer 2
Z so as to cover the entire surface including the trapezoidal slope of 3.
A p+ type InGaAs layer diffused with n, the surface concentration and diffusion depth are I x 1018 cm-' and 17 m. 25 is n of the peripheral part of the n-type InGaAs layer 23.
- P+ type InP with Zn diffused on the surface of the 1nP layer 22
layer, surface concentration and diffusion depth I x 10”cm
' and 1.6 mem. 26 and 27 are metals for making ohmic contact with the P+ type InGaAs layer and the n+ type InP substrate 1, respectively;
This is a vapor deposited film of u. Reference numeral 28 is a non-reflection coating film in the light-receiving part B, which includes an n-type InP layer 22 and a p+-type InP layer 25.
The bonding surface with the substrate is a Si3N4 film that serves as a surface protection film.

Problems to be Solved by the Invention In this structure, the surface of the n-type and P+ type junction is In
It is located in the P layer and has the feature that the leakage current at the interface with the Si3H4 film 27 is suppressed lower than that of the InGaAs/InP diffused type brainer PIN photodiode.
Diameter 80. In the case of tImφ, the dark current shows a low value of 100 pA or less at a bias of 10 V. However, this element is n
Since the -type 1nGaAs layer 23 has a surface step, it was necessary to take steps such as making the photoresist thicker.

Means for Solving the Problems The present invention was made in order to solve the problems in the conventional InGaAg/InP photodiodes. An InGaAsP layer and a first conductivity type InGaAs layer are sequentially stacked, and a first conductivity type InP layer is formed on the surfaces of the first conductivity type InGaAsP layer and the first conductivity type InGaAs layer, and on the surface of the first conductivity type InP layer around the first conductivity type InGaAsP layer and the first conductivity type InGaAs layer. InGaAg/InGaAsP/InP-PIN 7. has a planar structure in which a two-conductivity type diffusion layer is formed, and has a low current and high breakdown voltage. t
diodes.

Function The above structure, that is, InGaAs layer or InGaA
A structure in which there is no p-n junction on the surface of the sP layer reduces leakage current at the surface, and the surface of the InP layer of the first conductivity type surrounding the buried layer has a structure in which the impurity is shallowly diffused and has a low concentration. It has a planar structure with two conductivity types, which dramatically increases the withstand voltage.

Embodiment The embodiment of the present invention shown in FIG. 1 is characterized by:
It is as shown below.

(1) Since the surface is flat, the manufacturing process of the device is easy.

(2) Since the impurity concentration of the p+ type InP layer 7, which was the part where the electric field strength is highest in the conventional configuration, is low and the junction between the p type InP layer 7 and the n− type InP layer 2 is shallow, when reverse biasing The button has a structure that makes it difficult to cause avalanche breakdown. As a result of prototyping an element with a diameter of 80 μmφ with the structure of the above example, the withstand voltage was 30V, which was 6.5 V compared to the conventional element.
A high value of v was obtained.

A method for manufacturing a PIN photodiode according to an embodiment of the present invention will be described. The outline of the process is shown in Figure 2 (-) to (d).
Shown below.

(a) 1-type InP layer 2 on the surface of +-type InP substrate 1
(For example, carrier density 5×1o15crn, thickness 2
．． um) is formed by, for example, a liquid phase epitaxial growth method (FIG. 2(a)). This epitaxial growth can be performed using other growth methods such as vapor phase epitaxy (VPE) or MOCVD.
(Metal-Organic Chemical V
aperDepogition) method, MBE (
A method such as Molecular Beam Epitaxy) may also be used.

(b) Next, the n-type InP layer 2 is etched into a trapezoidal shape. For example, resist, S i O2 * S
4 (J and H3PO
Etching is performed with a mixed solution of 1=4 (Fig. 2 (b)
)).

(C) Next, the surface of the n-type InP layer 2 is covered with n-type InG.
An aAsP layer 3 (eg, carrier density 5×10 3 , thickness O,s 2 )tm) is formed by, eg, MOCVD (FIG. 2(C)). This epitaxial growth is MB
The E method may be used.

(d) Next, on the surface of the n″′ type InGaAsP layer 30,
"" type InGaAs layer 4 (for example, carrier density 5
1015cm-thickness 1. s7m) is grown on the top surface of the n'''' type InP layer 2 by MOCVD.

Thereafter, for example, H
A 1:1:6 mixture of 2SO4, H2O2 and H2O,
Differences in etching speed (for example, InGaAs2000
0 person/min, -I nGaAs P 1
500 A/min) to selectively perform planarization etching (Fig. 2 (→)).

(e) Next, the n″″ type InGaAs layer 4 and the n″″
By diffusing p-type impurities into the surface of the InGaAsP layer 30,
A + type InGaAs layer 6 and a p + type InGaAs+P layer 6 are formed. At the same time, for example SiO2 or S
Using the insulating film 12 such as i3 N4 as a mask, p-type impurities are diffused through the n-type InP layer 2 and the n-type InGaAsP layer 3 to form the p-type InP layer T (FIG. 2(e)).
For example, under the epitaxial conditions and 500C 20 minute diffusion conditions described in sections (a) and (C), n''
1.74m% n-type InP in `` type InGaA+s layer 4
Diffusion into the layer to a diffusion depth of 0.4/1 m. This selective diffusion of the p-type impurity may be performed by other methods such as diffusion of Cd using a sealed tube method or ion implantation of Zn, Cd, Mg, Be, or the like.

(f) Next, a metal, for example, Ti-Pt-Au vapor deposited film 8.9 is formed for making ohmic contact.

The Tt-Pt-Au vapor deposited film 8.9 is made of other metals such as A
Any material that can provide ohmic contact may be used, such as u, Ni, Cr, Al, Go (Fig. 2(f)).

When the surface protective film 1o is finally formed, the result is as shown in FIG. 10 is also a non-reflective coating film, for example, 5
Materials such as 13N4 and 5lo2 may be used.

In the description of the manufacturing method of the embodiment of the present invention, n+
Although the ohmic contact metal 9 for the InP type substrate 1 is attached to the back surface, it is of course possible to take it out from the front surface.

DETAILED DESCRIPTION OF THE INVENTION As described above, the present invention has an InGaAs layer or an InGaAs layer or an InGaAs layer.
There is no p-n junction on the surface of the GaAsP layer, and the InGa
The planar structure has a shallowly diffused and low-concentration impurity diffusion layer on the surface of the InP layer surrounding the AsP layer, which not only facilitates device fabrication, but also provides low dark current and high performance as a long-wavelength photodetector. It has high voltage resistance characteristics and will greatly contribute to the development of long wavelength band optical fiber communications.

[Brief explanation of drawings]

FIG. 1 shows a planar type InGaA which is an embodiment of the present invention.
s/InGaAsP/I nP-PIN7 cross-sectional view of the Otodiode, Figure 2 (-) to (f') are planar type InGaAs/InGaAaP/InP-PIN of this example.
7 Process cross-sectional diagram showing the manufacturing method of odd diode, 3rd
The figure shows the conventional (Df-Bird Mesa type I n (!aAs+ /
0 2... n-type InP layer, 3... n'''' which is a cross-sectional view of an InP-P IN photodiode.
type InGaAsP layer, 4...n-type InGaA
s layer, 6...p+ type InGaAs layer, 6.
-・-p+ type InGaAsP layer, 7...p type I
nP layer, 1o...Surface protective film. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 2 Figure 3

Claims (2)

[Claims] (1) Having a concave portion on the first conductivity type InP base, and having a concave portion on the first conductivity type In_xGa_1_-_xAs_1_-_y
It has a P_y layer and further has a first conductivity type InGa layer thereon.
As layer, on the surface of the first conductivity type In_xGa_1_-_xAs_1_-_yP_y layer embedded in the recess and the first conductivity type InGaAs layer and the surface of the first conductivity type InP layer around it. A compound semiconductor device in which a second conductivity type diffusion layer is formed. (2) A first conductivity type InGaAsP epitaxial layer and a first conductivity type InP layer on the first conductivity type InP layer having a recessed portion.
a step of growing a GaAs epitaxial layer, a step of etching the first conductivity type InGaAs layer around the recess to partially expose the InGdAsP layer, the first conductivity type InGaAsP layer and the first conductivity type InGaA
While diffusing impurities into the surface of the s-layer, the first conductivity type In
a step of diffusing impurities into the surface of the first conductivity type InP layer through the GaAsP layer;
The nGaAsP layer is etched to form the first conductivity type InP.
A method for manufacturing a compound semiconductor device, including a step of exposing a pn junction on the surface of a layer.