JPS6229901B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an inspection apparatus for inspecting semiconductor elements formed on a semiconductor wafer, semiconductor products after an assembly process, and the like.

Semiconductor integrated circuits are subjected to a wafer probing test after the diffusion process during the manufacturing process, and a product test after the assembly process to inspect the electrical characteristics. Alternatively, a handling device such as a handler for handling the product is used. However, in recent years, integrated circuits have made remarkable progress, and as a result, test equipment has become more sophisticated and functional, and handling equipment has become increasingly automated and sophisticated, and both have become extremely expensive.
Therefore, it is desirable to utilize the device effectively, and the present invention aims at making effective use of such an inspection device.

According to the present invention, there is provided a test means for sequentially testing the electrical characteristics of a plurality of semiconductor devices to be tested, a timer for measuring the processing time required for the test means to test a predetermined number of semiconductor devices to be tested; It has a calculation means for calculating a scheduled test end time at which testing of a preset number of semiconductor devices to be inspected will end based on the processing time, and a display means for displaying the scheduled test end time calculated by the calculation means. A semiconductor device testing device is obtained. When multiple semiconductor devices are formed on a semiconductor wafer,
Each time the test of the semiconductor devices to be inspected in one semiconductor wafer is completed, the processing time is measured, and the scheduled test end time when the test of one lot of semiconductor wafers is completed is displayed. In addition, the semiconductor device to be tested is
If it is in a semiconductor product that has completed the assembly process,
Each time the test of one semiconductor product is completed, the processing time is measured, and the scheduled test end time at which all tests of the semiconductor product to be inspected are completed is displayed.

The case of the wafer probing test will be explained below.

Several hundred integrated circuit chips are normally formed on a semiconductor wafer, but the number of integrated circuit chips naturally varies depending on the product type, and the measurement time for one chip also naturally varies depending on the product type. It is shorter than that of , and the yield also varies depending on the variety. Therefore, the testing time per wafer naturally varies depending on the product, and some are longer while others are shorter. The test time here does not mean pure measurement time but the time required for the test including index time and the like. Generally, two or three handling devices, or wafer brovers, are connected to one test device, and tests are performed by time-sharing operation, but in that case, the types handled by each wafer brober are not necessarily the same. Because tests are often conducted on combinations of different varieties, 1
Test time per wafer varies depending on the variety being tested in other wafer probers. Therefore, the testing time for one lot of several dozen wafers is:
It is difficult to determine the end time of the exam, as it varies from case to case. Conventionally,
The completion of testing for one lot was confirmed by the operator performing the testing work. Therefore, if the operator notices the problem too late, the expensive inspection equipment will be out of service for the delayed time, making it impossible to operate the inspection equipment efficiently. The present invention solves these drawbacks and provides an inspection system that efficiently operates inspection equipment.

The present invention will be explained below. FIG. 1 shows an embodiment of the present invention, in which 1 is a testing device, 2,
2' is a wafer prober, 3 is a processing device composed of a microcomputer, etc., 4 is a time counting device, that is, a clock, 5 is a console, and 6 is a display device. The operation is explained as follows.
The wafer probers 2, 2' test each chip on the wafer using the testing device 1, and when all the chips have been tested, send a test completion signal for one wafer to the processing device 3. The processing device 3 reads the time when the test end signal is received from the clock 4, and determines the difference between the time and the previous test end signal, that is, the test time for one wafer. By determining this for a predetermined number of wafers, the average test time for one wafer is determined.
At the start of testing work for one lot, the number of wafers for one lot, etc. are input from the console 5, so the processing device 3 calculates the scheduled end time of the test for that lot from the obtained average test time and displays it on the display device 6. do. In addition, when a predetermined time that is arbitrarily set before the scheduled end time of the test, the display unit 6 indicates that the test for that lot will end after that predetermined time.
to be displayed. By adding such a simple device, it becomes possible to give advance notice of the end time. In the present invention, the time is announced by successively determining the actual test time, so it does not matter how the test product changes or the test product in the other wafer prober changes.
In this embodiment, the processing device 3 for giving advance notice of time is treated separately from the test device 1 and the wafer probers 2, 2', but in general, the test device and handling devices such as wafer probers are implemented as microcomputers or minicomputers. It is clear that the processing device 3 can be replaced by the computer.

In addition, although we have explained the case of wafer probing test above, if the wafer prober is used as a product handling device, the test completion signal for one wafer is treated as the test completion signal for one product, and the number of wafers is treated as the number of products, the product can be inspected. It is also applicable to systems.

As explained above, according to the present invention, it is possible to give advance notice of the end time of test work, which is expected to improve the operating rate of expensive testing equipment, and also enables systematic test work. A significant improvement in productivity is expected.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, 1... test device, 2, 2'...
...Wafer prober, 3...Processing device, 4...Time counting device (clock), 5...Console, 6...
It is a display device.

Claims (1)

[Scope of Claims] 1. Testing means for sequentially testing the electrical characteristics of a plurality of semiconductor devices to be tested, and measuring the processing time required for the testing device to test a first predetermined number of semiconductor devices to be tested. a first calculation means that calculates an average processing time required to test the semiconductor device to be tested based on the processing time; The present invention is characterized by comprising a second calculation means for calculating a scheduled test end time at which a test of a semiconductor device to be inspected is to be completed, and a display means for displaying the scheduled test end time calculated by the second calculation means. Semiconductor device inspection equipment. 2. A plurality of the semiconductor elements to be inspected are formed on a semiconductor wafer, and the first predetermined number is equal to the number of the semiconductor elements to be inspected formed on one semiconductor wafer. A semiconductor device testing apparatus according to claim 1, characterized in that: