JPS6230053A - Dot-shaped scaling method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a device for enlarging or reducing a dot shape composed of a plurality of dots, and particularly for enlarging or reducing a dot shape by a factor of n/m (where m and n are integers). This paper relates to a method for enlarging/reducing glyph shapes.

[Conventional technology]

Dot characters are generally used for Kanji characters in word processors and Kanji printers. This consists of, for example, two dots on each side and a total of pxp (Bits).

The desired glyph shape is created by making these dots white or black. Generally, a single word processor has limited memory capacity, so these glyphs are only stored in a specific dot configuration, such as the PXP dot 7 configuration as mentioned above, and cannot be stored in other dot configurations. Characters were generated from the constituent characters of P×P dots through calculations by a processor or the like. That is, the characters constituting the P×P dots are enlarged or reduced.

Conventionally, the 9-division method was used to enlarge and reduce dot characters.

Further, the IJ method is often used for enlargement.

The 9-division method is a method in which a specific area is divided into 9 parts, and a discriminant is used to determine whether the dot is black or not depending on which area the dot falls in after being enlarged or reduced. Further, the IJ method is a method in which a ring dot character is divided according to the dot correspondence of enlargement, and black or white after enlargement is determined using a correspondence table, that is, a conversion table, for each division unit determined in advance.

The above-mentioned 9-division method requires calculations to obtain each dot, and vertical lines and horizontal lines, which had the same width in a single original drawing, may become irregular after being enlarged or reduced. In addition, the IJ method requires a correspondence table for expansion, so if there are many dots (3:4, 5:6, etc.), the conversion table will increase.
Furthermore, as with the 9-division method, vertical lines that were the same width in the original drawing,
The horizontal lines sometimes became irregular after being enlarged.

On the other hand, with the IJ method, it is possible to create uppercase letters and small letters, but a conversion table must be provided for each, and in order to do this, the conversion table must be further increased. I shouldn't have.

[Purpose of the invention]

In view of the above-mentioned drawbacks of the conventional art, the present invention provides a dot-shaped enlargement/reduction method that eliminates the disturbance of the line width due to enlargement or reduction of the dot-shaped shape, and enables thick or thin enlargement/reduction with a small number of conversion tables. The purpose is to

[Key points of the invention]

According to the present invention, the above object is achieved by providing a first buffer for storing character pattern data having m dots on one side, a second buffer storing character pattern data having n dots on one side, and a third buffer for storing character pattern data consisting of p dots that are at least the least common multiple of said m and n;
an expansion circuit that stores dots on one side of the third buffer in correspondence with the third buffer by e/m times the number of dots;

The expansion circuit reads out one side of the character pattern data stored in the third buffer in units of β/n dots, and also determines the number of white or black data of the three sold dots, and determines whether the number of white or black data exceeds a specific number. , the reduction circuit stores white or black data in the corresponding dot of the second buffer, and generates n/m times as much character pattern data in the second buffer. This is accomplished by providing a dot-shaped scaling scheme.

〔Example〕

The present invention will be explained in detail below using 11 drawings.

FIG. 1 is a circuit configuration diagram of an embodiment of the present invention, and FIG. 2 is a buffer configuration diagram explaining the basic principle of the invention. The input cover sofa 1 stores character pattern data (“1” for black and “0” for white) input from a circuit not shown.
As shown in Figure 2, m x m bits (1 bit is 1
(corresponding to a dot). The expansion circuit 3 sequentially reads each bit data, that is, the character bit data, in the input cover sofa 1 bit by bit, reads the expansion pattern from the expansion pattern memory 2 when the bit is "1", that is, the dot is black, and stores the corresponding pattern in the intermediate buffer 4. Perform processing to store the data in the specified location.

FIG. 3 is a detailed flowchart of the operation processing of the expansion circuit 3. When character pattern data is stored in the input cover sofa 1 and a processing start signal is applied from the control circuit 8, the operation processing shown in FIG. 3 is started. First.

Clear intermediate buffer 4 S1. By this clearing S1, all bits of the intermediate buffer 4 become 0. Then, the pointers X and N that are included in the expansion circuit 3.

Set Y and N to O (S2). These processes St and S2 are initial processes for expansion of one character. Next, 1 bit of the input buffer 1 indicated by the pointer If it is "1" (Y), the dot of the character pattern corresponding to the l bit is black, so processing is performed to write black, that is, "1", to the corresponding position in the intermediate buffer 4.

First, the address X of the intermediate buffer 4 corresponding to the dot read out from the input cover sofa 1. tlTIyt)u□ is calculated (S4). As shown in FIG. 2, the size of the intermediate buffer 4 is N times the size of the inlet sofa, so Xo, A
=X, NXN, YouT=Y, NXN. Note that +

And then address X. Starting from LIT+you'r, the content of the developed pattern memory is OR-added to the area on the intermediate buffer 4 (S5). Figure 4(a) is.

FIG. 4(b), which is a diagram showing the contents of the expanded pattern memory, is a diagram showing the positional relationship of OR addition to the intermediate buffer 4. In addition, FIG. 4 shows the case where the number of covered sofas 1 is multiplied by three, that is, the case where N=3. Dot a in the expanded pattern memory 2 is X in the intermediate buffer 4. U71
Corresponds to the position of yolJT.

In the embodiment of the present invention, the expanded pattern memory 2 has N
XN (3×3 in FIG. 4) The outer periphery (shaded area) of the dot is also subject to enlargement, and the contents of the expansion pattern memory 2 and the contents already stored in the intermediate buffer 4 are OR-added to the intermediate buffer 4. It is configured to be stored in .

As will be described later, the values of the two diagonal lines differ depending on whether the characters are bold or thin, or only in the horizontal direction are made bold. Note that all values in the center are 1.

When the OR addition is completed, increment X, (X,
N=X, N+ 1) S s.

On the other hand, in 6 determination S3, 1 bit of input buffer 1 indicated by pointers X, N, Y, N is not "1" (N
o> That is, when it is "0".

Since this dot is white, no processing is performed on it.

The process S6 described above is executed. This process S6 is.

This is the movement of the pointer to process the next input cover sofa. Next, determine whether the pointer X iN is smaller than m (
S7) Do it. If it is smaller (Y), the process is repeated from step S3. By repeating this process, a horizontal line is developed. If it is not small (No), then X, ,, = m, so the expansion of one horizontal row of the input buffer is complete, and in order to specify the next horizontal row, X, N are changed to o, y, N. Increment (Y, N=Y, N+1) Se. Then, it is determined whether all the processing in the Y direction has been completed (S9
) That is, it is determined whether y, N<m. Y,N
<m (Y), the process is executed again from step S3. By executing this process S3 again, the development of the horizontal row of dots is repeated m times. When Y, N < m (NO
) has all input completed.

The expansion process is ended (END).

The dot character data in the input buffer 1 is expanded and stored in the intermediate buffer 4 through the processing of the expansion circuit 3 described above.

The explanation will be given by returning to FIG. When data is stored in the intermediate buffer 4 by the expansion circuit 3, the reduction circuit 5 operates. The reduction circuit 5 reads the contents of the intermediate buffer in units of dot areas corresponding to the dots of the output buffer sofa 7, and stores a specific number (value stored in the dark value register 9) in the dot area.
Only when there is more than one “1”, the corresponding dot is set to “1”.
” in the output sofa 7.The dot area unit means that one dot in the output sofa 7 stores MX of the intermediate buffer.
The area to which the M dots correspond is defined as one unit. According to the present invention, the intermediate buffer 4 has at least one side made up of dots that are the least common multiple of m and n, and as shown in FIG. There is. That is, the intermediate buffer is MXM
By dividing by , nXn character data can be obtained.

FIG. 5 is a detailed flowchart of the operation processing of the reduction circuit 5. The reduction circuit 5 processes the operation of the expansion circuit 3 described above S3. Sa and S5 are processes for reduction. First, the exit cover sofa 7 is cleared (S11). and a pointer X' included in the reduction circuit 5. 0 engineering,
Clear Y'oyu (S12). This processing Sl+,
312 is an initial process for reducing the character dot data stored in the intermediate buffer 4. Next, pointer X't) IJTI Y'ou'r is multiplied by M and stored in
3). (X', N, Y', N refer to specific addresses of intermediate buffer 4). Furthermore, the pointer X' 0LITI Y
The value multiplied by M is the dot in intermediate buffer 4.
This is the upper left dot address when divided by M dots. Next, address x', N.

With Y'iN as the starting point (the upper left dot when divided), "1" in the MXM dot area in the intermediate buffer 4 is
” (S+a). In the expansion circuit 3, when the corresponding one dot is 1', the pattern memory 2
The content (pattern) of Compared to the threshold value S stored in the register 9 (515), when the number of 1" dots is greater than the dark value S (Y), the dots at the address X'.7.Y' of the output cover sofa 7 are Store “1” (S+s).

1. Input buffer 1. The intermediate buffer 4 and the output buffer 7 are memories, each having a dot corresponding to one bit. For example, the 6×6 memory buffer 1 is a memory with a 6-bit, 7-bit×6-bit configuration.

On the other hand, in the above-mentioned comparison (315), when the number of dots of "1" is smaller than the threshold value S (No), the output cover sofa 7
X′. 1. Y'. The process S's of storing "1" in the address of is skipped. That is, assuming that the area divided by the intermediate buffer 4 is close to white, nothing is stored in the corresponding dot.

When the reduction circuit 5 starts operating, everything is cleared to "0", so storing nothing means "0".
This is equivalent to storing ”.

Next is X'. , is incremented (SI7), and it is determined whether or not X'0LIT is smaller than n (S18). When it is smaller (Y), the process 313 is repeated again. Increment processing S17 and comparison processing S+e
The reduction of the horizontal row of dots on the output sofa 7 is repeated. When all horizontal rows have been reduced, X
'. is equal to n, so the result of 2 discrimination S+e is (N
o) and clear the first X' OUT (O") L,
Y'oU is incremented (S19). And Y
# Compare whether ou is smaller than m (S 20)
When Y′o□ is smaller than l, , n (Y), S1 again
Repeat from 3. Through this process, the reduction of the next horizontal row is sequentially repeated. When the determination S20 is No, the reduction in one horizontal row is sequentially repeated. When the process is repeated n times, the reduction determination process has been performed on all nXn dots of the output cover sofa 7, and the reduction circuit 5 ends its operation (END).

As a result of the above-described operation shown in FIG. 1, the m x m dot character pattern stored in the input buffer 1 is changed to an n x n dot character pattern. still.

When m>n, it is a reduction; when m=n, it is the same scale; when Lzm<n, it is an expansion. In the embodiment of the present invention shown in FIG. 1, during expansion, the outer periphery of, for example, an NXN dot in the intermediate buffer corresponding to the large-power buffer may be taken into consideration and set to "1" (the contents of the pattern memory 2). The output is not the same even if m and = n (depending on the output), and can be made thicker or thinner.

In FIG. 1, the control circuit 8 is connected to the expansion circuit 3° reduction circuit 5, but this is only for starting the above-mentioned operations.

Figure 6 shows the input cover sofa 1 and the output cover sofa 7 with 6 x 6 dots.
FIG. 4 is an explanatory diagram showing dots in the intermediate buffer 4 when the dots are 9×9 dots.

The intermediate buffer 4 at this time is 18×18.

This is because the intermediate buffer 4 is set to the least common multiple or common multiple of the number of dots on one side of the input buffer 1 and the number of dots on one side of the output buffer sofa 7. One dot in the input buffer 1 corresponds to a 3×3 dot in the intermediate buffer 4, and a 2×2 dot in the intermediate buffer 4 corresponds to one dot in the output cover sofa 7. In other words, the number of dots is 1.5 times that of the large buffer.

As mentioned above, it was explained that the expansion in the present invention can be done thicker or thinner, thicker only in the horizontal direction, thicker in the vertical direction, etc., but this depends on the expansion pattern stored in the pattern memory 2 and the threshold value S. determined by

FIG. 7(a) and FIG. 8(a) are the same pattern of 32×32 dots, and are the dots of "easy". This is developed in the developed pattern memory as shown in FIG. 7(d) and FIG. 8(d), respectively, as shown in FIG. 7(b).
, FIG. 8(b). In FIGS. 7 and 8, the dots on the output sofa are 48 x 48 dots, so the intermediate buffer is configured as 96 x 96 dots. FIG. 7 shows the case where the darkness value is reduced to S=3, and FIG. 8 shows the case where the darkness value is reduced to S=4. The obtained results are shown in FIG. 7(C) and FIG. 8(C). Even if the original character pattern data is the same, the enlarged results differ depending on the developed pattern data and the darkness value.

For example, in the case of Fig. 7(d), the developed pattern data is set so that the right side of the outer periphery is "1", so the obtained character pattern is an enlarged pattern that is expressed thickly in the horizontal direction. There is. In addition, in the case of Figure 8 (dl), both the outer circumference in the vertical direction, that is, the upper and lower directions, are set to "1", and the outer circumference in the right side direction is set to "1", so especially as shown in Figure 9 (C), It is thicker in the vertical direction.The darkness value at this time is larger than in the case of Figure 7. As a result, characters of the same thickness are obtained as a whole.

〔Effect of the invention〕

As described above, the present invention performs expansion using the expansion pattern stored in the expansion pattern memory.

Furthermore, find the dot that is “1” and use the darkness value.
・Since "0" and "1" are determined for each dot to be output, the present invention provides a method for enlarging and reducing the dot shape in which enlargement to thicker or thinner characters, as well as reduction, etc., can be arbitrarily determined. Furthermore, the present invention provides an intermediate buffer whose one side is composed of at least the least common multiple of the number of dots on each side of the input and output cover sofas. Furthermore, according to the present invention, it is not necessary to have many types of expansion pattern memories.

With a small storage capacity, it is possible to use a dot-shaped enlargement/reduction method to obtain character pattern data in which characters are made thicker or thinner in each direction such as the horizontal direction, or character pattern data is made thicker or thinner overall.

[Brief explanation of drawings]

FIG. 1 is a circuit configuration diagram of an embodiment of the present invention. FIG. 2 is a buffer configuration diagram explaining the basic principle of the present invention. FIG. 3 is a detailed flowchart of the operation processing of the expansion circuit. Fig. 4 (81 is a diagram showing the contents of the pattern memory. Fig. 4 (b) is a diagram showing the positional relationship of OR addition to the buffer. Fig. 5 is a detailed flowchart of the operation processing of the reduction circuit. Fig. 6 is Specific examples of buffer configurations when each side of the in-cover sofa, out-cover sofa, and intermediate buffer is 6 dots, 9 dots, and 18 dots. Figures 7 and 8 (at, (b), fc), (d)
1 is a pattern diagram of each buffer and a data diagram showing the expanded pattern data in the expanded memory when the pattern "Raku" is expanded and reduced in the embodiment of the present invention. 1. Hippo sofa. 2...Pattern memory. 3... Deployment circuit. 4...Intermediate buffer. 5...reduction circuit. 7...Output buffer. 8...Control circuit. 9...Dark value register. Patent Applicant Casio Computer Co., Ltd. Figure 1 Figure 2 Figure 3 (b) Figure 4 Figure 5 Figure 6 (d)

Claims (3)

[Claims] (1) A first buffer that stores character pattern data that has m dots on one side, and a second buffer that stores character pattern data that has n dots on one side;
a third buffer for storing character pattern data each side of which is composed of l dots of at least the least common multiple of m and n; an expansion circuit that increases the number of dots on one side by l/m times the number of dots and stores it in the third buffer in correspondence with the buffer of It consists of a reduction circuit that reads out dots in units of dots, determines the number of black data in the read dots, and stores the black data in the corresponding dots of the second buffer if the black data exceeds a specific number. , n/m times the character pattern data is generated in a second buffer. (2) When each dot of the character pattern stored in the first buffer is black data, the expansion circuit corresponds to the third buffer so that each dot is made into a dot whose side is l/m times larger. It has an expanded pattern memory in which at least one dot corresponding to a third buffer around the outer periphery of the dot group is set as black data, and each dot of the third buffer is read out and OR-added with the contents of the expanded pattern memory. The dot-shaped enlargement/reduction method according to claim 1, wherein black data is reliably stored in the third buffer. (3) The dot-shaped enlargement/reduction method according to claim 1 or 2, wherein all of the black data is white data.