JPS6231296A - Image playback device - Google Patents

Abstract

PURPOSE:To suppress a disturbance due to the erasing of a pattern to minimum by changing a reference of a control means for controlling a change over of a color difference signal in accordance with a change over of a video signal to a mute or the like during feeding a track or the like. CONSTITUTION:When a user desires to feed a head 5 between tracks, the operates a remote control 17 and feeds a signal to a photodetecting part 16. The signal is converted to a pulse 18 and fed to a CPU 15. For instance, if this signal 18 is signal for moving the head 5 from the first track to the 20-th track, a video signal is not inputted to an encoder 9, however, a subcarrier signal 22, a composite synchronous signal 23 and a character signal 24 and a burst flag 25 are inputted. Consequently, a video signal 26 to which the com posite synchronous signal and a burst signal are added is outputted from the encoder 9, so that for instance a black screen appears on a monitor 10. At this time, since a change over control signal 36 of a switch SW2 is changed over several H before of a vertical synchronous signal, or before a blanking period, it can be clearly erased on the monitor.

Description

[Detailed Description of the Invention] (Hereinafter in the margin) 3. Detailed Description of the Invention II L Industrial Application Fields J Book 9. The present invention relates to an image reproducing device that reproduces image information recorded on a recording medium such as a magnetic sheet or an optical disk.

[Prior Art J] As shown in the figure, it is known as an image recording method for still video etc. to superimpose a DC offset component on one color difference signal and record it on a recording medium.

When a recorded image is reproduced, the color difference signals are separated by detecting the previously superimposed DC offset component.

[Problems to be Solved by the Invention] Now, it is assumed that the image information recorded on the first track L of the magnetic disk is reproduced once using one head. After that, if you want to send the head to the 20th track and play back the image recorded there, move the 7A2 track - the 18th track L by the spatula 1.
- will pass through, so unrelated images will appear continuously on the monitor screen.

Furthermore, if a guard band in which nothing is recorded is provided between tracks, no signal will be output intermittently.

Under such conditions, there was a drawback that the screen flickered and became very difficult to see.

Furthermore, even when the head is advanced by one track, there is a drawback that the screen is momentarily disturbed and then the next track is played back. In particular, since the black signal will be read even when the head passes through the guard punt, a high-speed PLL circuit board is required to synchronize quickly with the new playback video signal. Another drawback is that it increases costs as the circuit scale increases.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image reproducing device with a simple structure that prevents screen flickering even when randomly accessing recorded image information or moving a head between tracks.

[Means for Solving Problems] In the present invention, the condition of 11th grade Shinso of multiple water f period 7L
, a control stage for sending out a switching signal for performing a different color difference signal (r) (compared with a normal color difference signal), and an erasure stage for changing the +fj raw video image signal to Pp +I-; The erasure is configured to change the control-L stage's] and (corresponding to the operation of the 0 stage).

[Embodiment] FIG. 1 is a block diagram showing an embodiment of an image reproducing apparatus to which Mokumitsu II is applied.

In this figure, l is a video signal t containing color difference line sequential signals.
;-, and is supplied to the magnetic heald 5 via the modulator 3, recording amplifier 4, and switch SWI.

6 is a magnetic sheet.

Further, during reproduction, the switch SWI is turned to the preamplifier 7 side by the control signal 20 output from the CPt 115. Thereby, the signal reproduced via the magnetic herad 5 is transmitted to the preamplifier 7. Demodulator 8. The signal is input to the encoder 9 via the line sense section 27 and switch SW2.

FIG. 2 is a detailed circuit diagram of the line sensing section 27, in which the sample and hold circuit SH detects the DC offset of the color difference signal CD sent sequentially in color difference lines, and the comparison circuit G
Compare with the reference level at NP 1, T flip-flop T
A line switch signal is formed by the exclusive OR gate EXI in synchronization with the horizontal synchronization signal Hsync input via I.

In addition, sample hold circuit SH1 comparison circuit GNP1
operates in synchronization with the water synchronization signal via the T flip-flop 〒1. Also, TI and T2 alternately output high and low for each IH.

On the other hand, the water synchronization signal via the T flip-flop T2 is output via EX2 depending on whether the Q output of the T flip-flop T3 is high or low, and the output from IJI and the comparison circuit C
Compare with MP2. If the two do not match, use this (
: A pulse is output from MP2, this pulse is counted by counter 18c, and this carry is counted by counter 8C.

In the state FB in which the switch SW3 is connected to the b side by the signal 36, when the carry output of the counter 8 is obtained, the Q of the T clip flop T3 becomes high level. These counters 18c and 8c are for switching color difference signals!
/J conversion t) This means that the LS error is more than a certain degree, so when the Q output of T3 is high, the output of EX2 becomes high level only when the output of T2 is low level.

Therefore, when the outputs of EXI and EX2 frequently mismatch, the polarity of the color difference signal switching signal LS is reversed.

Note that the counters ll3c and 8c are reset at the middle of the l field by a PC pulse every IV.

Further, when the switch SW3 is switched to the a side by the signal 36, the carry output of the counter IBc causes the T3
Since the Q output becomes high, the r1 breaking speed becomes faster.

When muting the screen during track shifting or the like, for example, when the signal 36 becomes high level, νJ switches to the a side.

The switch SW3 is normally on the b side.

In this way, the line switch signal LS is formed, but as mentioned above, the signal S/N? If the error is bad, a license error may occur, so a majority decision is made using a hexadecimal counter 18c and an octal counter 8C to prevent errors. At this time, normally the majority vote is taken for 1 field, but while the head is moving between tracks, the majority vote is reduced to 16 lines.

This is to speed up licensing when moving to a new track. Therefore, from CPU 15,
A signal 36 indicating that the track is being fed is input to the line sensing section.

This line switch signal LS is 1 as shown in FIG.
It is used to convert a color difference line sequential signal into a synchronized color difference signal (hereinafter referred to as a redirection signal).

In Figure 3, DI and D2 are IH (water period) delay circuits, 40 is an adder, 41 is a color difference signal input terminal, and SW
4 is a switch, and 42 is an inlet.

43 is line switch signal LS input terminal, 44.45
are the output terminals of (RY) and CB-Y, respectively.

When (B-Y) is input to the terminal 41, LS becomes high level, and the switch SW4 is set to the a side! ,
LJ changes.

Therefore, the original note t''j of B-Y and the B-Y 2H before are added and output to the terminal r45, and the RY signal before IH is the terminal /-
44.

Next, when the R-Y signal is input to 1141, LS becomes low level, the switch SW4 is switched to the b side, and the R-Y @ signal of OH+2H is guided to the terminal 41.
The BY signal of lH is guided to 嬬 f45.

The encoder 9 receives and receives a subcarrier signal 23 from the synchronization system 14 and performs chroma processing, and a burst flag 25 output from the CPU 15 adds a burst to the video signal. Similarly, a character signal output from the GPU 15 is added to the video signal. This character signal is for displaying, for example, date 9 time, track number, etc. on a part of the monitor screen. Further, a composite synchronization signal 23 output from the synchronization system 14 is added to the video signal, and an NTSC signal 25 is sent to the monitor 10.

The input video signal 1 is input to the sync separation circuit 13 during recording, and the reproduced video signal 2B is input to the sync separation circuit 13 during playback. Then, in synchronization with the synchronization signal 32 output from the synchronization separation circuit 13, the synchronization system 14 sends out various timing signals. Furthermore, the synchronization system 14 can also generate a free run signal using an internal oscillator.

From this synchronization system 14, vertical and horizontal synchronization signals 322
>(The CPU 15 sends a control signal 27 for free running the synchronous system 14.)
is sent.

The servo circuit 12- receives a vertical synchronization signal 3 from the synchronization system 14.
6 is sent. The servo circuit 12 rotates the 51 sheet 6 in synchronization with this synchronization signal 36.

The head drive unit 11 includes a step motor and moves the head 5 across all tracks. This is C
:Control is performed by supplying the control pulse 19 sent from the PU 15 to the head drive section 11.

Now, assume that the user wishes to move the head 5 between tracks and operates the remote controller 17 to send a signal to the light receiving section 16. The signal is converted to pulse 18 and CP
Sent to U15. Assuming that this signal 1 is a signal for moving the head 5 from the 1st track to the 20th track, for example, the CPU 15 first outputs a signal 36 that turns the switch SW2 to the ground side. This signal 36 is also supplied to the line sensing section 27 at the same time to reduce the number of majority decisions (excluding the octal counter in FIG. 2).

As a result, the video signal is no longer input to the encoder 9, but the subcarrier signal 22. The composite synchronization signal 231, character signal 24 and eighth flag 25 are still being input. Therefore, the encoder 3 outputs the video signal 2B to which the composite synchronization signal and the 8-st signal are added, so that, for example, a black screen appears on the monitor IO.

At this time, the switching control signal 3B of the switch SW2 is switched during the blanking period, that is, several H times before the vertical synchronization signal, so that it can be clearly erased on the monitor.

Further, at the same time, by sending a head driving pulse 19 to the head driving section 11, the head 5 can be moved between tracks. For example, if one track can be sent with 10 pulses, 190
By outputting the pulse, the head 5 can be moved from the 7JSl) rack to the 20th track.

Then, when the head 5 reaches the 20th track, the video information on the 20th track is displayed on the monitor +01- by switching the switch SW2 within the blanking period. At this time, the synchronization system 14 attempts to synchronize with the playback signal 26, but since there is no playback signal during muting (that is, while erasing the video), the free run control signal 34 causes the synchronization system 14 to become free. It is in a run state and the corresponding synchronization signal is being sent to the monitor 10.

Further, since the servo circuit 12 matches the phase of the synchronization signal 28 and the phase of the PG signal 38 sent from the rotary seat 6, the vertical synchronization signal in the free run state and the playback signal 26
There is no significant deviation from the vertical synchronization signal. Therefore, if a new track is created while muted, which is a free thin state,
Even when switching to the second playback, the synchronization does not become significantly out of sync.

Furthermore, when performing high-speed frame advance, it is possible to similarly mute the unsigned -'J section between tracks. This eliminates disturbances in one screen, and also synchronizes each track at the time of I11 generation to reduce synchronization disturbances, thereby making it possible to perform frame-by-frame playback that is very easy to view.

Note that since characters can be displayed on the screen even during muting, it is also possible to display the track number to which the head is sent during random access on the monitor screen during muting.

Further, as described above, since the control signal for the line sensing section 27 and the control signal for the switch SW2 are used together, there is no need to separately create a new timing No. 0. Furthermore, since the signal line from the CPU is also used, there is no need to add a new circuit configuration.

In the embodiment shown in FIG. 751, the remote control 17 can be of any type, such as a wired type or an optical type. Further, as the recording medium, not only a magnetic disk but also an optical disk or the like can be used. Furthermore, during muting, the monitor screen can be set to a desired color, such as gray or white, instead of black.

If muting is not necessary for reasons such as searching recorded images, it is also possible to provide a manual switching mechanism so that muting is not performed.

As another example, ■ It is also possible to remove the character signal 24.

■ Burst flag 25. It is also possible to adopt a configuration in which the subcarrier signal 22 is muted (during monochrome image reproduction).

(2) The timing of switching the switch SW2 does not have to be several H times before the vertical synchronization signal.

■ Non-signal areas on tracks include not only guard bands but also unrecorded tracks.

[Effects of the Invention] As described in Theory 11 above, according to the present invention, the control for controlling the switching of the color difference signal in response to switching the video signal to mute or the like at the time of track feeding is performed in the r stage. Since the standard is changed, screen disturbances caused by screen erasure can be minimized.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an entire embodiment of an image reproducing apparatus to which the present invention is applied, and FIG. 2 is a detailed block diagram of a license section included in the embodiment of the present invention. FIG. 3 is a block diagram of a circuit for synchronizing line-sequential color difference signals, and FIG. 4 is a waveform diagram showing a recording mode of color difference signals. 3...Modulator, 5...Head. 6... Rotation record sheet. 8... Demodulator. 9... Encoder, 11... Head drive unit, 12... Servo circuit, 13... Synchronization separation circuit, 14... Synchronization system (synchronous signal generation circuit), 15... C
PU, 27...License department.

Claims (1)

[Scope of Claims] A control means for transmitting a switching signal for determining a color difference signal by comparing the state of a reproduced video signal in a plurality of horizontal periods with a reference; and an erasing means for stopping display of the reproduced video signal. An image reproducing apparatus, comprising: changing the reference of the control means in accordance with the operation of the erasing means.