JPS6232767A - Optical scanning method - Google Patents

Abstract

PURPOSE:To effectively remove distortion or density unevenness on a recording image by providing two D/A converters at an arithmetic means and controlling scanning current impressing a reference value signal and a correction signal respectively. CONSTITUTION:An arithmetic means 42 is equipped with two D/A converters: one is for the reference value signal and the other for the correction signal. A laser beam emitted from a semiconductor laser 10 is photodetected at a photosensor 14 and a signal corresponding to the light intensity of the received light is impressed on a comparator 18 as VM, being compared with reference voltage Vref. The output of the comparator 18 is added on an up/down counter 20, and the output is converted to an analog volume by the arithmetic means 42 and is impressed on a semiconductor laser driving circuit 12. When the voltage VM is changed gradually and the size relation between the reference voltage Vref is reversed, an edge detector 22 detects an edge and recovers the counter 20, keeping the level of the driving current of the semiconductor laser 10 as it is.

Description

[Detailed description of the invention] (Technical field) The present invention relates to an optical scanning method.

(Conventional technology) Modulated light from a semiconductor laser is transmitted through a rotating polygon mirror.

An optical scanning system in which light is deflected using a rotating deflector such as a hologram scanner is well known. Since a rotary deflector generally deflects a light beam at a constant angular velocity, an fθ lens is generally used to keep the scanning speed on the surface to be scanned constant.

However, the fθ lens is a special lens and its manufacturing cost is high. Therefore, there is a desire to eliminate the use of an fθ lens if possible. In addition, recently, special polybon mirrors in which the scanning angular velocity of the light beam is not constant are being proposed (Japanese Patent Application No. 59-274324). Since the speed is not constant, an fθ lens cannot be used.

In view of these circumstances, recently, an optical scanning method that performs optical scanning without using an fθ lens is being considered. For example, FIG. 6 shows an example of such an optical scanning type scanning device.

The light flux enters a rotating polygon mirror 82 which is a rotating deflector via a lens 80, is reflected by one of its reflecting surfaces, enters a photoconductive photoreceptor 84, and is directed onto the photoreceptor by the action of the lens 80. focus on. When the rotating polygon @ 82 is rotated at a constant speed in the direction of the arrow, the light beam is deflected from left to right in FIG. Light scan. In addition, the code|symbol 86 shows a light receiving element,
This light receiving element 86 is used to synchronize the starting point of optical scanning.

As the rotating polygon mirror 82 rotates, the reflecting surface that reflects the light beam is switched, and the deflection, that is, the optical scanning is periodically repeated.

Incidentally, when optical scanning is performed, a clock having a frequency fg given by 1/T is called an image scanning clock, where T is the time allocated to writing information for one pixel.

In the optical scanning method that does not use an fO lens, the scanning light
Since the scanning speed on the scanned surface is not constant,
If the frequency fg of the image scanning clock is kept constant, distortion will occur in the written information. In order to remove such information distortion, it is necessary to change the frequency fg in accordance with changes in the scanning speed on the surface to be scanned. Namely.

Where the scanning speed is high, the frequency fg of the image scanning clock must be increased accordingly, and where the scanning speed is low, the frequency fK must be decreased accordingly.

By changing the frequency fg of the one-image scanning clock in accordance with the scanning speed in this manner, distortion of the written information image can be effectively reduced.

By the way, as mentioned earlier, one frequency fK is the reciprocal of the time T allocated to writing information for one pixel. Therefore 5
A change in frequency fg corresponds to a change in T by one hour. Then, when the intensity of the scanning light is constant during optical scanning, the amount of light used to write one pixel is When writing by optical scanning, there will be a difference in energy as the scanning speed changes.

The amount of exposure light per pixel changes, and the image density changes in the resulting information image in accordance with the change in scanning speed.

(Purpose) The present invention has been made in view of the above-mentioned information, and is intended to effectively reduce distortion of information images and changes in image density caused by changes in scanning speed in an optical scanning method that does not use an fθ lens. The purpose of the present invention is to provide a novel optical scanning method that can reduce the amount of light used.

(composition) The present invention will be explained below.

In the optical scanning method of the present invention, a semiconductor laser is used as a light source. The modulated light from the semiconductor laser (modulated with a modulation signal corresponding to the image signal) is deflected by a rotating deflector, i.e., a rotating polygon mirror or a hologram scanner, and directs the light onto the scanned surface without using an fθ lens. scan.

Since the emission intensity of a semiconductor laser is very unstable with respect to temperature, the emission intensity is set to a reference value by an output intensity control circuit.

The setting of the light emission intensity to the reference value is performed at a time other than during optical writing scanning. In other words, it may be carried out during standby before the start of over-scanning of one page of optical writing, or during a period other than the optimum optical writing time during each deflection of the scanning light while optical scanning is being performed. The deflection may be performed using a time other than the above-mentioned suitable optical writing time, and may be performed once every several times of deflection.

As for the output intensity control circuit, the applicant first filed a patent application in 1986-
The one proposed in No. 16010 can be used.

Also, by the image scanning clock frequency control circuit.

An image scanning clock whose frequency changes continuously in response to changes in the scanning speed on the surface to be scanned is generated.

As this image scanning clock frequency control circuit.

The method previously proposed by the applicant in Japanese Patent Application No. 60-92960 can be used.

Now, when the emission intensity of the semiconductor laser during optical writing scanning is set to a reference value, a digital reference value signal is obtained from the output intensity control circuit.

On the other hand, in the image scanning clock frequency control circuit, the frequency division ratio for the reference clock from the oscillator is switched in one step, and accordingly, the image scanning clock whose frequency changes continuously is output from the phase-locked loop circuit. However, each time the frequency division ratio is switched, an up/down counter is driven to obtain a digital correction signal.

The reference value signal and correction signal described above are then applied to the two D/A converters in the calculation means, respectively. That is, a digital reference value signal is applied to one side of the D/A converter, and a digital correction signal is applied to the other side.

The calculation means calculates and modulates the reference value signal using the correction signal. The calculation for this calculation modulation can be addition, subtraction, squaring, or division. As a result of the arithmetic modulation, an analog signal is obtained, and this analog signal changes stepwise in proportion to the change in scanning speed. The output value of the up/down counter and the calculation formula in the calculation means are determined so that the stepwise change in this analog signal corresponds to a good approximation of the appropriate exposure amount according to the frequency change of the one-image scanning clock. .

Then, while modulating this analog signal with a modulation signal,
It drives a semiconductor laser. As a result, the exposure amount changes stepwise, but in accordance with the scanning speed, so as to reduce exposure unevenness.

Hereinafter, description will be given based on specific examples.

FIG. 1 shows an example of a circuit for the optical scanning method of the present invention. In FIG. 1, the parts other than the image scanning clock frequency control circuit 38 and the digital value setting circuit 40 were previously proposed by the applicant in Japanese Patent Application No. 16010/1983. It is the same as the output intensity control circuit.

Therefore, with reference to FIG. 1, the setting of the emission intensity of the semiconductor laser to a reference value and the generation of the reference value signal will be explained first.

The calculation means 42 has two D/A converters, one of which is for the reference value signal and the other for the correction signal. The D/A converter for the correction signal is controlled so that it does not contribute at all to the function of the output intensity control circuit when the emission intensity is set to the reference value (hereinafter referred to as output intensity control). be done. Therefore, during output intensity control, the calculation means 42 functions only as a D/A converter for the reference value signal.

Now, the laser light emitted backward from the semiconductor laser 10 is received by the photosensor 14. The photosensor 14 outputs a current proportional to the intensity of the received light, which is converted into a voltage by an amplifier 16 and a comparator 18.
is applied as a voltage value VM to the reference voltage V ref and compared with the reference voltage V ref. The output voltage of the comparator 18 is the voltage vM and V r
It becomes a high level or a low level depending on the magnitude relationship of ef, and controls the counting mode of the up/down counter 20 (hereinafter simply referred to as counter 20). For example, when Vm<Vref, that is, the semiconductor laser 1
When the output intensity of 0 does not reach the reference value, comparator 1
The output of 8 becomes low level, and the counter 20 enters the count mode, ie, up mode, in which it operates as an up counter, and conversely enters the count mode, ie, down mode, in which it operates as a down counter, when VM>Vref.

The edge detection circuit 32 detects the rising edge of the frame synchronization signal FSYNC, and the detection signal is passed through an OR circuit 34 to an AND circuit 30.
The AND is taken.

Flip-flop 28 is set at the beginning of standby mode by the output of AND circuit 30 to produce an output signal which is ANDed with the non-scanning signal in AND circuit 26.

The counter 20 uses the output signal of the AND circuit 26 to
The disabled state is released and the glock pulses from clock pulse generator 24 are amplified or downcounted.

The count output of the counter 20 is converted into an analog quantity by the calculation means 42 (which operates as a mere D/A converter when controlling the output intensity, as mentioned earlier), and is applied to the semiconductor laser drive circuit 12. . Same circuit 1
2 drives the semiconductor laser 10 with a modulation signal, and changes the drive current according to the output from the calculation means 42.

Therefore, as the count value of the counter 20 gradually increases (or decreases), the intensity of the laser light from the semiconductor laser 10 gradually increases (or decreases), and the voltage v111 applied to the comparator 18 becomes Gradually increase (or decrease).

When voltage VM gradually changes and its magnitude relationship with Vref is reversed, the output of comparator 18 is also reversed from low level to high level (or from high level to low level). At this time, edge detection circuit 22 detects the rising (or falling) edge of the output of comparator 18, resets flip-flop 28, and returns counter 20 to the disabled state.

Therefore, the counter 20 holds the count value when the output of the comparator 18 is inverted, and therefore, when the magnitude of the driving current of the semiconductor laser 10 is maintained as it is, VM=Vref is substantially maintained. The output intensity of the semiconductor laser 10 is set to a reference value set through a reference voltage vref. In this manner, the digital signal output from the counter 20 in a state where the emission intensity of the semiconductor laser 10 is set to the reference value is the reference value signal.

Note that the edge detection circuit 22 detects the counter 2 only when the output of the comparator 18 is inverted from low level to high level.
0 may be configured to be disabled.

In this way, when the output level of comparison 1ia is inverted from a low level to a high level, it is the same as the above case, but when the above output level is inverted from a high level to a low level, as shown below. Become. That is, when the high level is reversed to the low level, the counter 20 operates as an up counter while remaining in the disabled state. Then, when the driving current of the semiconductor laser 10 increases and the output of the comparator 18 is reversed from low level to high level, the edge detection circuit 21 detects the rising edge and disables the counter 20. The count value is held.

Further, the counter 20 operates as a down counter when the output of the comparator 12 is at a low level, and operates as an up counter when the output is at a high level, so that the count value and the driving current of the semiconductor laser 10 are inversely proportional. You can also do this.

Note that the output control timing generation circuit 36 operates in standby mode in response to the frame synchronization signal FSYNC, generates an output control timing signal at a constant cycle, and outputs the output control timing signal to the OR circuit 3.
4, the power setting of the semiconductor laser 10 is performed in constant synchronization.

When scanning the photoreceptor, the non-scanning signal disappears, the AND circuit 26 turns off, the counter 20 becomes disabled, the semiconductor laser 10 is not driven during scanning in the standby state, and the power set of the semiconductor laser 10 is set as follows. If it is not completed, it will be interrupted.

Then, during non-scanning, the power set is restarted.
As described above, when the emission intensity of the semiconductor laser is set to the reference value, a reference value signal is obtained from the counter 20. This reference value signal may change each time a power set is performed, but once a power set is performed, it will not change until the next time. Next, we will explain the generation of the correction signal. .

FIG. 2 shows one specific circuit of the image scanning clock frequency control circuit 38 and digital value setting circuit 40 in FIG.
An example is shown.

In FIG. 2, the portion excluding the up/down counter 68 and the calculation means 42 constitutes an image scanning clock frequency control circuit, which the applicant previously proposed in Japanese Patent Application No. 60-92960. It is the same as what was proposed. In this image scanning clock frequency control circuit, the phase detection circuit 58, the low pass filter 60, the voltage controlled oscillator 629, and the frequency divider 64 constitute a phase locked loop circuit (hereinafter referred to as a PLL circuit).

The portion of the image scanning clock frequency control circuit excluding the PLL circuit and the up/down counter 68 are as follows:
It constitutes the digital value setting circuit 40 in FIG.

First, regarding the function of the image scanning clock frequency control circuit,
Explain briefly.

The reference clock of frequency fo emitted from the oscillator 54 is divided by a frequency divider 56 to become a position control clock of frequency fo/H, which is input to the control circuit 1G and the phase detection circuit 58 of the PLL circuit.

The phase detection circuit 58 compares the phases of the position control clock and the clock input from the frequency divider 64, and outputs the phase difference to the low-pass filter 60 as a pulse signal. When the information on the phase difference is input to the voltage controlled oscillator 62 via the low-pass filter 60, the oscillator 62
A clock having a frequency corresponding to the output voltage of the low-pass filter 60 is output. This clock becomes the image scanning clock. The image scanning clock is frequency-divided by the frequency divider 64, applied as a clock to the phase detection circuit 58, and compared in phase with the position control clock.

The frequency division ratio of the frequency divider 64 is a fixed value, where M is a fixed value, and the phase difference between the clock applied from the frequency divider 64 to the phase detection circuit 58 and the position control clock (frequency -) changes. When not, the frequency fg of the image scanning clock emitted from the voltage controlled oscillator 62 is f K = f
It is o・-.

In this state, when the frequency division ratio of the frequency divider 56 is switched from N to N・Changes continuously and monotonically up to -.

Therefore, by switching the frequency division ratio of the frequency divider 56 stepwise, an image scanning clock whose frequency changes continuously can be obtained.

Now, the control circuit 50 sets the preset value of the frequency division ratio in the frequency divider 56 to the up/down counter 52 (hereinafter referred to as
A clock CK for outputting from the counter 52 (simply referred to as a counter 52), a signal EN for releasing the disabled state, and a signal U/D for setting the up/down mode are generated.

Note that the control circuit 501 frequency divider 56 includes a light receiving element 86 (
A synchronization signal obtained from FIG. 6) is applied.

The up/down mode changes from up mode (or down mode) to down mode (
A signal U/D is generated so as to switch to the up mode.

When the clock CK is input, the counter 52 updates the preset value and switches the frequency division ratio of the frequency divider 56.

The switching width ΔN is constant.

Now, the scanning area where optical scanning is performed is made up of a plurality of blocks BLI, BL2, . ..., BLi, ...
BLK, each block BLi (i=1
~K), the numerical values ai and nl (i=1~K) are determined. - In the i-th block BLi, each time Mi pulses of the 1-position control clock are input to the control circuit 50, the control circuit 50 generates the clock CK so that the frequency division ratio of the frequency divider 56 is ΔN. Switch only.

In block Bli, the clock CK is generated ni times. Therefore, the block BLi is the position control clock Mi
-01 pieces. While the block BLi is being optically scanned, the frequency division ratio changes by ni·ΔN.

The number of blocks, Mi, and ni values are the voltage controlled oscillator 2.
2, so that the frequency fK of the image scanning clock generated from 2 closely approximates the ideal frequency change accompanying the change in scanning speed.
It can be determined experimentally or theoretically depending on the design conditions of the optical scanning device.

An example is shown in FIG. In the figure, the curve represents the ideal image scanning clock fKo (as a rotating deflector, the
A rotating polygon mirror using a very special polygon mirror proposed in No. 9-274324 is envisaged. In this rotating polygon mirror, depending on the rotation angle α of the polygon mirror, the deflection angle θ of the light beam satisfies the following relationship: sin θ=(1−sin α). A and R are morphological constants of the polygon mirror. ), and the step-like graph line has the frequency fK1=
-・fo are shown respectively. By switching the frequency division ratio N stepwise, the frequency changes stepwise. The numbers 5, 6, 10, 16 below this broken line fg1 are Ml, M2, . M3. M
It corresponds to 4. As is clear from the figure, nl = 6
, n2=9, n3=3, n4=5.

This figure shows only half of the symmetrical figure, and as is clear from the symmetry, the number of blocks is 7, M5"lO, n5
"3. M6:6, n6=9. M7:5゜n7:6
It is. Further, the switching width ΔN of the 5-division ratio N is 1. As the frequency division ratio is switched stepwise, the image scanning clock changes continuously and closely approximates the ideal frequency change fg0. Incidentally, the frequency division ratio N is 69 at both ends of the scanning area and 89 at the center.

The above is the explanation of the image scanning clock frequency control circuit.

Now, returning to FIG. 2 again, the generation of the correction signal will be explained.

The signals EN, CK, and U/D generated by the control circuit 50 are applied to the up/down counter 68 (hereinafter simply referred to as counter 68) at the same time as they are applied to the counter 52. Therefore, counter 68.

At the same time, the counter 52 is released from the disabled state and starts counting, and is in the up mode.

Switch down mode. Therefore, counter 68
is driven and counts every time the frequency division ratio N with respect to the reference clock from the oscillator 54 is switched in the image scanning clock frequency control circuit, and outputs a digital signal that changes stepwise according to the count amount. This signal is a correction signal.

This correction signal is, in the example described above,
．． Since the up/down mode switching of 68 is the same, as shown in FIG. 5, it is large when the scanning speed is high, and small when the scanning speed is low.

Therefore, the above-mentioned reference value signal is computationally modulated using this correction signal.

The correction signal and the reference value signal are applied to the calculation means 42.

FIG. 4 shows two examples of basic circuit configurations of the calculation means.

In the case shown in FIG. 4(I), the arithmetic processing is of the multiplication type.

The reference value signal and the correction signal are applied to D/A converters 422 and 421, respectively, and are converted into analog quantities.

The correction signal is converted into an analog signal by a D/A converter 421,
It is applied to the D/A converter 422.

The D/A converter 422 converts the reference value signal into an analog signal, and its output is multiplicatively modulated by the analog signal applied from the D/A converter 421.

In the example just described, the correction signal is as shown in FIG.
Since it corresponds proportionally to the magnitude relationship of the scanning speed, in the end, the D/A converter 422 outputs an analog signal that changes stepwise in proportion to the change in the scanning speed. Therefore, by driving a semiconductor laser while modulating this analog signal with a modulation signal, it can be used in the optical scanning area. Where the scanning speed is high, the emission intensity of the semiconductor laser is high, and where the scanning speed is low, the above-mentioned emission intensity decreases (however, the change in one emission intensity is stepwise), so there is no variation in the exposure amount over the scanning direction. Uniformity will be effectively reduced.

FIG. 4(n) shows a general form of the calculation means 42,
The reference signal and correction signal converted into analog by the D/A converters 421 and 422 are processed by an analog calculation circuit 423 to produce a desired analog signal (which changes stepwise in proportion to the change in scanning speed). ) is computationally modulated. The operations performed in the arithmetic circuit are addition or multiplication (if the correction signal corresponds proportionally to the change in scanning speed), or addition.

or subtraction or division (if the correction signal corresponds inversely to the change in scanning speed).

In this case, resolution can be obtained by varying the gain of each D/A converter.

FIG. 3 shows another example of a circuit for obtaining a correction signal.

In this example, the output of the up/down counter 52, which is driven during stepwise switching of the 1 frequency division ratio in the image scanning clock frequency control circuit, is applied to the arithmetic circuit 70,
A desired correction signal is obtained by performing necessary arithmetic processing such as addition or subtraction processing in combination with a predetermined value.

In FIGS. 2 and 3, the mode setting signal is as follows.

D/A converter for correction signal when setting output intensity (
The D/A converter 421) in FIG. 4 controls the digital value setting circuit 40 (FIG. 1) so as not to contribute to the function of the output intensity control circuit of the semiconductor laser, and also controls the reference value signal during optical scanning. The up/down counter 20 is controlled so as to hold the output of the D/A converter (D/A converter 422 in FIG. 4).

(Effects) As described above, according to the present invention, a novel optical scanning method can be provided. Since the optical scanning method of the present invention is configured as described above, it is possible to perform optical scanning while effectively removing distortion and density unevenness in a recorded image, even though no fθ lens is used.

In addition, the correction signal is also generated digitally.

The generation circuit can be constructed with a low-cost IC and has high reliability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a circuit for implementing the present invention, FIG. 2 is a block diagram showing an example of a circuit for generating a correction signal, and FIG. 3 is a block diagram showing an example of a circuit for generating a correction signal. FIG. 4 is a block diagram showing two specific examples of the calculation means; FIG. 5 is a diagram illustrating the correspondence between the scanning speed and the correction signal; FIG. The figure is 1
FIG. 7, which is a diagram showing an example of an optical arrangement for carrying out the optical scanning method of the present invention, is a diagram for explaining the function of the image scanning clock frequency control circuit. 10... Semiconductor laser, 14... Photo sensor. 2nd meeting 72 5th drawing rod 9 drawing skin

Claims (1)

[Claims] Deflecting modulated light from a semiconductor laser with a rotating deflector,
In the optical scanning method that scans the surface to be scanned without using an fθ lens, the output intensity control circuit generates a digital reference value signal to set the emission intensity of the semiconductor laser to the reference value during optical writing scanning. The image scanning clock frequency control circuit generates an image scanning clock whose frequency changes continuously according to changes in the scanning speed on the surface to be scanned, and the image scanning clock frequency control circuit generates a reference signal from an oscillator. Each time the frequency division ratio for the clock is switched, an up/down counter is driven to obtain a digital correction signal, and the reference value signal and correction signal are respectively applied to two D/A converters in the calculation means. , the calculation means calculates and modulates the reference value signal with a correction signal to obtain an analog signal that changes stepwise in proportion to the change in the scanning speed, and modulates this analog signal with the modulation signal. An optical scanning method characterized by driving a semiconductor laser.