JPS6233638B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates generally to a new digital transmission device for transmitting and receiving a plurality of independent or unrelated coded signals, and more particularly for indicating the relative position of a movable member with respect to known fixed coordinates. The present invention relates to a new digital position pointing device.

There are numerous applications where it is necessary to monitor moving parts at a distance. This is the case when the transmission conditions between the monitoring station and the movable parts are placed in a very difficult environment. For example, in the nuclear power field, it is necessary to monitor the position of control rods within the reactor core in order to control the output of the reactor. As used herein, the term "control rod" shall include any member (placed within a nuclear reactor) that alters the reactivity of the nuclear reactor. This therefore also includes rods that serve other purposes besides their normal control purpose. The term "rod" is used synonymously with "control rod" mentioned above.

Control rods are placed near nuclear fuel elements made of fissile material. Generally, the greater the number of neutrons in the reaction zone of a nuclear reactor, the greater the number of atoms of the fuel that will be split and therefore the greater the amount of energy released. Energy in the form of heat is removed from the reaction zone by a coolant flowing through the reaction zone to a heat exchanger. Heat from the coolant is used to generate steam to drive the turbine to convert thermal energy to electrical energy. To reduce the energy output of a nuclear reactor, control rods made of neutron-absorbing materials are commonly inserted into the reaction zone, known as the reactor core. As the number of control rods increases and the deeper the control rods are inserted into the reaction zone, the number of neutrons absorbed increases and the energy output of the reactor decreases. Conversely, control rods are withdrawn from the reaction zone to increase the energy output of the reactor, so that the number of absorbed neutrons decreases, the number of fission increases, and the energy output of the reactor increases. In pressurized water reactors, it is extremely important to know the exact location of each control rod. Differences in position between adjacent control rods of more than 37.5 cm (15 inches) are considered unsafe. Additionally, knowing the position of the control rods relative to their thermal output can indicate the condition of the reactor and the degree of fuel burnout. Therefore, in order to maintain safe and reliable operation of a nuclear reactor, highly reliable control rod drive and position monitoring equipment must be used.

One device currently used for inserting and withdrawing control rods is a jack-type electro-mechanical device that uses multiple electrical coils to gradually insert and withdraw each control rod into the reactor. Make use of it. Such a device is described in U.S. Patent No.
It is described in detail in the specification of No. 3158766.

The control rod moves within the pressure vessel and is attached to the drive rod. The drive rod may be nudged in a forward or reverse direction by a drive mechanism, such as the magnetic jack mechanism described in the aforementioned patents. The drive rod extends longitudinally through the pressure vessel along the axis of movement of the control rod to a sealed, pressurized portion of the rod advancement housing. Since it is very important to completely seal the pressure vessel, mechanical penetration is kept to a minimum to reduce the likelihood of loss of pressurized parts. Therefore, mechanical punch-through is not allowed for detecting the relative position of control rods within the core of a nuclear reactor. Detecting the actual position of the control rod is a very difficult task, so detecting the position of the drive rod fixed to the control rod,
It is also customary to convert drive rod positions within the reactor core to control rod positions.

A number of devices have been devised in the past to detect the position of the drive rod (one example of which is set out in GB 1313474), but such devices depend on temperature, rod magnetization, rod magnetization, The magnetic permeability of , depends to some extent on the voltage and frequency of the power supply. Furthermore, such devices are always susceptible to interference from adjacent control rods and drive mechanisms.

Moreover, transmitting sensor signals through the reactor containment environment to the control room where monitoring is performed by nuclear plant operators is a very difficult task due to the unfavorable conditions encountered during the process. Reliable position indication of sensors is of no value without a means of accurately transmitting the information from the containment environment to a control room typically located in a building remote from the containment environment.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an improved rod position indicating device for detecting the position of a drive rod with a certain accuracy, completely independent of external conditions. Additionally, redundancy is desired to prevent loss of the entire pointing device due to a single malfunction.

The invention also provides for redundant equipment that generates multiple virtually identical outputs to a common bus signal train, particularly such equipment that requires a high degree of reliability through the common parts of the equipment divided by the multiple outputs. reveal the equipment.

In many devices that utilize multiple signal trains communicating virtually the same signal (usually for redundancy), the benefits gained are often negated by the common division of devices at the ends of the signal strings. Adding additional redundancy to a common section of equipment typically reduces the serviceability of the equipment and increases the probability of single component failure. The present invention provides an improved form of redundancy that increases reliability without reducing serviceability of the equipment.

The present invention provides electrical output signals arranged in tandem in the vicinity of the longitudinal axis in two separate groups for digitally indicating the position of an elongated movable member having one degree of freedom along the longitudinal axis. a plurality of interpolated sensors for generating the electrical output; and means for comparing and selectively utilizing the electrical output signals to indicate the position of the movable member relative to the sensor; an encoder actuated by the signal to provide a digitally coded output representative of sensor position; and an encoder actuated by the digitally coded output to transmit the digitally coded output based on a corresponding command address signal. The interface and the corresponding command address signals are generated, sequenced, and transmitted to the interface to output the digital data.
a control unit for transmitting and adaptively receiving the coded output and operating with said digitally coded output to provide a decoded display signal output representative of sensor position and responsive to said display signal output for detecting sensor position; and a display device for providing a visual display of the location.

For a better understanding of the invention, reference is made to the preferred embodiments of the invention, which are illustrated by way of example in the accompanying drawings.

The basic sensor used in this invention is a coil placed around the axis of movement of a movable member, such as a drive rod (to which a control rod is affixed), in a rod advance housing of a nuclear reactor. When an alternating current is passed through the coil, alternating magnetic flux is created and drawn into the housing. If the frequency is low enough, the skin depth is greater than the housing thickness and the alternating flux penetrates differently. A common power frequency of 60 hertz easily meets this criterion. At that time,
If a metal rod is passed in front of a location surrounded by a coil in the rod advancement housing, the impedance of the coil changes. If the rod is made of ferromagnetic material, the impedance of the coil will be high. This change in impedance can be detected in a number of ways to provide information about the position of the rod relative to the coil. For example, the current flowing through a coil can be monitored by measuring the voltage developed across a small resistor in series with the coil while being powered by a constant voltage source.

To form a complete rod position indicator, a group of coils 12 are mounted on a rod advance housing 14 as shown in FIG. Each coil 10 is connected to a resistor and the input side of the differential amplifier is connected between each pair of adjacent resistors. The differential output of one amplifier is always greater than the differential output of all remaining amplifiers, indicating exactly between which two coils the end of rod 16 is located.

The coils are relatively closely spaced.
Therefore, it is virtually impossible to ensure appreciable temperature gradients, magnetic fields, material constants, etc. between adjacent coils. Since the entire device operates on the basis of impedance balance or imbalance between adjacent sensors, only rod 16 can cause this condition by passing one adjacent sensor or not passing the other sensor. It seems to be. The position indicating device is therefore insensitive to temperature, adjacent rods, variations in power supply voltage and frequency, magnetization and magnetic properties of the rods.

Of course, care must be taken that the coil and terminating resistor have virtually identical characteristics.
However, this is not a difficult task for electrical component manufacturers. Because the coils have a certain amount of mutual coupling, the two coils placed at the ends of coil group 12 behave slightly differently than the inner coils. However, small modifications to the terminating resistors to the two end coils take care of this effect.

The arrangement contemplated by the invention divides the coil group 12 into two interpolation groups A and B as shown in FIG. The signals obtained from each group of coils are processed separately within the reactor containment environment. Each group of signals contains the information necessary to position the rod within half the total resolution of the device. Therefore, if one group malfunctions, the resolution of the device will be reduced, but the position of the rod will still be known.

Each of the approximately 61 control rods in the four-loop plant is connected to a group of coils and a group within the reactor containment structure as shown in Figure 2 to encode each coil output signal to a multiplexer. A and B encoders 18. For example, for each bar
If 42 coils are provided, one group consists of 21 coils, and the encoder 18 is combined for each group. Only one input/output interface 22 is provided within storage group A, and the other input/output interface 22 is provided within storage group B. Each storage I/O interface sequentially addresses the encoders 18 in each corresponding storage group with a command address from the central control unit 20, and the 5-bit data from the corresponding encoder containing rod position data for each rod. Receive digital code. In this way, a group of data is multiplexed onto a single set of wires, minimizing storage punch-through and wire costs.
In the reactor control room, a similar input/output interface 24 is used with the central control unit 20 to distribute information for each rod, including updated position information for each rod, to a flip-flop memory. Additionally, the information from groups A and B is recombined to provide full resolution rod position information. This information is used to control the new light emitting diode type display 26 to visually indicate the position of the bar.
Information can also be provided to a digital computer through a new computer input/output interface 28.
Another advantage of this device is that it digitally indicates the position of the bottom of the rod (the lowest point of mechanical advancement of the rod), thus eliminating the need for an expensive bistable rod position detector. A mode switch, described below, incorporated into the device allows selection of half-resolution or full-resolution output from Groups A or B.

The blocks shown in solid lines in FIG. 2 indicate the actions performed by a particular piece of equipment. The features of this invention in combination with each device will become clear from the following operational description.

In total, only six types of equipment are required to implement the position pointing device of the present invention. Encoder 18 and display 26 are required for each bar and occupy the bulk of the system.

Encoder 18 is located within the storage electronics.
One for each group of each bar to be monitored. Its first function is to detect the position of the corresponding bar at the desired half-resolution, encode this position as a 5-bit Gray code, and enter the position data in Gray code form into the command-time multiplexer. be. The second function of encoder 18 is to check for electrical malfunctions within the corresponding coil group 12 and associated wiring and most of the encoder electronics. A failure in these areas will cause a specific erroneous code to be issued instead of location data.

FIG. 3 shows the connection of the coil group 12 to each encoder 18 and the connections between the encoders and the central control unit 2.
A signal generated from 0 is shown. Graph A shows the encoder input obtained from each coil output of the group A coils. Graph B shows the potential difference obtained by comparing the impedances of adjacent coils in group A. Graphs C and D correspond to graphs A and B of group B, respectively. Tables A, B, C, D, E, F and G
shows the code generated by the encoder and central control unit in response to the coil output.
Table A shows the Gray code generated from group A encoders. Table B shows the Gray code generated from group B encoders. ε、σ、
γ, β and α represent the corresponding Gray code bits, respectively. Tables C and D show the Gray codes of corresponding groups A and B, respectively, converted to binary numbers. Table E shows the digital outputs of the corresponding central control units when groups A and B are in proper operation. Tables F and G show the digital outputs of the corresponding central control units when a malfunction is first detected in group A and then in group B. The signals shown in the graphs described above are plotted as a function of bar position corresponding to the coil group shown on the left.

FIG. 4 shows the encoder 18, and the inputs a through u shown on the left side of FIGS. 4A and 4B are the encoder inputs a shown in FIGS. 3A and 3B.
to u, respectively. In this example,
Each coil except the end coil is terminated with a 5 ohm resistor 200-238, respectively. The end coils are terminated slightly differently to provide compensation since the mutual coupling is small. The encoder shown in FIG. 4 exemplifies group A, and the terminating resistance of the end coil is represented by the number 240. The signals shown in graphs A and C of FIG. 3B represent the change in rms voltage across the corresponding termination resistor as the bar passes through the respective coil. Each AC voltage is compared with the voltages produced by two adjacent coils to produce the signals shown in graphs B and D of FIG. 3B. The position of the rod is determined by the maximum potential difference created by the rod passing one coil but not yet passing the next coil. This difference output is used to generate the corresponding Gray code shown in Tables A and B of Figure 3C.

A portion of the encoder 18 is formed by a plurality of circuits having substantially the same configuration, and its operation is controlled by a fourth circuit.
A typical circuit indicated by the number 30 in Figure A will be explained. The corresponding input data signal c from the coil group shown in FIG.
8 and 250 is compared to the input data signal d by subtracting c from d and multiplying by 5. Diodes 252, 254 and 256 are used to clamp any transient conditions at the input terminals to within acceptable limits. There is no signal available at the input terminal of the filter 32 (if the bar passes through both coils for signals c and d, or if they do not pass both in common)
or an alternating current signal (if the rod passes through the coil corresponding to signal c but not through the coil corresponding to signal d).

The AC signal then passes through parts 258, 260, 26
a high-pass filter consisting of 2,264 and 266;
waved using a DC regenerator and low-pass filter. This seemingly sophisticated filter is provided to protect against the worst electromagnetic interference conditions. The operation of the remaining circuits and associated coil signals is the same as described above.

The DC signals available on capacitors 264 and 268-304 are compared by a tracking level detection/encoding circuit shown to the right of the filter just described. In this circuit,
The highest direct current voltage controls the circuit and provides a corresponding output indicating the position of the rod. For example, if the voltage across capacitor 264 is highest, then transistor 306 will conduct and components 306,3
08, 310, 312, and 314 to the inverting input terminal of operational amplifier 316 to be equal to the signal on capacitor 264. At this time, the signal at all other similar inverting input terminals will be approximately equal to the terminal voltage of capacitor 264 and will therefore be greater than the signal at the non-inverting input terminal of the other operational amplifiers, and all other operational amplifiers will transistors 306 and 310 negatively saturated and controlled by operational amplifier 316
Turn off all NPN transistors except Transistor 306 turns on transistor 310. Therefore, the required Gray code inversion is achieved by transistor 318, which acts as an amplifier.
Appears on a base of 326 to 326. A hysteresis of approximately 100 millivolts is applied to the resistor 3 to avoid any discrepancies due to ripple or rod vibration.
Provided by 28. For AC excitation with an effective value of 6 volts, the mechanical hysteresis is less than 3.2 mm.

When each encoder is addressed by making address inputs a1 through a7 equal to a logic value of 1, NAND gates 330 through 338 are opened and the appropriate Gray codes α, β, γ, σ, and ε are output. It becomes like this. Diodes 340-348 easily wire-OR these outputs with similar signals from all other encoding circuits in the same storage group. By interconnecting the address of the central control unit with the address inputs a1 to a7, a unique address is assigned to each card.

The encoder's second function is to check for as many faults as possible that might invalidate the generated Gray code. This is accomplished primarily in the circuitry within dash-dotted line 34. Open or short circuit in coil, open or short circuit in wiring from coil to storage electronics, terminating resistor 2
00 to 240 open or short, input resistance 2
44 and 350 or 248 and 352 short circuit, input resistor 250 and 354 or 246 and 356 open circuit, protection diodes 254, 25
In the event of a number of faults, including short circuits of 6 and corresponding diodes, and faults such as amplifiers 242, 316 that saturate at +15 volts, the overvoltage is fed back to the inverting input terminal of the amplifier in the tracking level detector. The floating reference potential is generated from the alternating current excitation since this overvoltage, similar in this respect to the normal signal, is proportional to the alternating current excitation of the coil. Through remote sensing, amplifier 360 and its associated circuitry within dash-dotted line 34 in FIG. Avoid variable voltage drops at The floating reference potential of capacitor 362 is
It is periodically compared with the tracking level detector feedback signal by amplifier 364. Should the feedback signal exceed the floating reference potential, an error is detected causing the output of amplifier 364 to negatively saturate and transistor 366 to turn on. This prevents NAND gates 330-338 from being opened even though each encoder is addressed, so that α, β, γ, σ, and ε are all logic "1" bits during that address period. Among the codes shown in the table of FIG. 4C, this 11111 code is interpreted as an erroneous code by central control unit 20 in FIG. It is clear that excluding the encoder or cutting off the power supply to the encoder would lead to the same result. Also, the 4th B
A low frequency square wave, represented by input F in the figure, causes a red light emitting diode 368 on the encoder to illuminate when the encoder detects a fault.

A unique test point 36 is provided on each encoder as shown in Figure 4B. During AC excitation, the voltage at the common point of the coil group can be obtained at each test point. When all AC excitation is demagnetized, a rod drop signal for each rod (commonly used during standard rod drop tests performed in nuclear power plants) is available at the test point of each encoder associated with that rod. This signal also
A rear connector of the encoder is provided for use with analog multiplexing equipment that may be added as desired. Hysteresis of approximately 0.2 volts is added by resistor 370 for false comparisons.

Accordingly, the encoder receives and processes the respective output signals from the corresponding coil groups, and encodes the received signals into position information in the form of a Gray code. This position information is transmitted to a storage input/output interface, which will be described later.

In the exemplary unit shown, which utilizes two signal trains A and B, only two storage I/O interfaces (one for each group) are used within the entire device; It performs six functions that are critical to proper operation and maintenance. An example of a storage input/output interface is the fifth
1, and the interconnections thereof are designated by the same reference numerals.

The first function performed by the storage input/output interface is to receive address signals from the control room and to distribute the address signals to the corresponding encoders of the group while being fully electrically isolated by optical coupling. It is to buffer the signal. This function is performed by differential receiver 38. The two common connections of this stage are connected to the signal reference points of the control room electronics. Receiver 3 in Figure 5A
The input terminal of 8 is connected to the output terminal of driver 48 in the control input/output interface shown in FIG. 6A. When the input signal to the receiver 38 swings positively, it indicates a logic value of 1, and when it swings negatively, it indicates a logic value of 0. A logic one input signal at receiver 38 forward biases infrared light emitting diode 40;
and emit light proportional to the current limited by resistor 372 in FIG. 5A and resistor 374 in driver 48 in FIG. 6A. The infrared light passes through the bright insulator and strikes the collector-base junction of phototransistor 42, causing phototransistor 42 and transistor 376 to conduct. Diodes 378 and 380 provide nonlinear negative feedback to improve response time. The signal available at the collector of transistor 376 is further buffered by NAND gate 382 for proper distribution from the output terminal of receiver 38 to the encoder terminal of the same sign in FIG. 4B.

The second function performed by the storage I/O interface is to transmit data received from the encoder by address code to the control room. This function is performed by driver 44 of FIG. 5A. The input terminals of driver 44 are connected to similar all output signal terminals of each encoder having the same sign. The output terminal of the driver 44 is the sixth
It is connected to corresponding input terminals of a differential receiver 46 in the control room control input/output interface shown. Further, one common terminal of the storage input/output interface shown in FIG. 5A is connected to one common terminal of the control input/output interface shown in FIG. 6A. The receivers 38 and 38 shown in FIGS. 5A and 6A, respectively,
Optical coupling in 46 completely separates the storage and control input/output interfaces. A logic 1 at input terminal α of driver 44 shown in FIG. 5A will positively saturate amplifier 382 and produce an output on the order of 7 volts at output terminal α. Similarly, an input signal α of logic 0 produces an output signal α of about -7 volts. Transistors 384 and 386 provide higher current capacity than is available directly from amplifier 382, while resistor 388 limits current and protects against short circuits. Similarly, resistors 390 and 392 provide approximately 0.5 volts of hysteresis. Diode 394 and resistor 396 provide signal conversion for use by status detector 50 shown in FIG. 5B. NAND gate 398 and resistor 400
In order to ignore the normal encoder signals α to ε by the test circuit 62 that performs the maintenance test,
used. Under normal operating conditions, a signal S _d generated within test circuit 62 and applied as one input to NAND gate 398 disables NAND gate 398 and resistor 400 when assuming a logic zero state.

The third function performed by the storage I/O interface is to generate parity bits. This function is performed by the parity bit generation circuit shown in Figure 5B. An even number of parity bits was chosen for certain fault conditions. This means that if a 13-bit binary word is constructed using the address code received from the control room, the data received from the encoder, and the parity bits, the parity bits are in the proper state and obtained. ensure that words always have an even number of bits. The parity bit P is sent to the control room together with the 5-bit Gray code by the driver 6 shown in FIG. 5A. In this way,
Since a similar process is performed with the addresses and data sent from the control I/O interfaces, it is possible to detect a single failure in the data transmission hardware, including the I/O interfaces and the wiring therebetween. Switch 40 shown in parity bit generation circuit 54 of FIG. 5B.
2 serves two functions. switch 40
2 inverts the parity bits to match the parity error when opened, so this
Can be used to perform checks. Second, since a parity error causes data from its corresponding column to be discarded, this switch can be used by a repair person to locally disconnect an entire column without control room cooperation.

The fourth function performed by the storage I/O interface is to generate a low frequency square wave that illuminates a warning light on each encoder when an error is detected. The square wave is generated by a 4-bit counter and buffer 56 shown in FIG. 5B. The frequency of the output signal F of this circuit is determined by connecting the input terminal to one address line. If connected to terminal a7 of receiver 7 in Figure 5A, the warning light will be approximately 3
Lights up times/second.

The fifth function is to detect a failed DC or AC power supply. Such a failure is
This will generate a bit gray error code 11111 to the control room. This function is performed by the detection circuit 58 shown in FIG. 5B. The input terminal is connected from the transformer to the AC bus. The AC energizing voltage is half-wave rectified and connected to components 404, 406,
408 and 410. The voltage at the terminals of capacitor 410 (which is proportional to the AC energizing voltage) is applied to resistor 414 by amplifier 412.
and a reference voltage developed across 416. When the AC energizing voltage is too low, amplifier 4
12 saturates negatively to lower the reference voltage Vr supplied to all drivers 44 below the ground potential. In this way, the data output α from the driver 44,
β, γ, σ and ε are placed in a logical 1 state. Similarly, if the DC voltage is interrupted, the resistor 4
The reference voltage generated by 18 and 420 will be below ground potential and have the same effect. If the supply of negative DC voltage is stopped, the driver 44 will not be able to pull the data output below ground potential, so that this data output will be interrupted by the receiver 46 in the control input/output interface. It is placed in a logical 1 state.

A sixth function performed by the storage I/O interface is to perform manual overlap testing of most of the equipment to simplify installation and maintenance. This function is performed by circuits and switches in test circuit 62 of FIG. 5B. With test mode switch 60 in the normal position and the device operating, on-line testing of the storage electronics is possible. The status of the Gray code and parity bits being transmitted to the control room and corresponding to the addresses selected by switches 422-428 are indicated by visible light emitting diodes 64 of status detector 50. A complete check of the storage electronics of the corresponding rod channel can be performed by moving the rod mechanically or by other means from the bottom to the top. When test mode switch 60 is in the test control position shown, the condition present on switches 422-426 is replaced by a 5-bit Gray code from the encoder for all bars, and this position is replaced by a 5-bit Gray code from the encoder. It is displayed as 50. In this way, the electronics in the control room simulates the movement of all rods and simultaneously activates switch 422.
to 426 can be tested by simulating the Gray code.

Accordingly, the storage I/O interface performs the six functions described above that enhance the operation and maintenance of the entire device.

As with the storage I/O interfaces, only two control I/O interfaces are required for each device, but they serve four functions that are critical to the proper operation and maintenance of the device.
The control input/output interface is shown in FIG.
and interconnection with control room electronics is the first
7 and 18.

The first function performed by the control input/output interface is to connect the storage electronics from the central control unit 20 of FIG. The purpose is to provide an address to the address. This function is performed by driver 48 shown in Figure 6A. The output terminal of the driver 48 is the fifth
It is connected to the input terminal of the receiver 38 in the storage input/output interface shown in the figure, and the control room reference common 2 connection of the control input/output interface is connected to the common 2 connection of the storage input/output interface. . Driver 48 operates in a manner similar to driver 44 described above in the storage input/output interface.

In this embodiment, the central control unit 2 of FIG.
The address generated by 0 is applied to the corresponding input terminal of driver 48. The output terminal (eg, A ₀ ) of driver 48 swings to a logic one state when a logic one input is applied to the corresponding input terminal.

The second function performed by the control I/O interface is to receive data retrieved from the storage group by address code. This is accomplished with receiver 46 of Figure 6A.
Receiver 46 operates in a manner similar to receiver 38 described above in the storage input/output interface, except that a corresponding logic 1 at the input terminal turns off the associated light emitting diode 434 and causes a logic 1 at the output terminal. .

The third function performed by the control input/output interface is the parity bit generation circuit 54 in FIG. 6B, which is similar to the parity bit generation circuit 54 shown in FIG. 5B. Check. Here, the parity bit P' is generated in a manner similar to the parity bit generated at the storage I/O interface, but with the address from the central control unit 20 of FIG. 2 and the data received from the storage group. The difference is that is used for the above purpose. This parity
Bit P' is then compared with the parity bit P received from the storage group and sent to central control unit 20.
generates a signal P _p to be transmitted to. If there is no parity error, then the signal P _p takes the logic value "0". However, if a parity error exists, then the signal P _p
becomes a logic "1" and instructs the central control unit 20 to discard data from the appropriate group for the corresponding rod and use only data from other groups to present the rod position. do.
The fourth function of the control input/output interface is to receive alarm and bottom signals from the central control unit 20, perform 2/3 logic (majority voting) or 1/3 logic (as will be described here), and The resulting signal is used to control the output relay. This is accomplished by a programmable buffer circuit 68 shown in FIG. 6B. circuits 436 and 438
are each three signals (from each control subunit within central control unit 20) 482, 484, 48
6 and 488, 490, 492. These signals have a logic value of "0" if the corresponding outputs 442 and 444 are requested to be deactivated.
becomes. When the fourth input 446, 448 is set to a logic "0" value, the circuit is programmed to deactivate the output when one or more of the three input signals are requested. If the fourth input is a logic "1", the circuit is programmed to deactivate the corresponding output when one or more of the three input signals is requested.
The third circuit 440 is a 1/3 circuit for a signal that provides a logic value "1" to request deactivation of the output. These circuits are connected as shown in Figure 18 so that the 2/3 logic is performed on the bottom of the bar signal and the 1/3 logic is performed on the alarm signal. Transistor 450 has a 150
It exhibits sufficient drive performance to drop down to milliampere.

This control input/output interface thus provides four functions that enhance the proper operation and maintenance of the entire device.

A central control unit 20, FIG. 2, contained within the reactor control room controls all important operations within the system, including sequencing, data processing, and error detection. As a result, in embodiments where two independent signal trains are used to transmit information, it is possible to use a common Represents an area. Therefore, to increase the reliability of the system, the central control unit 20 consists of three identical control subunits that operate identically. Control of the device by these three control subunits is accomplished by reliable majority logic that forms part of this invention. In this way, if one control subunit fails, the system continues to operate properly using the two remaining non-failed control subunits. Similarly, to control the control panel display and computer or another group of storage electronics,
Another buffered output is provided. The central control unit then performs three functions: data processing, including the necessary error detection as shown in FIG.
Generation of sequence signals as shown in the figure and failure detection of the central control unit as shown in FIG. 9 are performed. The interconnection of each control subunit is the 17th
18 and 19.

The circuit shown in FIG. 8 is used to generate the sequence signals shown in the timing diagram of FIG.
Circuit 70 includes a basic clock circuit that can be synchronized with two other basic clock circuits of a similar nature existing in two other control subunits. The basic clock circuit consists of two NAND gates 4
52 and 454, resistors 456 and 458, and capacitor 460, and has a typical period of 264 microseconds in this illustrative embodiment. Clock circuit 70 is synchronized by positive transitions on either sync input 1 or sync input 2. As a result, the fastest clock circuit in the control subunit synchronizes the other two clock circuits.
The clock circuit of each control subunit then drives a 2-bit counter 72. This counter 7
The outputs of 2 are used in circuit 74 to generate four strobe signals. As shown in the timing diagram of FIG. 10, strobe signal S1 is a logic 1 during the first 3/8 of each address period, strobe signal S2B is a logic 1 during the second half of each address period, Strobe signal S3B is a logic one during the third quarter of each address period, and strobe signal S4 is a logic one during the fourth quarter of each address period. These strobe signals are
The data processing circuit shown in FIG. 7 is used by display devices and in computer input/output interfaces. Should interference become a problem, strobe signals S2B and S3B can be temporarily disabled with input signal "BLANK" and its associated circuitry 75. This can prevent false information from displaying, alarming and updating computer input/output interfaces. The blank signal is sampled by the strobe signal S1 in the AND/OR selection memory 76 and is capacitively coupled so that a failure in the rod controller will not permanently disable the blank signal rod position indicator. To prevent the majority circuit from accidentally disconnecting a control subunit, when the blank signal times out in any one control subunit (when disconnecting after a design cycle),
It allows strobe signals on all control subunits. 2-bit counter 7 in Figure 8A
The last bit ²¹ of 2 then drives the 7-bit counter 78 of FIG. 8B to produce the 7-bit address code a1-a7. address·
The code first passes through an analog switch 80 controlled by a first level of majority logic and then through an output resistor 82 to each output terminal.
Output resistor 82 maintains isolation between the output terminals and maintains the second level implementation of majority logic with threshold logic. Since each output terminal is connected to a corresponding terminal or other control subunit before being distributed to the rest of the device, the voltage at that connection point and to the rest of the device is subject to majority voting. For example, if two control subunits provide a logic 1 at output terminal a1 and a third control subunit provides a logic 0, the resulting signal will be a logic 0 due to the voltage dividing action of output resistor 82. Let's put it into one state. Since the rest of the device controlled by this connection is a voltage controlled high impedance input with a threshold of approximately half the power supply, threshold logic is implemented and the signal is a logic one (of the three control subunits). 2 votes). nand gate 77,
Circuit 73, which utilizes analog switch 80 and output resistor 82, operates in a similar manner to distribute the inverted address signal. Two 7-bit
Circuit 84 illustrated between counters 78 and 86
resets 2-bit counter 72 and 7-bit counter 78 after the appropriate number of address cycles. A logic 0 at recirculation program terminal 88 causes counter 78 to be reset after 80 address signals, whereas a logic 1 at recirculation program terminal 88 causes counter 78 to be reset after 112 address signals (as desired by the device). (to include future extensions). The last bit of 7-bit counter 78 times a second 7-bit counter 86 to generate the illumination signal F' (approximately 3 Hz) and reset signals 1 and 2 as shown in the timing diagram of FIG. .

Circuit 90 is used to synchronize the counters once every complete cycle. Again, the counter synchronization input is sensed for a positive transition, and the first counter to complete the entire cycle synchronizes with the other two first counters by resetting all of its bits to a logic zero state. Synchronize with the count. GO signal terminal 92 assumes a logic 1 value whenever a display device is present and being addressed and strobed. This signal is used when the data is valid, i.e. the bar for the address being processed is
Used during data processing operations of the central control unit to activate the alarm circuit only when present.
Corresponding circuitry in conjunction with the GO signal is provided only to condition the signal to be compatible with the circuit shown in FIG. This auxiliary circuitry allows the device to be easily extended without complicating the internal circuitry used.

For each address code to be generated by the sequence section of the central control unit, the position of a particular rod is retrieved in Gray code form from the encoder through the storage and control input/output interfaces described above. For each Gray code, the P _p signal from the control input/output interface is applied to the input terminals of the central control unit shown in FIGS. 7 and 18. Diodes and resistors coupled in series to these input terminals provide additional retention to the COS/MOS circuit. The resistors associated with the inputs M _A and M _B from the local hold switches force these inputs to a logic zero value when floated. Gray code input α, β, γ,
σ and ε are determined by AND/OR selection units 462 and 4 controlled by circuit 94 of FIG. 7A.
64. If error code 11111 (α, β, γ, σ, ε,) is found in the Gray code, i.e. the corresponding P _p signal is a logic 1 indicating a parity error, or if the corresponding A hold switch (in combination with M _A or M _B ) that holds a group of data by forcing the M input (M _A in combination with signal train A and M _B in combination with signal train B) to a logical 1. If set to reject, then the data is discarded and replaced with another Gray code from another signal stream.
For example, if signal train B is affected, signal E _B has a logic value of 1, and this signal E _B is used to issue an emergency alarm and to display a bar displayed at half resolution on the display. issue a warning. The Gray code thus presented is the strobe signal S
1 (during 3/8 of each address period) by the wave memory 96. The Gray codes from each group are then compared by circuit 98 in Figure 7A. If there is a difference of more than one bit, then an error exists in one or both pieces of data, and E ₁ is equal to a logical value of 1 and activates with an emergency alert and indication of the bottom of the bar. Used to indicate general warnings regarding exposed rods. The two Gray codes stored and compared in this way are stored in the exclusive OR circuit 1
00 into a binary code and algebraically summed using adders 466 and 468.
The absolute position of the rod with the maximum possible precision in this respect is available in a binary code. AND/OR selection units 470 and 472 select the absolute position of the binary bar or select the illumination signal F' for distribution to the display. If the lighting signal F' is selected and its logic value is 1, no light emitting diodes are turned on except to provide a positive general warning, and if the lighting signal F' is a logic 0, the bottom light of the bar is commanded. Ru. The result is a flashing signal indicating the bottom condition of the rod, or an emergency alert provided by the jumper connection from terminals 474 to 476. The bar position to be displayed is passed through an analog switch 102 (if this control unit is not known to be faulty) and an output resistor 104 (here a second level of majority voting by threshold logic, i.e. (which performs a backup level) and reaches an output terminal for transmission to a display device. Diodes provide additional protection for COS/MOS circuits. The corresponding display data output terminals of all control subunits are
As shown in FIG. 18, they are wired in parallel for distribution to display devices. If adders 466 and 46
The true position (binary) of the bar from 8 is 39 in binary
(E ₃₉ ) (the Gray codes differ by more than one bit (E ₁ )), or if both Gray codes (E _A and E
If it is found that there is an error in _{circuit B} ) at the same time, then
An emergency alert signal (E _UA ) is generated at 06. Each of AND/OR select units 478 and 480 receives strobe signal S4 (the fourth quarter of each address period) for two consecutive cycles through the address code before being creamered by 1 or 2. However, two consecutive cycles of AND/OR selection unit 478 are gated by logic 1) to scan the error signals (E _A , E _B and E _UA and the bar bottom signal). As shown by signals 1 and 2 in the figure, only one complete cycle overlaps two consecutive cycles of AND/OR selection unit 480.AND/OR selection unit 47
The stored outputs of 8 and 480 are combined by the NOR logic circuit 108 of FIG. 7B to control the illuminated local alarm light guide and to provide final control of the alarm and bar bottom bistable circuits by relays in the control room. Provides output.

The third important function of the central control unit, the majority control function of the system, is performed by the circuit of FIG. 9, and the interconnections of this portion of the central control unit are as shown in FIG. Circuit 1 in Figure 9
10 compares all meaningful control signals generated by a particular control subunit with equivalent signals from the other two control subunits. If any signal does not match both equivalent signals,
The deviation control subunit is then assumed to have failed and is disconnected from the system by making the signal _DIS equal to a logical 1, opening all analog switches associated with the failed control subunit. This disables the local alarm on the activated control subunit and the output load of the failed subunit. This signal can be used to control a control panel display annunciator, either directly or in combination with an emergency or emergency alert. Additionally, any one of the
individual control subunits can be separated from the device. However, this function is ignored by circuit 114.
It is of paramount importance that all control subunits be disconnected from the device in no time, such as under multiple fault conditions. Therefore, priority is given to each control subunit. In this embodiment, the control subunit is given first priority so that it continues to control the device if the other two subunits are disconnected or excluded. If a control subunit is excluded, the control subunit with second priority will refuse to be detached if the control subunit has already been detached. Finally, if both the control subunit and are excluded, the control subunit will refuse to be disconnected under any circumstances. Priority is implemented by the interconnection of the control subunits as shown by the wiring diagram of FIG. All local and remote alarms continue to function even if disconnection of the control subunit is prevented.

Thus, a central control unit controls all important operations within the device and remains a common area for redundant detection and control of both the multiple units and the separate displays.

One display device is required for each bar to be monitored by the bar position indicator. Figures 11 and 12 show the display and its installation in the control room. Display devices serve two basic functions. 1st
The display device displays the location of each bar being monitored, including local alarms for each bar. Second, the display device is
Provides GO signal to central control unit. This allows the entire device to be expanded in a simplified manner requiring minimal back wiring.

The first function performed by the display device is the circuit 11 consisting of components 500, 502 and 504.
6 is implemented by all the circuits shown in FIG. A 6-bit binary code representing the bar position is distributed to input terminals D0 through D5 of all display devices as shown in FIG. 11A. Similarly, the general warning signal GW is distributed to the input terminals GW of all display devices. The address and strobe input terminals are connected to address lines from the control subunit so that each display device is assigned a unique address signal A1'-A7' as shown in FIG. 11A. Each unique address is created by interconnecting the display and address terminals. Diode 506 and resistor 508 are
Provides additional protection for COS/MOS circuits. 11th A
The illustrated circuit 118 functions as a latch with a microwave memory. The latch closes circuit 1 when all address and strobe inputs are logic 1.
20. The strobe input is S2B. Therefore, since each display is assigned a unique address, the latch is strobed only during the second half of the address period assigned by the back wiring and associated rods to that display.
The general warning thus stored is used to drive a general warning light emitting diode through NAND gate 510, resistor 512 and transistor 514. However, the 6-bit binary code must be decoded by NAND and NOR gates 122 to drive the matrix of light emitting diodes 124. Transistors 516-540 provide additional current drive capability. At a given time, one row and one column are selected such that only one light emitting diode in the matrix emits light. Each light emitting diode represents six steps of the control rod drive middle rod jack mechanism. The transition from one emission (eg 6) to the next emission (eg 12) occurs at the central position of the coil (eg 9). In Figure 11B,
Each bar position step and corresponding digital output code and light emitting diode are shown.

The second function performed by the display device is
The goal is to supply the GO signal to the central control unit. This is accomplished by components 500, 502 and 504 shown within circuit 116 in FIG. 11A. When a display is addressed and strobed it raises the common GO line to the central control unit, proving the presence of the display and thus alarming the bottom of the bar in progress and the bar selected by this address. Prove the necessity of checking. if
If the GO signal does not appear, then there is no display because no bar is being monitored by that address. In this way, a simple standard back wiring package is created that can handle the most anticipated future devices. Application to a specific device is achieved by inserting two encoders and one display device for each required number of devices or bars. Backside wiring is common and simple and can be accomplished by more economical means than manual point-to-point wiring. This includes automatic point-to-point wiring, busbar wiring and printed circuit technology.

In order to make an acceptable display device, the 12th
Several techniques similar to those shown are available. Here, display subunit 126 is mounted within a card cage 128 in the conventional manner. A furnace light 130 is provided on the front of the card cage to provide a low ambient light level into the card cage so that it provides good lighting from light off to light on. Provide contrast ratio. Because of this flexibility of the furnace light, a sturdy support panel 132 should be placed in front of the furnace light or preferably after it. This support panel can be grooved metal as shown, or flattened metal in all areas for control rod groups. A variant uses clean plexiglass or picture glass for the support plate. Here, glare from opposing light can be minimized by chemical treatment of the surface or by using a very dull surface. Letters can be written on the front and back of a clean support panel or in front of a furnace light.

The display device therefore indicates the position of each bar being monitored, including local alarms for each bar, and sends further signals to the central control unit, allowing a simplified expansion of the equipment to be used. supply

The function of the computer input/output interface is to put the rod position information into a form suitable for most computers. The computer input/output interface must obviously be compatible with existing hardware commonly available in most process computers. Contact closure input/output hardware is commonly available on most process computers, and one embodiment of the present invention is designed to be compatible with this. Although the resulting interface may be considered relatively slow, it is perfectly suitable for the purpose required by this device and is most compatible with a variety of equipment. Another requirement of the invention is that it is computer independent and operates under certain fault conditions, yet synchronizes the transmission of information to the computer in a simple and effective manner. That's true.
A large memory is provided at the computer input/output interface for this purpose and is designed to strobe all available rod position information. The memory is periodically updated with information provided by two 5-bit Gray codes and two parity bits. The computer can process the data in a manner similar to a central control unit in order to arrive at a different opinion regarding the bar position independently of the light emitting diode display. Moreover, the address
An interrupt is generated by the computer I/O interface whenever any data changes state during a cycle. In this way, the computer only needs to be read when needed.

A block diagram of the computer input/output interface is shown in FIG. 13, and its timing diagram is shown in FIG. Each address period is a strobe signal.
It is divided into three parts by SA, S3B and S4. During the first three quarters of each address period (controlled by SA and S3), the central control unit uses the computer input/output interface to determine changes in state and update information in memory. Control the face. Last 1/4 of each address period
(controlled by S4), control of the memory is looped back to the computer's contact closure input to allow the computer to read the position of any bar from the memory. Bar selection is determined by address selector 546 shown in FIG.

During the first half of each address period (controlled by SA), new data for the selected rod from the central control unit is stored into a 14-bit buffer 134 as shown in the block diagram of FIG.
The old data for that bar is 14x128 random
Addresses read from access memory (RAM) 542 and stored in a 14-bit buffer 140 and presented to the device by the computer contact closure output are stored in a 14-bit buffer 544.
During the third quarter of each address period (controlled by S3), new data for the selected bar position is written to the 14x128 RAM 542 and pre-empted into a 14-bit buffer 140. The matching detector 13 matches the old correspondence data stored in the SA during the duration of the SA.
Compare by 6. If there is a change of state, an interrupt is issued to the computer during the next address cycle by interrupt generator 138. During the fourth quarter of each address period, the address selector 5
46 returns control of the 14×128 RAM 542 to the address from the computer stored in the 14-bit buffer 544 in the SA. At this time, the data corresponding to the above address is read from the 14×128 RAM 542 and 14
The data is stored in the bit buffer 142. The output of this buffer 142 is transmitted to the computer through an interface 548. This process is repeated every address period. Therefore, there is a maximum delay of 2 milliseconds between the time the address contact close input is provided and the time the corresponding data to the computer is steady. An input/output card type compatible with this interface, Westinghouse
P-250 manufactured by Electric Corporation
A computer is shown in FIG. 13 as an example.

Circuit diagrams of the computer input/output interface are shown in FIGS. 15 and 16. As is clear from a comparison of this circuit diagram with the block diagram shown in FIG. 13, the 14-bit buffer 134 with filter (FIG. 13) is similar to the AND/OR selection units 550 to 550 of FIGS. 15A to 15C. 556 and related hardware. It should be understood that the circuit diagram of FIG. 16 is merely an extension of the circuit diagram of FIG. Coincidence detector 136 of FIG. 13 is accomplished with circuit 136 of FIG. 15D. The 14.times.128 RAM 542 is comprised of 64 bit RAMs 558-612 shown in FIGS. 15A-15C. The address selector 546 shown in FIG. 13 includes AND/OR selection units 614 and 616 of FIG. 16B, but the filter is represented by a resistor and capacitor associated therewith. The interrupt generator 138 in FIG.
This is shown by circuit 138 in Figure B. The 14-bit buffer 140 of FIG. 13 consists of quadruple latches 618-624 in the circuit 140 of FIG. 15D, and the 14-bit buffer 142 of FIG.
Quadruple latches 626-63 in circuit 142 shown.
Consists of 2. From the description made of the block diagram of FIG. 13, those skilled in the art can readily implement the circuits described above to provide specific functionality for a computer input/output interface. Signal interconnections are indicated by the same reference numerals.

The exemplary design (including subunit layout) provided as an example of this invention is designed to provide simplified interconnection of the above-described subunits that make up the apparatus of this invention. As a result, it can be expanded to a simple standard back wiring pattern that can be used in all rod position indicating devices including the present invention. Backside wiring can be performed using automatic point-to-point wiring, busbar wiring techniques including busbar wrapping, or printed circuit boards. Customization for a particular application is achieved by providing only the number of subunits necessary to monitor a moving member (in this example a control rod whose position is desired). achieved.

The control room electronics wiring is shown in FIGS. 17, 18, 19 and 20. These figures show the input/output interfaces and interconnections between the control and display subunits. Again, this approach provides a standard back wiring pattern to be used for all devices where customization is accomplished by providing only the display subunits that correspond to the bars actually present.

Although the interconnections of the components and their individual operational descriptions are directed to the application of detecting the position of control rods in a nuclear reactor, the invention has applicability to a wide range of position indicating devices, and in particular to one degree of freedom (one degree of freedom). degree of
It is particularly applicable in the field where it is used to monitor elongated movable members with free demodulation. In this field, the analogy for controlling rod position indication is directly applicable.

Although the plant computer is not directly part of this invention, the computer input/output interface allows the invention to be used almost universally with any digital computer. The plant computer receives position information for each rod through an input/output interface for data measurements, rod variations, and other comparisons. In an effort to minimize the amount of equipment between the computer and the sensor, the data supplied to the computer is supplied in the form of a Gray code train just received from the storage group, thus providing the true bar position. requires little processing.

As the location device cycles through its multiplex sequence, it checks the information in each address against the previous information obtained during the last cycle. If the information changes, the position pointing device issues an interrupt to the computer during the next address cycle.
The computer scans this interrupt once every 8 seconds. If an interrupt occurs, the computer enters the status of the next bar present. This is done by using the contact closure output to present the address of the desired rod.
and by reading the information presented by the pointing device after a 9 millisecond hardware delay. As each piece of data is read, a new address can be set. Each piece of data must be processed to determine the true bar position before being stored for later use. Each of the five Gray codes and parity bits must be checked for parity errors and error codes. Even parity is used and the error code is shown in Figure 4C. The Gray code is converted to a binary code as shown in Figure 3C. If no error is found, the true bar position (step) is
Obtained by adding the bit binary codes and multiplying by 5. If an error is found in any one Gray code, the true bar position is determined by adding itself to the remaining good binary code, multiplying by 6, and adding or subtracting 3 (if the error is found in column A data If the error is found in the B column data, add 3, and if the error is found in the B column data, subtract 3). If errors of magnitude greater than 1 are found in both the Gray code and the binary code, the true bar position should be stored in the bar bottom state (00000). The resulting true rod position can be searched against rod bottom information when desired by using the criterion that the rod is smaller than four steps. A rod bottom contact closure output is available from the position indicating device, if desired. The true location can then be stored and the accompanying code indicates the type of error found. The final deviations can be compared using the criteria below. That is, (1) if all bars being compared are at full accuracy (no errors), a bar deviation alarm should only be issued when a deviation of 9 steps or more is found; and (2) if all bars being compared If any bar is in half-precision (an error was found in the Gray code in column A or column B), an alarm will be raised only if this bar deviates by more than 13 steps from the other bars. and (3) if the position of any bar being compared is unknown (more than one different error was found in the Gray code or in the binary code of columns A and B). , then any comparison involving this bar should raise an alarm.

Accordingly, a program to complete this technique can be assembled by one skilled in the art utilizing the input provided by the computer input/output interface of the present invention.

Accordingly, the new position pointing device contemplated by the present invention and herein described provides several improvements over existing devices. Unlike existing devices, it utilizes the same coil with unique properties that are not affected by temperature changes, variations in magnetic properties, power fluctuations, magnetized diameter of the bar, etc. Additionally, the device has the ability to recover from large and low malfunctions with only a small loss of resolution for the component being detected. By applying multiplexing, expensive wiring is reduced, all previously used bar-bottom bistables are eliminated, computer input/output hardware is minimized, and the equipment is digitalized. The initial accuracy, which does not require calibration, is maintained throughout. On top of that,
Light emitting diode. The matrix provides a clean, reliable and inexpensive display device.

The redundancy system will now be described with reference to FIGS. 21-25.

An excellent mode of fault detection and correction as provided by this invention is majority logic (3
(Threshold logic). A simple implementation of this concept can be done in two ways. First, a centralized majority voting scheme can be used as shown in FIG. Second, distributed majority voting can be used as shown in FIG.

In the centralized majority voting configuration of FIG. 21, three control subunits, and. The control subunits and their three corresponding output signals are processed by a common majority circuit called the threshold logic circuit. The output obtained from this majority circuit is distributed to the various display subunits 1-75. Although the circuit configuration shown provides redundancy, clearly the reliability of the device is now limited by the reliability of the common majority circuit (as it was previously limited by the common central control unit). Ru. This approach can be successfully implemented if the reliability of the majority voting circuit is much higher than that of the central control unit. This criterion can be easily met from the illustrated circuit arrangement, which utilizes common electrical components, and in view of the complex nature of the functions performed by the central control unit. The desirability of this configuration is limited only by the standard reliability required by the particular application.

In the distributed majority voting circuit shown in FIG. 22, the outputs from and to the individual control subunits are distributed to each of the individual display subunits 1-75 for individual majority voting. This approach reduces the probability of catastrophic failure by requiring complex wiring and a significant amount of additional circuitry, increasing the probability of individual and independent failures and thus reducing overall equipment maintenance. gives greater reliability at the cost of lower The need to use either embodiment depends on the degree of reliability required for the particular application.

A preferred variant contemplated by the present invention is shown in FIG. This variant necessarily improves the reliability of the common central control unit in the simplest possible manner, without degrading its cost, size and maintenance characteristics, of the digital rod position indicating device. Improve reliability.

In the apparatus shown in FIG. 23, the single central control unit is replaced by three identical control subunits, which control the apparatus on a majority vote basis. All control subunits should receive the same inputs from the redundant sections of the equipment and then respond in the same manner unless a failure occurs elsewhere. For more reliable operation, the majority voting function is implemented twice at two successive levels in two different ways, firstly digitally and secondly analogously (threshold logic). Each output of the same signal is provided to a redundant display subunit 1-75 so that failure of one display subunit in the pair does not affect the performance of the other display subunit.

Digital methods use identical circuitry within each control subunit to control its connection to the device. The first level majority circuit compares each output signal from its respective control subunit with other outputs from the other two control subunits. If one signal differs from both corresponding signals, the majority circuit determines that the fault exists within its own control subunit and controls an analog switch (not shown) in series with each signal output. possibly automatically disconnecting its output from the rest of the device. If a fault is detected, an alarm is issued locally and by a control annunciator within the reactor control room.

An analog method representing a highly effective combination of the two approaches shown in FIGS. 21 and 22 is achieved by placing a resistor R _W in series with each output signal before forming the control subunit. Each signal is tied to each of the other two corresponding signals before being distributed to the rest of the system as shown in FIG.

As a result, the three basic functions of a threshold logic majority circuit (weighting of input signals, addition of weighted signals, and comparison of summed signals with threshold levels) are as shown in FIG. 24, which is a functional replica of FIG. 23. Separated by various equipment blocks. As a result of the threshold characteristics and the high input impedance of the complementary MOS logic group (which is particularly suitable for use in this invention), a resistor R _W , respectively, in series with each signal output.
By means of a common bus connection of the output signals, a gate on the input side of each display subunit, the above-mentioned function is accomplished in the simplest, most effective and reliable manner. The bus voltage follows the conditions provided by the majority of the coupled signals and is determined by a simple resistive voltage divider. Since the NAND gate shown in the display subunit has a representative threshold of half the power supplies, the resulting threshold logic performs the desired majority voting function. A distinct advantage of the invention in this particular application is that it utilizes existing digital components to perform functions normally represented for additional analog components such as operational amplifiers and level detectors. . Moreover, because the NAND gates are distributed throughout the device, there are no active components that can fail and cause all display subunits to fail simultaneously. The actual component added to the device is a weighted resistor R _W which is very reliable and very inexpensive and provides current limiting protection against transient voltages generated on the busbar.

If the thresholds of the selected digital components vary excessively and must be matched to a completely worst-case design, a low supply voltage between the supply voltages used by the central control unit to power the display subunits is required. It is possible to compress the threshold band by using voltage floating. For example, the display subunit may be powered by a +15 volt power source.
It can be powered by 13.5 volts and +1.5 volts using four diodes and one resistor as shown in FIG.

As previously mentioned, if the signal output from one control subunit does not match the corresponding signals from the other two control subunits, this control subunit is assumed to have failed and the device is disconnected. , control is left to the remaining two control subunits. In certain applications for controlling rod position indication, and in many other applications, it is desirable to take no time at all to disconnect all control subunits from the device, as would be the case under multiple fault conditions. is important. Therefore, priority is given to each control subunit to control the order of detachment. The back wiring of such ordered priorities as well as the individual components making up the majority circuit and control subunit have been described previously in this specification. In the illustrated system, the control subunit is given first priority so that it continues to control the system if either of the other two control subunits is disconnected or excluded. If a control subunit is excluded, the control subunit with second priority will refuse to be detached if the control subunit is already detached. Finally, if both the control subunit and are excluded, the control subunit will refuse to be disconnected under any conditions. In the circuit described above,
All local and remote alarms continue to operate even if the control subunit is disconnected and thus prevented from recognizing the fault and indicating its location.

Accordingly, herein is disclosed a totally redundant digital rod position indicating system using redundant signals processed by separate sections utilizing automatic detection of most failures. The two groups of signals are processed by a central control unit to obtain redundant readings of the full resolution most needed. The invention has been described as using three separate control subunits. Each digital output signal from each control subunit is compared with the corresponding outputs from the other two control subunits, and if the local signal exhibits a difference from both other corresponding signals, a majority vote for that control subunit is determined. A state is established and its output is disconnected (first level majority vote). A second level of majority voting determines whether each input of the read/receive unit is connected by comparing the weighted sum voltage of the corresponding outputs (from the three control subunits) applied to the common point to the threshold voltage of each input. It happens on the side. By distributing the majority threshold logic to three different sections of the device, more reliable operation is obtained without reducing the maintenance of the device. The majority decision concept aimed at with this invention is
It is significant that it can be applied to a wide range of redundant devices that utilize similar inputs. The benefits of extending the redundancy of such devices and providing local fault detection methods increase reliability and make the transmitted information reliable.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing a nuclear reactor control rod and its associated drive rod and rod advancement housing together with basic sensors used in the present invention; FIG. 2 is a block diagram of an embodiment of the present invention; FIG. The figure is the first
Figures 3B and 3C are graphs and tables showing the electrical interaction between the respective devices; Figures 4A and 4B
The figure is a circuit diagram of the encoder in Figure 2, Figure 4C is a table showing the codes generated by the encoder, and Figure 5A is a circuit diagram of the encoder in Figure 2.
Figures 6A and 5B are circuit diagrams of the storage input/output interface in Figure 2, Figures 6A and 6B are circuit diagrams of the control input/output interface in Figure 2, and Figures 7A and 7B are circuit diagrams of the control input/output interface in Figure 2. FIG. 2 is a circuit diagram of the data processing section of the central control unit, FIGS. 8A and 8B are circuit diagrams of the sequence section of the central control unit, FIG. 9 is a circuit diagram of the failure detection section of the central control unit, and FIG. 11A and 11B are circuit diagrams of the display device shown in FIG. 2, FIG. 12 is a perspective view of the display device, and FIG. 13 is a time diagram showing the operating time of the central control unit. A block diagram of the computer input/output interface, FIG. 14 is a time diagram showing the operation time of the computer input/output interface of FIG. 13, and FIGS.
16A and 16B are circuit diagrams of other parts of the computer input/output interface shown in FIG. 21 is a block diagram of a part of the embodiment of FIG. 2, and FIG. 22 is a block diagram of a modified version of the embodiment of FIG. 21. 23
The figure is a block diagram that is a further modification of the embodiment shown in FIG. 21, and FIG. 24 is a block diagram that is a modification of the embodiment shown in FIG. 23.
FIG. 25 is a circuit diagram that is a further modification of FIGS. 21 to 24.

Claims (1)

[Claims] 1 for digitally indicating the position of an elongated movable member having one degree of freedom along its longitudinal axis.
a plurality of interpolated sensors arranged in tandem near said longitudinal axis in two separate groups for generating electrical output signals, and for comparing and selectively utilizing said electrical output signals; means for indicating the position of the movable member relative to the sensor;
The means includes: an encoder operative with said electrical output signal to provide a digitally encoded output representative of sensor position; an interface for transmitting the digitally encoded output and generating, sequencing and transmitting said corresponding command address signals to the interface for transmitting and adaptively receiving said digitally encoded output; A position indicating device including a control unit operative at the output to provide a decoded display signal output representative of the sensor position, and a display device responsive to the display signal output to provide a visual indication of the sensor position.