JPS623485B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a recording circuit for a tape recorder that allows recording in an optimal state at all times.

In order to be able to record and play back the original sound as faithfully as possible on a tape recorder, it is generally possible to switch recording conditions according to the type of tape being used, and select the conditions for each tape being used. ing.

However, there are many types of tapes on the market, and even tapes of the same type have variations in performance depending on the individual tapes, so it is difficult to switch and obtain the optimum recording condition.

The present invention provides a recording circuit for a tape recorder that allows an optimum recording condition to be obtained while recording.

The present invention will be explained below with reference to the drawings. Reference numeral 1 denotes a tape for recording information, which is brought into contact with an erasing head 2, a recording head 3, and a reproducing head 4 in this order.

Reference numeral 5 denotes a recording circuit connected to the recording head 3, a recording amplifier 7 connected to a recording signal source 6 such as a microphone or a tuner, and a variable characteristic recording amplifier whose frequency characteristics change depending on the magnitude of the applied DC signal. 8, a bias trap 9 and a bias oscillation circuit 10. 11 is playback head 4
A reproducing circuit connected to the reproducing circuit includes a reproducing preamplifier 12 and a reproducing amplifier 13. A first integral holding circuit 15 is connected to the recording amplifier 7 via a band filter 16 that passes only the frequency signal to be compensated, and temporarily integrates and holds the recording signal to be recorded. A second integral holding circuit 17 is connected to the reproduction preamplifier 12 via a band filter 18 having the same pass frequency as described above, and integrates and holds the reproduced signal reproduced by the reproduction head 4 in the same manner as described above.

19 is a comparison circuit that compares the outputs of the first integration holding circuit 15 and the second integration holding circuit 17; 20 is a gate circuit that gates the output of the comparison circuit 19; 21, 22, and 23 are the first and second integration holding circuits; This is a monostable multivibrator that controls the integral holding circuits 15 and 17 and the gate circuit 20. 24 is an astable multivibrator, a part of the generated pulse signal is directly applied to the first integral holding circuit 15 and the monostable multivibrator 21, and the rest of the generated pulse signal is applied via the frequency dividing circuit 25. second
Integral holding circuit 17, monostable multivibrator 2
2, 23.

26 is a control circuit that controls the clock frequency of the input of the frequency dividing circuit 25;
A rotation detector 27 that detects the rotation speed of a rotating body related to the running speed of the rotation body, a waveform shaping circuit 28 that shapes the signal detected by the rotation detector 27 into a rectangular wave signal, and a PLL circuit 32. . The PLL circuit 32 includes a phase comparison circuit 30 and a voltage controlled oscillation circuit 31, to which the rectangular wave signal is applied to one input and the output of the frequency divider 29 is applied to the other input.

Next, the operation of the present invention will be explained. A recording signal from a recording signal source 6 (FIG. 2D) is applied to the recording head 2 via a recording amplifier 7 and a variable characteristic recording amplifier 8 together with a bias signal from a bias oscillation circuit 10, and is recorded onto the tape 1. A part of the recording signal is applied to the first integral holding circuit 15 through the bandpass filter 16, where it is integrated (FIG. 2(e)) and held (FIG. 2(f)).

On the other hand, the signal recorded on tape 1 is sent to playback head 4.
is played back by the playback preamplifier 12 and the playback amplifier 1.
3 and drives the speaker 14. The reproduction signal amplified by the reproduction preamplifier 12 (FIG. 2 H) is filtered by a band filter 18, integrated by a second integral holding circuit 17 (FIG. 2 R), and held (FIG. 2 N). .

The outputs of the first integral holding circuit 15 and the second integral holding circuit 17 are then added to the comparing circuit 19 for comparison. If the distance between them is l and the tape speed is v, then there is a time difference of Δt=l/v.

Therefore, after the recording signal is held in the first integral holding circuit 15, it is played back in the playback head 14 after Δt seconds.
It is necessary to compare the signal held in the second integral holding circuit 17.

Therefore, at the rising edge of the pulse signal of the astable multivibrator 24 (Fig. 2 C), the first integral holding circuit 1
5, and at the same time, the maximum peak value of the integrated value of the recording signal that arrives while the monostable multivibrator 21 is being inverted is held.

On the other hand, the second integral holding circuit 17 receives a frequency-divided pulse signal (FIG. 2-T) obtained by dividing the clock pulse signal (FIG. 2-B) from the control circuit 26 by the frequency dividing circuit 25.
is added. This frequency-divided pulse signal has the same rising edge as the pulse signal from the astable multivibrator 24, and the Δt is made to be the same time, so that the second integral holding circuit 17 is connected to the frequency-divided pulse signal. If the operation is performed at the falling edge of the signal, the operation start time of the second integral holding circuit 17 will be delayed by Δt, so that the reproduced signal at the same time as that held in the first integral holding circuit 15 will be transferred to the second integral holding circuit 17. is also retained.

At this time, the astable multivibrator 22 is inverted by the frequency-divided pulse signal, and the maximum peak value of the integrated value of the reproduced signal within the same time as above is held, and held in the first and second integral holding circuits 15 and 17. Compare the signals. Monostable multivibrator 22
When is restored, the monostable multivibrator 23 is inverted, turning on the gate circuit 20.
If there is a difference between the signals compared by the comparison circuit 19, a positive or negative signal is generated from the comparison circuit 19 (see FIG. 2), and the frequency characteristics of the variable characteristic recording amplifier 8 are changed to compensate.

Although the case where only one frequency signal is compensated has been described, if it is desired to compensate for several frequency signals, it is sufficient to provide a band filter and an integral holding circuit corresponding to each frequency to be compensated.

Although the case where the frequency characteristics of the variable characteristic amplifier 8 are compensated has been described above, the gain of the variable characteristic amplifier 8 can also be compensated.

By the way, the delay time Δt naturally changes if the tape speed changes.

The control circuit 26 compensates for this, and the rotation detection circuit 27 detects the rotation of the flywheel, etc., which is related to the running speed of the tape 1, generates a clock pulse signal according to the rotation speed, and the waveform shaping circuit 28
Shape the waveform with to obtain a rectangular wave signal (Fig. 2 A), and
It is added to the phase comparison circuit 30 of the circuit 32. Thereupon, it is compared with a frequency-divided signal obtained by dividing the output by 1/n by the frequency divider 29.

If the phases of the comparison signal and the frequency-divided signal match, the phase comparison circuit 30 will not generate a control signal and the voltage-controlled oscillation circuit 31 will continue to oscillate at the same frequency (see Figure 2, bottom). ), frequency dividing circuit 25
The frequency of the divided pulse signal is constant.

However, if the rotation speed of the flywheel changes due to changes in the load, etc., the frequency of the clock pulse signal from the rotation detector 27 will change, so a phase difference will occur between the comparison signal and the frequency-divided signal. A control signal is generated, and the oscillation frequency of the variable voltage oscillation circuit 31 is known.

This oscillation frequency increases by 5% if the rotational speed changes by 5%.
%, the frequency-divided pulse signal generated by the frequency dividing circuit 25 (Fig. 2) is also changed by 5% to compensate for fluctuations in the running of the tape 1, so that even if the speed of the tape 1 changes, the first The reproduced signal at the same time as that held in the integral holding circuit 15 is transferred to the second integral holding circuit 17.
is also retained.

As described above, in the recording circuit of the tape recorder of the present invention, the frequency dividing pulse signal of the frequency dividing circuit that generates the frequency dividing pulse signal used for controlling the integral holding time of the second integral holding circuit is adjusted to the tape speed by the control circuit. Since the tape speed is changed accordingly, even if the tape speed changes, the second integral holding circuit integrally holds the reproduction signal at the same time as the recorded signal integrally held in the first integral holding circuit. Therefore, even if the tape speed changes, the comparator circuit can compare the same signals, so the recording circuit can always be kept in the best condition.

[Brief explanation of the drawing]

FIG. 1 is a recording circuit diagram of a tape recorder according to the present invention, and FIG. 2 is a signal waveform diagram of each part of the present invention. DESCRIPTION OF SYMBOLS 1... Tape, 3... Recording head, 4... Playback head, 5 ... Recording circuit, 8... Variable characteristic amplifier, 11... Playback circuit, 15... First integral holding circuit, 17... Second Integral holding circuit, 19... Comparison circuit, 20... Gate circuit, 24... Astable multivibrator, 25... Frequency dividing circuit, 26 ... Control circuit.

Claims (1)

[Claims] 1 A comparison circuit compares the signal of the first integral holding circuit that integrally holds the recorded signal to be recorded on the tape with the signal of the second integral holding circuit that integrally holds the reproduced signal obtained by reproducing the recorded signal with the playback head. and the output of the comparison circuit compensates for the characteristics of a compensation circuit connected to the recording signal processing system, wherein a pulse signal is generated for controlling the integral holding time of the first integral holding circuit. a frequency dividing circuit that uses the pulse signal as a trigger to generate a frequency dividing signal that controls the integral holding time of a second integral holding circuit; and a frequency dividing circuit that changes the input frequency of the frequency dividing circuit in accordance with the tape speed. A control circuit is provided to change the integral holding start time of the second integral holding circuit in accordance with the tape speed, and to cause the second integral holding circuit to record integrally held in the first integral holding circuit irrespective of fluctuations in tape speed. A recording circuit for a tape recorder, characterized in that a reproduction signal at the same time as a signal is integrally held.