JPS6235541A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS6235541A
JPS6235541A JP17480785A JP17480785A JPS6235541A JP S6235541 A JPS6235541 A JP S6235541A JP 17480785 A JP17480785 A JP 17480785A JP 17480785 A JP17480785 A JP 17480785A JP S6235541 A JPS6235541 A JP S6235541A
Authority
JP
Japan
Prior art keywords
wafer
wirings
aluminum wiring
chip
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17480785A
Other languages
Japanese (ja)
Inventor
Yutaka Maruo
丸尾 豊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP17480785A priority Critical patent/JPS6235541A/en
Publication of JPS6235541A publication Critical patent/JPS6235541A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To accurately inspect an IC chip on a wafer by forming irregular surfaces on aluminum wirings which run in parallel with a scribing line on the wafer. CONSTITUTION:Irregular surfaces are formed on aluminum wirings 1, 2 which run in parallel with a scribing line 3 on an IC wafer. According to this structure, since resistance value and floating capacity of the wirings depend on the width of the wirings, they are different according to the size of the width of the wirings, but are the same characteristics as those of the conventional one. Further, the irregular surfaces of the wirings are not erroneously recognized to be scribing lines, and a correct position of a chip on the wafer can be recognized.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体集積回路(以下、■a)のアルミ配線
の構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of aluminum wiring for semiconductor integrated circuits (hereinafter referred to as ``a'').

〔発明の概要〕[Summary of the invention]

ICウェハー上のチップを、オートプロパーにより、自
動的に検査する場合、チップの正確な位置を知る几めK
、チップ間の境界となるスクライブラインを認識する必
要がある。
When automatically inspecting chips on an IC wafer using autoproper, there is no way to know the exact location of the chip.
, it is necessary to recognize the scribe lines that form the boundaries between chips.

本発明は、ICのアルミ配線の構造において、ICウェ
ハー上のスクライブラインに対して、平行なアルミ配線
に凹凸をも比すことにより、アルミ配線をスライプライ
ンと誤認識することを防ぎ工0の正確な検査を行なえる
ようにし几ものである。
In the structure of the aluminum wiring of an IC, the present invention prevents the aluminum wiring from being mistakenly recognized as a slide line by comparing the unevenness of the aluminum wiring parallel to the scribe line on the IC wafer. It is a method that allows for accurate testing.

〔従来の技術〕[Conventional technology]

従来の工Cチップのアルミ線は、f82図に示スように
、スクライブラインと平行な場合でも、一定の幅をもっ
た直線であっ友。
As shown in figure f82, the aluminum wire of the conventional C-chip is a straight line with a constant width even when it is parallel to the scribe line.

〔発明が解決しようとする問題点及び目的〕しかし、前
述の従来技術は、スクライブラインと平行に走るアルミ
配線をいずれか一定幅である為に、スクライブラインと
誤認識してしまうおそれ6”−ある。
[Problems and objects to be solved by the invention] However, in the above-mentioned conventional technology, since the aluminum wiring running parallel to the scribe line has a certain width, there is a risk that it may be mistakenly recognized as a scribe line. be.

そのなめ、ICチップの正しい位置が、認識されず、工
Oの検査において、良品を不良品と判定することがある
Therefore, the correct position of the IC chip may not be recognized, and a good product may be determined to be a defective product during a factory inspection.

そこで、本発明は、このような問題点を解決するもので
あり、その目的とするところは、工Cの誤っ九検査が、
行なわれることを防ぐアルミ配線を提供するところにあ
る。
Therefore, the present invention is intended to solve such problems, and its purpose is to solve the problem that engineering C's error nine inspection
The purpose is to provide aluminum wiring that prevents damage from occurring.

〔問題点を解決する九めの手段〕[Ninth way to solve the problem]

本発明の半導体集積回路は、ウェハー上のスクライブラ
インと平行に走るアルミ配線に凹凸をつけたことを特徴
とする。
The semiconductor integrated circuit of the present invention is characterized in that the aluminum wiring running parallel to the scribe line on the wafer has irregularities.

〔実施例〕〔Example〕

工Cの検査を行なう定めには、ウェハー上の1つのチッ
プの正確な位置を検出する必要がある。
The requirements for testing process C require detecting the exact location of a single chip on a wafer.

1枚のウェハー上のチップとチップの間は、スクライブ
ラインといわれる一定の幅をもった直線によって区切ら
れている。
Chips on a single wafer are separated by straight lines with a constant width called scribe lines.

そこで、この°スクライブラインを知ることによってウ
ェハー上のチップの正確な位置がわかる。
Therefore, by knowing this scribe line, the exact location of the chip on the wafer can be determined.

一般に、機械によって、自動的にスクライブラインを検
出する場合、レーザー光線をウェハー表面に放ち、その
反射光によって、ウェハー上の段差が認識できる。
Generally, when a scribe line is automatically detected by a machine, a laser beam is emitted onto the wafer surface, and a step difference on the wafer can be recognized by the reflected light.

第1図は1本発明の実施例における工Cウェハーの平面
図であって、1.2はアルミ線で、3けスクライブライ
ンである。
FIG. 1 is a plan view of a processed C wafer in an embodiment of the present invention, in which reference numerals 1 and 2 are aluminum wires and three scribe lines.

この構造によれば、アルミ配線のもつ抵抗値や浮遊容量
は、アルミ配線の幅に依存するため、アルミ配線の幅の
大小により異なるh″−1総合的に従来と同等の特性で
ある。
According to this structure, since the resistance value and stray capacitance of the aluminum wiring depend on the width of the aluminum wiring, h''-1, which varies depending on the width of the aluminum wiring, has overall characteristics equivalent to those of the conventional one.

しかも、アルミ配線のもつ凹凸により、スクライブライ
ンと誤認識されることがなく、ウェノ・−上のチ9プの
正しい位置をg識することができる。
Moreover, the unevenness of the aluminum wiring prevents it from being mistakenly recognized as a scribe line, and the correct position of the chip on the wire can be determined.

尚、本実施例は、スクライブラインに平行に2本のアル
ミ配線/l”−存在し、その形状は相互に凹凸をもつも
のであるが、アルミ配線の本数は、何本でもよく、その
形状は一定の幅をもっていなければどんな形状でもよい
In this example, there are two aluminum wires/l"- in parallel to the scribe line, and the shape is uneven. However, the number of aluminum wires may be any number, and the shape can be of any shape as long as it does not have a certain width.

又、本発明の場合、スクライブラインの形状は変えず、
アルミ配線の形状を変え之b;、逆にアルミ配線の形状
を変えずに、スクライブラインの形状を変え、機械の側
の判定条件をそのスクライブラインにあわせることによ
って、チップの正確な位置を知ることもできる。
In addition, in the case of the present invention, the shape of the scribe line is not changed;
By changing the shape of the aluminum wiring, and conversely, changing the shape of the scribe line without changing the shape of the aluminum wiring and adjusting the judgment conditions on the machine to the scribe line, the exact position of the chip can be determined. You can also do that.

〔発明の効果〕〔Effect of the invention〕

本発明は、以上述べ之ように、単にアルミ配線の構造を
かえることにより、ウェハー上のICチップのゆ査を正
確に行えるという効果を有する。
As described above, the present invention has the effect that IC chips on a wafer can be precisely scanned simply by changing the structure of the aluminum wiring.

【図面の簡単な説明】[Brief explanation of the drawing]

I!1図は、本発明の実施例としてのアルミ配線の平面
図。 第2図社)は、ウェハ一平面図、第2図(b)は、従来
のアルミ配線の平面図。 1、2.5.6  ・・・・・・アルミ配線3・・・・
・・スクライブライン 4・・・・・・ウェハー 以  上
I! FIG. 1 is a plan view of aluminum wiring as an example of the present invention. Fig. 2(b) is a plan view of a wafer, and Fig. 2(b) is a plan view of a conventional aluminum wiring. 1, 2.5.6 ... Aluminum wiring 3 ...
・・・Scribe line 4・・・Wafer or more

Claims (1)

【特許請求の範囲】[Claims] 半導体集積回路のウェハー上のスクライブラインと平行
に走るアルミ配線に凹凸をつけたことを特徴とした半導
体集積回路。
A semiconductor integrated circuit is characterized by uneven aluminum wiring that runs parallel to the scribe lines on the semiconductor integrated circuit wafer.
JP17480785A 1985-08-08 1985-08-08 Semiconductor integrated circuit Pending JPS6235541A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17480785A JPS6235541A (en) 1985-08-08 1985-08-08 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17480785A JPS6235541A (en) 1985-08-08 1985-08-08 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS6235541A true JPS6235541A (en) 1987-02-16

Family

ID=15985005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17480785A Pending JPS6235541A (en) 1985-08-08 1985-08-08 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS6235541A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0396471A (en) * 1989-09-06 1991-04-22 Daifuku Co Ltd Electric car for carriage
KR100892338B1 (en) 2007-10-31 2009-04-08 주식회사 하이닉스반도체 Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0396471A (en) * 1989-09-06 1991-04-22 Daifuku Co Ltd Electric car for carriage
KR100892338B1 (en) 2007-10-31 2009-04-08 주식회사 하이닉스반도체 Semiconductor device

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