JPS6237799B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for creating memory information in a speech synthesis device using compressed speech information (hereinafter referred to as speech data).

In recent years, research on speech has progressed rapidly, and speech data compression methods such as the delta modulation method, formant information extraction method, and partial autocorrelation coefficient extraction method have been developed. A speech synthesis device that synthesizes speech based on speech data has been realized.

FIG. 1 shows such a speech synthesizer using speech data compression means based on delta modulation. In the figure, 1 is the first memory that stores audio data, and this audio data stores the changing state of the audio waveform, and each sampling value of the audio waveform sampled at about 64KHz is the first memory that stores the audio data. This is a binary code that is addressed in 8-bit units, with a value of 1 if it is greater than the previous sampled value, and 0 if it is less than the previous sampled value. 2 is an address register for specifying the address of the first memory 1, 3 is a second memory in which the order of address specification by the address register 2 is stored, and 4 is read from the specified address of the first memory 1. 1 from audio data
This is a multiplexer that sequentially outputs codes bit by bit, and the period of this output is equal to the sampling period of the audio waveform mentioned above. 5 is a speech synthesizer that synthesizes a speech waveform based on the codes obtained from the multiplexer 4 one bit at a time; 6 is an amplifier that amplifies the speech signal from the speech synthesizer, and drives the speaker 7; It is something to do. A control section 8 controls the operations of the address register 2, multiplexer 4, first memory 1, and second memory 3 described above.

Such a speech synthesizer has a speech waveform of 10 to 20 meters.
Focusing on the fact that it is stationary in a short period of sec, only part of the audio data of the part that is considered to be the same waveform in this stationary section is stored in the first memory 1, and this audio data is stored in the first memory 1. The second memory 3 is provided as a means for repeatedly using audio data of the same waveform portion when resynthesizing waveforms, and the overall audio data is compressed, but two memories are required. As a result, the number of data lines such as address lines increases, making the configuration complicated.
It was also disadvantageous in terms of cost.

The present invention has been made in view of the above points, and is intended to realize a speech synthesis device using a single memory structure storing control information including processing instructions for the speech data as well as the above-mentioned speech data. This provides a method for creating memory information.

FIG. 2 is a block diagram showing an embodiment of a speech synthesis device employing the method of the present invention. In the figure, 4 to 7 are multiplexers similar to those in Figure 1.
It is a speaker, and 9 is a read-only memory (hereinafter abbreviated as ROM) with 8 bits per word.
Audio data subjected to delta modulation (sampling frequency 64KHz) similar to the device shown in Figure 1, and control information that controls the flow of audio data such as branch commands and branch-and-loop commands, that is, controls the readout of audio data. are addressed and stored in a predetermined order. 10 is applicable
An address counter 11 specifies the address of the ROM 9, and a counter 11 counts at the sampling period of the audio waveform.
The period of output of each bit from the is determined.
12 is a decoder for decoding the control information of the ROM 9 designated by the address counter 9;
A control section 13 controls the operations of the address counter 10 and counter 11 described above based on control information obtained from the decoder 12.

Here, to explain in more detail the memory information stored in the ROM 9, which is a feature of the present invention, control information such as branch-and-loop commands as the memory information includes codes that are infrequent as audio data. Allocate a specific binary code based on a combination of one 1 and seven 0s and a binary code based on a combination of one 0 and seven 1s, and furthermore, assign this specific one as memory information. The audio data represented by the binary code is converted into other approximate audio data that is substantially approximate to this audio data.

In this embodiment, since a binary code in which the audio waveform is delta-modulated is used as the audio data, the audio data represented by the above-mentioned specific binary code has 1 or 0 out of 8 bits. It is appropriate to approximate it with audio data expressed as a binary code shifted by several bits, and all 0s and all 1s.
There is no practical problem even if it is approximated by the binary code of
For example, 00100000 and 00000100 in the control information.
If 11011111 and 11111011 are assigned, the original audio data represented by these binary codes will be 01000000, 00000010, and 10111111, respectively.
11111101, which is an optimal approximation that preserves the displacement state of 1 bit. Furthermore, even if the first two audio data are represented by a binary code of all 0's and the latter two audio data are represented by a binary code of all 1's, this is a substantially problem-free approximation.

Next, the specific operation of the speech synthesis apparatus employing the method of the present invention will be explained. In FIG. 2, audio data in 8-bit units is sequentially transmitted from the ROM 9 to the multiplexer 4 at a frequency of 8 KHz in accordance with the address designation of the address counter 10.
Each bit is sequentially transmitted to the speech synthesizer according to a count frequency of 64KHz. Therefore, voice synthesis will be performed at the same frequency as the sampling frequency (64KHz) during delta modulation. During this operation, a code at address 100, for example 00100000, is read out from the ROM 9, and the decoder 12 determines that this code is not audio data and is a branch and...
When it is decoded as a loop instruction, counter 1
1 is inhibited from acting on the multiplexer 4 to stop the output of the multiplexer 4, and the count period of the counter 11 is changed to the address counter 1.
0 and causes the address counter 10 to perform a counting operation with a frequency of 64KHz. Due to this, for example, 50, which is the first address number of the jump destination stored at the next address 101, and the next 102
For example, the final address number of the jump destination stored at the address 70, and the number of repetitions stored at the next address 103, for example 3, are sequentially stored in the control unit 13. The next address number 104 is temporarily stored in the address counter 10. Immediately thereafter, according to instructions from the control section, the counter 11 acts on the multiplexer 4, and the address counter 10 acts on the ROM.
After specifying address 50 of 9 and returning to the normal audio data specification operation, specifying addresses 50 to 70 three times in succession, specifying the stored address 104 and returning to the previous address flow. to return to. In this way, the sound in the stationary section of the sound waveform is resynthesized. In addition, 104 from address 100 of the above ROM9
The frequency at which the control information stored in the address is read out is set to 64KHz, effectively shortening the time during which speech synthesis is interrupted.
It is preferable to provide means for inputting a 64KHz square wave pulse corresponding to the code to the speech synthesizer so that the wave height of the speech waveform can be maintained even during the processing time of the control information.

As is clear from the above description, the method for creating memory information for a speech synthesizer according to the present invention includes a memory that stores both audio data and control information, and the control information is assigned a specific code with a low frequency as audio data. , which converts audio data that should originally be represented by this specific code into approximate audio data other than this audio data, so it is a speech synthesis method that can control the flow of audio data while using a single memory configuration. A device can be realized, and with such a device, it becomes possible to synthesize speech without substantial distortion with a simple configuration.

Further, the method for creating memory information of a speech synthesis device of the present invention uses a binary code in which the change state of the speech waveform is delta-modulated to the above-mentioned speech data, and a combination of one 1 and a specific number of 0s, as well as one 0 and one 0. Since the above control information is a specific code selected from a specific binary code formed by a combination of a specific number of 1's, less frequent audio data is converted to approximate audio data. Therefore, it is possible to almost eliminate any negative effects on the synthesized speech.

Furthermore, since the memory information creation method of the speech synthesis device of the present invention uses audio data expressed in a binary code of all 0s and all 1s as the approximate audio data, the approximate audio data is generated from the specific binary code. It can be easily converted into data,
Creation of memory information can be simplified.

As is clear from the above-mentioned effects, the method of the present invention makes it possible to simplify the structure of a speech synthesis device that compresses necessary speech data, and is highly useful.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a conventional speech synthesis device, and FIG. 2 is a block diagram showing the configuration of a speech synthesis device adopting the memory information creation method of the present invention, where 4 is a multiplexer, and 5 is a speech synthesis device. vessel, 9
10 is a ROM, 10 is an address counter, 11 is a counter, 12 is a decoder, and 13 is a control section.

Claims (1)

[Scope of Claims] 1. A memory that stores audio information obtained by encoding audio waveforms as well as control information including processing instructions for the audio information, and controls reading of the audio information in accordance with the control information in the memory. A speech synthesizer that synthesizes a speech waveform based on the speech information read from the memory, and a speaker that converts the speech signal obtained from the speech synthesizer into speech. In the method, the control information is voice information characterized by assigning a specific code with a low frequency as audio information, and converting the audio information that should originally be represented by this specific code to approximate audio information other than this audio information. A method for creating memory information for a synthesizer. 2. In the method for creating memory information for a speech synthesizer according to claim 1, the speech information is
It consists of a binary code that encodes the changing state of the audio waveform using delta modulation, and includes a combination of one 1 and a specific number of 0s, which are infrequent codes as audio information, and one 0 and a specific number of 1s. A method for creating memory information for a speech synthesizer, characterized in that a specific code selected from among specific binary codes formed by a combination of the following is used as the specific code assigned as the control information. 3. In the method for creating memory information for a speech synthesizer as set forth in claim 2, a voice represented by a binary code of all 0s and all 1s as approximate voice information other than the specific code assigned as the above-mentioned control information. A method for creating memory information for a speech synthesis device characterized by using information.