JPS6237906B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor light emitting device having a novel structure in which modulation of a semiconductor laser device can be directly performed via a high impedance input terminal.

Generally, the modulation of semiconductor laser equipment is 10 to 100mA
This is done by directly applying current pulses to the laser device. The present invention is a method for manufacturing a semiconductor light emitting device in which a field effect transistor section (hereinafter abbreviated as FET section) is connected to one electrode of a semiconductor laser device and is formed monolithically.

FIG. 1 shows a cross-sectional view of a typical semiconductor light emitting device of the present invention. A cross section perpendicular to the traveling direction of the laser beam is shown.

First, second, third, fourth, and fifth semiconductor layers 2, 3, 4, 5, and 6 constituting a semiconductor laser element are stacked on top of a semiconductor substrate 1 for growth to form a semiconductor laser section. Further, an FET is configured in a sixth semiconductor layer provided on the fifth semiconductor layer and juxtaposed to the semiconductor laser section.

The first semiconductor layer 2 is a high resistivity layer. The second semiconductor layer 3 becomes a first cladding layer, the third semiconductor layer 4 becomes an active layer, and the fourth semiconductor layer 5 becomes a second cladding layer. Naturally, the second and fourth semiconductor layers have a relatively lower refractive index than the third semiconductor layer. And they have mutually opposite conductivity types. Further, the second and fourth semiconductor layers have relatively large forbidden band widths compared to the third semiconductor layer.

The fifth semiconductor layer 6 is a high resistivity layer.

Reference numeral 8 denotes an impurity region constituting a channel region.
9, 9' and 10 are island-shaped impurity regions, each forming a source, a drain, and a current path to the semiconductor laser.

14 and 17 are p of the semiconductor laser device, respectively.
They are a side electrode and an n-side electrode. 13, 12, and 11 are the drain electrode, gate electrode, and source electrode of the FET, respectively. In this case, 14,
13, 11 and 17 are ohmic electrodes, and 12 is a shot electrode.

The metal electrode 14 is an electrode of the semiconductor laser element, but is short-circuited to the drain electrode 13 of the FET.

A cross section perpendicular to the traveling direction of the laser beam has a reflective surface formed by, for example, cleavage, and constitutes an optical resonator.

By applying a voltage between the electrodes 11 and 17, the semiconductor light emitting device having the above structure can be caused to emit laser oscillation. An example of an equivalent circuit of this configuration is shown in FIG. The numbers in FIG. 2 correspond to the numbered parts in FIG. S, D, and G correspond to the source, drain, and gate of each FET. Therefore, by applying a control voltage to the gate electrode 12, the oscillation of the semiconductor laser can be controlled. Of course, a semiconductor light emitting device may also be constructed using semiconductor layers of opposite conductivity type. Naturally, the valence circuit also has the opposite polarity.

The structure in which the oscillation of the semiconductor laser element can be controlled by the control electrode in this way produces the following advantages.

(1) Light intensity can be modulated by voltage pulses.

Since the control electrode is used with reverse bias, almost no current is consumed. For this reason, regular silicon
IC, for example TTL circuit (transistor transistor)
It is possible to turn the semiconductor laser device ON and OFF using the output signal of the logic circuit.

(2) High-speed modulation is possible.

The modulation speed is determined by the response speed of the FET section and the modulation speed of the laser, and a modulation speed of 1 Gb/s or more can be achieved.

Further, in the present invention, the current of the laser oscillation section is limited on both the n side and the p side with respect to the active layer. That is, one method is to make the first semiconductor layer 2 high in resistivity and provide the openings 15. The other method is to make the fifth semiconductor layer 6 high in resistivity and provide a bird-like impurity region 10 as a current path. Therefore, in the laser oscillation section, current flows only in the portion where laser oscillation is performed, and the threshold current value for laser oscillation can be set to about 5 to 20 mA. Approximately 1/10 compared to the case without such means
It can be done to a certain degree. Furthermore, the temperature characteristics can also be improved.

In manufacturing the semiconductor light emitting device of the present invention, it is useful to form the island-like impurity regions of the current path and the source and drain regions of the FET using the ion implantation method. By forming both regions with one mask, the process can be simplified and positioning can be performed with high precision.

Furthermore, forming a current path using a high resistivity layer is extremely useful for reducing parasitic capacitance, and the aforementioned high-speed modulation can be more easily realized.

Hereinafter, the present invention will be explained in detail based on Examples.

When composed of GaAs—GaAlAs, each layer is generally selected from the following materials. The semiconductor substrate is GaAs
crystal, the first semiconductor layer is Ga ₁ - _x Al _x As (0x
0.7), the second semiconductor layer is Ga ₁ - _y Al _y As (0.2y
0.7), the third semiconductor layer is Ga ₁ - _z Al _z As (0z
0.3), the fourth semiconductor layer is Ga ₁ - _s Al _s As _s (0.2s
0.7), the fifth semiconductor layer is Ga ₁ - _t Al _t As _t (0t
0.3), (where z>y, z>s, t>s).

3 to 6 are device cross-sectional views showing each step of the manufacturing process of the semiconductor light emitting device of the present invention.
Moreover, the above-mentioned FIG. 1 is a completed diagram.

The following layers are formed on one surface of an n-type GaAs substrate (electron concentration n〓10 ¹⁸ /cm ³ ) having a (100) plane on the upper surface by a well-known liquid phase epitaxial method. Ga, Al,
After baking an As melt (for example, Ga:Al=0.7:0.3) at 830 to 870° C. in a hydrogen atmosphere for about 3 hours, a GaAlAs layer 2 is formed on the GaAs substrate by a liquid phase epitaxial method. The specific resistance of this layer should be 500Ω・cm or more. In practical terms, there is no need to exceed a specific resistance of about 10KΩcm. The thickness of the high specific low resistance layer is required to be 500 Å or more. It should not have a thickness of 1 μm or more. If this layer is too thick, processing in the next process will be difficult.

Next, striped grooves 15 are formed in this semiconductor substrate in parallel to the traveling direction of the laser beam. The etching liquid used to process this groove is phosphoric acid, hydrogen peroxide solution, and ethylene glycol (volume ratio 1:
A mixture of 1:3) is used. Using conventional photolithography techniques is sufficient. This groove is
Since the GaAlAs layer 2 has a high specific resistance, it plays the role of concentrating current in the opening. It is also used to control the transverse mode by utilizing the seepage of laser light into the substrate.

The second semiconductor layer 3 is a p-type Ga _0.7 Al _0.3 As layer with a thickness of 1 μm, _the third semiconductor layer 4 is a GaAs layer with a thickness of 0.05 μm, and _the fourth semiconductor layer 5 is an n-type semiconductor layer 5.
A Ga _0.7 Al _0.3 As layer is grown to a thickness of 1 _μm , and the fifth semiconductor layer 6 is _a high resistivity GaAs layer to a thickness of 1 μm by continuous liquid phase epitaxial growth. The specific resistance may be about the same as that of the semiconductor layer 2 described above. A region 20 corresponding to the laser oscillation part of the semiconductor layer 6 is etched to a thickness of 0.3 μm using sulfuric acid, hydrogen peroxide, and water in a volume ratio of 4:1:1. At this time, a 0.5 μm thick SiO ₂ film is used as an etching mask.

Next, a negative photoresist is applied to a thickness of 0.5 .mu.m, and light is irradiated to areas other than those corresponding to the electrode sections 10, 9, and 9'. After development processing,
10 and 9 by etching SiO ₂
A portion of the crystal corresponding to 9' is exposed. Since the photoresist is exposed to light on a flat part of the crystal plane, it is performed with high precision. Next, ^{10 and} 9,
9' to form an n ⁺ region. As for the ion implantation method itself, a normal method may be used. Region 10 is formed to be electrically connected to semiconductor layer 5. Furthermore, using exactly the same method, an n-type impurity region 8 is formed by ion implantation. Si ions are implanted at a dose of 1×10 ¹³ cm ⁻² at 120 kV.

An SiO ₂ film is formed as an insulating layer 7 over the entire surface of the semiconductor substrate. Holes are formed in the insulating layer 7 at least in portions corresponding to the electrode portions 11, 12, 13, and 14 using a conventional photolithography technique. 11,13
is an ohmic electrode using Au-Ge-Ni alloy, 1
2 has Cr, Ti and Au of 300Å, 300Å and
This is a shot electrode formed by laminating layers with a thickness of 4000 Å. The drain electrode 13 of the FET and the electrode part of the laser are short-circuited by a wiring 14 made of Au--Ge--Ni.

After polishing the back surface of the semiconductor substrate 1 and lightly etching it, Cr, Ti, and Au are deposited to a thickness of 300 Å, 300 Å, and 0.8 μm, respectively, to form the p-side electrode 17.

Finally, the crystal plane is cleaved in a plane perpendicular to the traveling direction of the laser beam to form an optical resonator. Laser length is 300μ
It was set as m.

In this way, a semiconductor light emitting device is completed.

This light emitting element can generate laser beam oscillation by applying a voltage of 4 to 5 V between the source electrode 11 and the n-side electrode 17 of the laser element. The oscillation wavelength was 8300 Å, the threshold current was approximately 5 mA, and modulation was possible up to 2.5 GHz. Further, the transconductance (gm) of the FET was 10 mS (milliSiemens).

Of course, the present invention is not limited to the semiconductor materials shown in the examples. Furthermore, there are various means for stabilizing the mode of a semiconductor laser, but it goes without saying that they may be applied to the semiconductor laser portion of the light emitting semiconductor of the present invention, and are within the scope of the present invention.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of the semiconductor light emitting device of the present invention in a plane parallel to a plane perpendicular to the traveling direction of laser light;
The figure is an equivalent circuit of a semiconductor light emitting device, and FIGS. 3 to 6 are device cross-sectional views for explaining the manufacturing process of the semiconductor light emitting device of the present invention. 1... p-GaAs substrate, 2... high specific resistance GaAs
Layer, 3, 5...GaAlAs layer, 4... Active layer, 6...
...High resistivity GaAs layer, 11... Source electrode, 13
...Drain electrode, 12...Gate electrode, 14...
...Laser oscillation part p-side electrode, 17...n-side electrode.

Claims (1)

[Claims] 1 Specific resistance is 500Ω・cm on a given semiconductor substrate
a step of forming a first semiconductor layer of 10 kΩ·cm, a step of penetrating the first semiconductor layer and forming a stripe-shaped groove in the substrate parallel to the traveling direction of the laser beam, and a step of forming a second semiconductor layer on the substrate. The process of laminating the third and fourth semiconductor layers, and the specific resistance is 500Ω・cm ~ 10k
a step of forming a fifth semiconductor layer of Ωcm;
forming a recess in a partial region of the surface of the semiconductor layer including the region facing the striped groove;
Ions are simultaneously implanted into a partial region of the fourth semiconductor layer and two regions of the fifth semiconductor layer corresponding to the source and drain of the field effect transistor through the recessed portion of the fifth semiconductor layer. The process of putting
each step of implanting ions into an active region of the transistor including the source and drain regions of the fifth semiconductor layer, and the second and fourth semiconductor layers are implanted into the third semiconductor layer. A method for manufacturing a semiconductor light emitting device, characterized in that the semiconductor layers have a relatively small refractive index, a relatively large forbidden band width, and mutually opposite conductivity types.